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ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

PATCH New Sylwester Nawrocki 3 participants 7 messages May 4, 2012 – May 10, 2012

Subsystems (3)
Arm (32-bit) Arm sub-architectures Arm Samsung Exynos
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Sylwester Nawrocki

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#0 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

Add the gate clocks and register region address definition for FIMC-LITE devices available in Exynos4x12 and Exynos5 SoCs.

Signed-off-by Sylwester Nawrocki <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/mach-exynos/clock-exynos4212.c |   10 ++++++++++
 arch/arm/mach-exynos/include/mach/map.h |    3 +++
 2 files changed, 13 insertions(+)
arch/arm/mach-exynos/clock-exynos4212.c +10 -0
index 9882312..da397d2 100644
@@ -92,6 +92,16 @@ static struct clk init_clocks_off[] = {
 		.devname	= SYSMMU_CLOCK_DEVNAME(isp, 9),
 		.enable		= exynos4212_clk_ip_isp1_ctrl,
 		.ctrlbit	= (1 << 4),
+	}, {
+		.name		= "flite",
+		.devname	= "exynos-fimc-lite.0",
+		.enable		= exynos4212_clk_ip_isp0_ctrl,
+		.ctrlbit	= (1 << 4),
+	}, {
+		.name		= "flite",
+		.devname	= "exynos-fimc-lite.1",
+		.enable		= exynos4212_clk_ip_isp0_ctrl,
+		.ctrlbit	= (1 << 3),
 	}
 };
arch/arm/mach-exynos/include/mach/map.h +3 -0
index 0e2292d..d30643b 100644
@@ -34,6 +34,9 @@
 
 #define EXYNOS4_PA_JPEG			0x11840000
 
+/* x = 0...1 */
+#define EXYNOS4_PA_FIMC_LITE(x)		(0x12390000 + ((x) * 0x10000))
+
 #define EXYNOS4_PA_G2D			0x12800000
 
 #define EXYNOS4_PA_I2S0			0x03830000
Signature · 1 line
1.7.10
#1 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

Quoted 4 lines · Sylwester Nawrocki

Add the gate clocks and register region address definition for FIMC-LITE devices available in Exynos4x12 and Exynos5 SoCs.

This is right description? I can't find your changes for EXYNOS4412 and EXYNOS5 here. Only this is for EXYNOS4212 SoC.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

Quoted 35 lines
Signed-off-by Sylwester Nawrocki <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/mach-exynos/clock-exynos4212.c |   10 ++++++++++
 arch/arm/mach-exynos/include/mach/map.h |    3 +++
 2 files changed, 13 insertions(+)
arch/arm/mach- renamed from arch/arm/mach-exynos/clock-exynos4212.c +0 -0

exynos/clock-exynos4212.c
index 9882312..da397d2 100644

arch/arm/mach-exynos/clock-exynos4212.c +10 -0
@@ -92,6 +92,16 @@ static struct clk init_clocks_off[] = {
 		.devname	= SYSMMU_CLOCK_DEVNAME(isp, 9),
 		.enable		= exynos4212_clk_ip_isp1_ctrl,
 		.ctrlbit	= (1 << 4),
+	}, {
+		.name		= "flite",
+		.devname	= "exynos-fimc-lite.0",
+		.enable		= exynos4212_clk_ip_isp0_ctrl,
+		.ctrlbit	= (1 << 4),
+	}, {
+		.name		= "flite",
+		.devname	= "exynos-fimc-lite.1",
+		.enable		= exynos4212_clk_ip_isp0_ctrl,
+		.ctrlbit	= (1 << 3),
 	}
 };
arch/arm/mach- renamed from arch/arm/mach-exynos/include/mach/map.h +0 -0

exynos/include/mach/map.h
index 0e2292d..d30643b 100644

arch/arm/mach-exynos/include/mach/map.h line 38

Quoted 5 lines
arch/arm/mach-exynos/include/mach/map.h +2 -0
@@ -34,6 +34,9 @@
 
 #define EXYNOS4_PA_JPEG			0x11840000
 
+/* x = 0...1 */
+#define EXYNOS4_PA_FIMC_LITE(x)		(0x12390000 + ((x) *

0x10000))

Quoted 6 lines
arch/arm/mach-exynos/include/mach/map.h +1 -1
+
 #define EXYNOS4_PA_G2D			0x12800000
 
 #define EXYNOS4_PA_I2S0			0x03830000
--

1.7.10

author
#2 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

Quoted 7 lines · Kukjin Kim
Quoted 4 lines · Sylwester Nawrocki

Add the gate clocks and register region address definition for FIMC-LITE devices available in Exynos4x12 and Exynos5 SoCs.

This is right description? I can't find your changes for EXYNOS4412 and EXYNOS5 here. Only this is for EXYNOS4212 SoC.

Sorry, I wasn't precise enough. EXYNOS4_PA_FIMC_LITE is for EXYNOS4212 and EXYNOS4412 though. Please note it is initially needed for DT platforms, until we get proper clock DT bindings for EXYNOS. Is there, BTW, anyone known to work on converting EXYNOS to the common clock framework ?

This patch was intended for EXYNOS4212/4412. AFAICS clock code in mach-exynos/clock-exynos4412.c is a subset of the EXYNOS4412 platform:

static void __init exynos4_init_clocks(int xtal)

{
	...
	if (soc_is_exynos4210())
		exynos4210_register_clocks();
	else if (soc_is_exynos4212() || soc_is_exynos4412())
		exynos4212_register_clocks();
	
	exynos4_register_clocks();
	...
}

Should I resend the patch or could you remove " and Exynos5 SoCs" from the description ?

--

Regards,
Sylwester Nawrocki

author
#3 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

Quoted 9 lines · Sylwester Nawrocki
Quoted 7 lines · Kukjin Kim
Quoted 4 lines · Sylwester Nawrocki

Add the gate clocks and register region address definition for FIMC-LITE devices available in Exynos4x12 and Exynos5 SoCs.

This is right description? I can't find your changes for EXYNOS4412 and EXYNOS5 here. Only this is for EXYNOS4212 SoC.

Quoted 7 lines

Sorry, I wasn't precise enough. EXYNOS4_PA_FIMC_LITE is for EXYNOS4212 and EXYNOS4412 though. Please note it is initially needed for DT platforms, until we get proper clock DT bindings for EXYNOS. Is there, BTW, anyone known to work on converting EXYNOS to the common clock framework ?

This patch was intended for EXYNOS4212/4412. AFAICS clock code in mach-exynos/clock-exynos4412.c is a subset of the EXYNOS4412 platform:

              ^^^^^^^^^^^^^^^^^^

Uh, should be clock-exynos4212.c.

Quoted 19 lines

static void __init exynos4_init_clocks(int xtal)

{
	...
	if (soc_is_exynos4210())
		exynos4210_register_clocks();
	else if (soc_is_exynos4212() || soc_is_exynos4412())
		exynos4212_register_clocks();
	
	exynos4_register_clocks();
	...
}

Should I resend the patch or could you remove " and Exynos5 SoCs" from the description ?

--

Regards,
Sylwester Nawrocki

#4 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

In reply to Sylwester Nawrocki
Quoted 4 lines · Sylwester Nawrocki
Quoted 2 lines · Kukjin Kim
Quoted 1 line · Sylwester Nawrocki
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines

Add the gate clocks and register region address definition for FIMC-LITE devices available in Exynos4x12 and Exynos5 SoCs.

This is right description? I can't find your changes for EXYNOS4412 and EXYNOS5 here. Only this is for EXYNOS4212 SoC.

Sorry, I wasn't precise enough. EXYNOS4_PA_FIMC_LITE is for EXYNOS4212 and EXYNOS4412 though. Please note it is initially needed for DT

platforms,

Quoted 3 lines

until we get proper clock DT bindings for EXYNOS. Is there, BTW, anyone known to work on converting EXYNOS to the common clock framework ?

Yes, my colleague is working on common clock for all of exynos stuff.

Quoted 3 lines

This patch was intended for EXYNOS4212/4412. AFAICS clock code in mach-exynos/clock-exynos4412.c is a subset of the EXYNOS4412 platform:

OK.

Quoted 12 lines

static void __init exynos4_init_clocks(int xtal)

{
	...
	if (soc_is_exynos4210())
		exynos4210_register_clocks();
	else if (soc_is_exynos4212() || soc_is_exynos4412())
		exynos4212_register_clocks();

	exynos4_register_clocks();
	...
}
Quoted 3 lines

Should I resend the patch or could you remove " and Exynos5 SoCs" from the description ?

I see, let me fix it when I apply this.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

author
#5 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

Quoted 7 lines · Kukjin Kim
Quoted 3 lines

Should I resend the patch or could you remove " and Exynos5 SoCs" from the description ?

I see, let me fix it when I apply this.

Thanks.

Alright, thanks a lot.

Signature · 2 lines
Sylwester Nawrocki
Samsung Poland R&D Center
#6 lore raw

PATCH 1/1 ARM: EXYNOS: Add platform resource definitions for FIMC-LITE

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