mx53: Change IPU_CTRL_BASE_ADDR definition

PATCH New Fabio Estevam 4 participants 10 messages May 11, 2012 – May 25, 2012

Subsystems (3)

Arm (32-bit) Arm i.MX and Layerscape Framebuffer layer

lore

Share & tools

lore

Fabio Estevam

author reviewer

2012-05-11 01:07 UTC #0 lore raw

PATCH 1/3 mx53: Change IPU_CTRL_BASE_ADDR definition

From: Fabio Estevam <[email protected]>

The original definition of IPU_CTRL_BASE_ADDR does match the value stated in the MX53 Reference Manual.

However, if using such value the IPU driver hangs when trying to access the IPU registers.

Looking for this definition in Freescale U-boot version shows that it is set as 0.

Set it as 0 here as well, so that we can have a working IPU driver for mx53.

Signed-off-by Fabio Estevam <[email protected]>

---
 arch/arm/include/asm/arch-mx5/imx-regs.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

arch/arm/include/asm/arch-mx5/imx-regs.h +1 -1

index cef4190..171c4ab 100644
@@ -34,7 +34,7 @@
 #define NFC_BASE_ADDR_AXI       0xCFFF0000
 #define CS1_BASE_ADDR           0xB8000000
 #elif defined(CONFIG_MX53)
-#define IPU_CTRL_BASE_ADDR      0x18000000
+#define IPU_CTRL_BASE_ADDR      0x00000000
 #define SPBA0_BASE_ADDR         0x50000000
 #define AIPS1_BASE_ADDR         0x53F00000
 #define AIPS2_BASE_ADDR         0x63F00000

Signature · 1 line

1.7.1

Fabio Estevam

author reviewer

2012-05-11 01:07 UTC #1 lore raw

PATCH 2/3 mx5: Rename mx51_fb_init()

From: Fabio Estevam <[email protected]>

The ipuv3 driver is currently only used on mx51, but it can be extended to work on mx53 and mx6 as well.

Rename mx51_fb_init(), so that it can be used by other SoCs.

Signed-off-by Fabio Estevam <[email protected]>

---
 board/freescale/mx51evk/mx51evk.c |    2 +-
 board/ttcontrol/vision2/vision2.c |    2 +-
 drivers/video/mxc_ipuv3_fb.c      |    2 +-
 include/ipu_pixfmt.h              |    2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

board/freescale/mx51evk/mx51evk.c +1 -1

index bc7f057..514a7ac 100644
@@ -502,7 +502,7 @@ void lcd_iomux(void)
 
 void lcd_enable(void)
 {
-	int ret = mx51_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
+	int ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
 	if (ret)
 		printf("LCD cannot be configured: %d\n", ret);
 }

board/ttcontrol/vision2/vision2.c +1 -1

index 282de95..d68bef7 100644
@@ -604,7 +604,7 @@ void lcd_enable(void)
 	gpio_set_value(2, 1);
 	mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
 
-	ret = mx51_fb_init(&nec_nl6448bc26_09c, 0, IPU_PIX_FMT_RGB666);
+	ret = ipuv3_fb_init(&nec_nl6448bc26_09c, 0, IPU_PIX_FMT_RGB666);
 	if (ret)
 		puts("LCD cannot be configured\n");
 }

drivers/video/mxc_ipuv3_fb.c +1 -1

index 1bee54c..c38e22d 100644
@@ -599,7 +599,7 @@ void video_set_lut(unsigned int index, /* color number */
 	return;
 }
 
-int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt)
+int ipuv3_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt)
 {
 	gmode = mode;
 	gdisp = disp;

include/ipu_pixfmt.h +1 -1

index 656f605..0019898 100644
@@ -76,6 +76,6 @@
 #define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6')	/*< 16 YVU 4:2:2 */
 #define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P')	/*< 16 YUV 4:2:2 */
 
-int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt);
+int ipuv3_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt);
 
 #endif

Signature · 1 line

1.7.1

Anatolij Gustschin

2012-05-25 08:42 UTC #3 lore raw

PATCH 2/3 mx5: Rename mx51_fb_init()

In reply to Fabio Estevam

Hi,

Quoted 7 lines · On Thu, 10 May 2012 22:07:34 -0300 Fabio Estevam <[email protected]> wrote:

From: Fabio Estevam <[email protected]>
The ipuv3 driver is currently only used on mx51, but it can be extended to work on mx53 and mx6 as well.
Rename mx51_fb_init(), so that it can be used by other SoCs.

Quoted 7 lines

Signed-off-by Fabio Estevam <[email protected]>

---
 board/freescale/mx51evk/mx51evk.c |    2 +-
 board/ttcontrol/vision2/vision2.c |    2 +-
 drivers/video/mxc_ipuv3_fb.c      |    2 +-
 include/ipu_pixfmt.h              |    2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

Applied to u-boot-video/master, thanks!

Anatolij

Fabio Estevam

author reviewer

2012-05-11 01:07 UTC #4 lore raw

PATCH 3/3 mx53loco: Add LCD support

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Add support for CLAA07LC0ACW LCD that connects to the mx53loco board.

Configure the board to show the Linux logo on the LCD.

Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account the framebuffer usage.

Signed-off-by Fabio Estevam <[email protected]>

---
 board/freescale/mx53loco/mx53loco.c |   72 +++++++++++++++++++++++++++++++++++
 include/configs/mx53loco.h          |   13 ++++++-
 2 files changed, 84 insertions(+), 1 deletions(-)

board/freescale/mx53loco/mx53loco.c +72 -0

index dec966d..ad9e419 100644
@@ -39,6 +39,10 @@
 #include <pmic.h>
 #include <dialog_pmic.h>
 #include <fsl_pmic.h>
+#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+
+#define MX53LOCO_LCD_POWER		(2 * 32 + 24)	/* GPIO3_24 */
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -402,10 +406,74 @@ static void clock_1GHz(void)
 		printf("CPU:   Switch DDR clock to 400MHz failed\n");
 }
 
+static struct fb_videomode claa_wvga = {
+	.name		= "CLAA07LC0ACW",
+	.refresh	= 57,
+	.xres		= 800,
+	.yres		= 480,
+	.pixclock	= 37037,
+	.left_margin	= 40,
+	.right_margin	= 60,
+	.upper_margin	= 10,
+	.lower_margin	= 10,
+	.hsync_len	= 20,
+	.vsync_len	= 10,
+	.sync		= 0,
+	.vmode		= FB_VMODE_NONINTERLACED
+};
+
+void lcd_iomux(void)
+{
+	mxc_request_iomux(MX53_PIN_DI0_DISP_CLK, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DI0_PIN15, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DI0_PIN2, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DI0_PIN3, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT0, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT1, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT2, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT3, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT4, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT5, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT6, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT7, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT8, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT9, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT10, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT11, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT12, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT13, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT14, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT15, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT16, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT17, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT18, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT19, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT20, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT21, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT22, IOMUX_CONFIG_ALT0);
+	mxc_request_iomux(MX53_PIN_DISP0_DAT23, IOMUX_CONFIG_ALT0);
+
+	/* Turn on GPIO backlight */
+	mxc_request_iomux(MX53_PIN_EIM_D24, IOMUX_CONFIG_ALT1);
+	gpio_direction_output(MX53LOCO_LCD_POWER, 1);
+
+	/* Turn on display contrast */
+	mxc_request_iomux(MX53_PIN_GPIO_1, IOMUX_CONFIG_ALT1);
+	gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_1), 1);
+}
+
+void lcd_enable(void)
+{
+	int ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
+	if (ret)
+		printf("LCD cannot be configured: %d\n", ret);
+}
+
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
 	setup_iomux_fec();
+	lcd_iomux();
 
 	return 0;
 }

@@ -432,6 +500,8 @@ int board_late_init(void)
 		clock_1GHz();
 	print_cpuinfo();
 
+	setenv("stdout", "serial");
+
 	return 0;
 }
 #endif

@@ -441,6 +511,8 @@ int board_init(void)
 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 
 	mxc_set_sata_internal_clock();
+
+	lcd_enable();
 
 	return 0;
 }

include/configs/mx53loco.h +12 -1

index eab0e27..99daafb 100644
@@ -38,7 +38,7 @@
 #define CONFIG_INITRD_TAG
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT

@@ -220,4 +220,15 @@
 	#define CONFIG_LIBATA
 #endif
 
+/* Framebuffer and LCD */
+#define CONFIG_PREBOOT
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_MX5
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+
 #endif				/* __CONFIG_H */

Signature · 1 line

1.7.1

Anatolij Gustschin

2012-05-25 08:43 UTC #6 lore raw

PATCH 3/3 mx53loco: Add LCD support

In reply to Fabio Estevam

Hi,

Quoted 6 lines · On Thu, 10 May 2012 22:07:35 -0300 Fabio Estevam <[email protected]> wrote:

From: Fabio Estevam <[email protected]>
Add support for CLAA07LC0ACW LCD that connects to the mx53loco board.
Configure the board to show the Linux logo on the LCD.

Quoted 8 lines

Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account the framebuffer usage.
Signed-off-by Fabio Estevam <[email protected]>
---
 board/freescale/mx53loco/mx53loco.c |   72 +++++++++++++++++++++++++++++++++++
 include/configs/mx53loco.h          |   13 ++++++-
 2 files changed, 84 insertions(+), 1 deletions(-)

Applied to u-boot-video/master, thanks!

Anatolij

Stefano Babic

2012-05-11 10:46 UTC #8 lore raw

PATCH 1/3 mx53: Change IPU_CTRL_BASE_ADDR definition

In reply to Fabio Estevam

Quoted 5 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>
The original definition of IPU_CTRL_BASE_ADDR does match the value stated in the MX53 Reference Manual.

Quoted 8 lines

However, if using such value the IPU driver hangs when trying to access the IPU registers.
Looking for this definition in Freescale U-boot version shows that it is set as 0.
Set it as 0 here as well, so that we can have a working IPU driver for mx53.
Signed-off-by Fabio Estevam <[email protected]>
---

Hi Fabio,

Quoted 8 lines

 arch/arm/include/asm/arch-mx5/imx-regs.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

arch/arm/include/asm/arch-mx5/imx-regs.h +0 -0

index cef4190..171c4ab 100644

arch/arm/include/asm/arch-mx5/imx-regs.h line 40

Quoted 8 lines

arch/arm/include/asm/arch-mx5/imx-regs.h +1 -1

@@ -34,7 +34,7 @@
 #define NFC_BASE_ADDR_AXI       0xCFFF0000
 #define CS1_BASE_ADDR           0xB8000000
 #elif defined(CONFIG_MX53)
-#define IPU_CTRL_BASE_ADDR      0x18000000
+#define IPU_CTRL_BASE_ADDR      0x00000000
 #define SPBA0_BASE_ADDR         0x50000000
 #define AIPS1_BASE_ADDR         0x53F00000
 #define AIPS2_BASE_ADDR         0x63F00000

Apart of the fact that it works, this chane appears really strange to me. Maybe now it is not writing anymore in ipu, and the default values are ok for mx53. It seems more a MX53 related issu in IPU3 driver, and this change maybe hides the real problem. Do you have any additional information to make this modification against the official Freescale's reference manual ?

Regards,
Stefano

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Fabio Estevam

author reviewer

2012-05-11 18:31 UTC #9 lore raw

PATCH 1/3 mx53: Change IPU_CTRL_BASE_ADDR definition

Hi Stefano,

Quoted 6 lines · Stefano Babic

Apart of the fact that it works, this chane appears really strange to me. Maybe now it is not writing anymore in ipu, and the default values are ok for mx53. It seems more a MX53 related issu in IPU3 driver, and this change maybe hides the real problem. Do you have any additional information to make this modification against the official Freescale's reference manual ?

I investigated this and I understand it better now.

I am working on a solution that will be flexible to handle mx51/mx53/mx6.

Regards,

Fabio Estevam

mx53: Change IPU_CTRL_BASE_ADDR definition

Fabio Estevam

Fabio Estevam

Liu Hui-R64343

Anatolij Gustschin

Fabio Estevam

Liu Hui-R64343

Anatolij Gustschin

Liu Hui-R64343

Stefano Babic

Fabio Estevam