net: sh_eth: Remove SH_ETH_PHY_DELAY

PATCH New Nobuhiro Iwamatsu 3 participants 8 messages Feb 3, 2012 – May 24, 2012 Network drivers

lore

Share & tools

lore

Nobuhiro Iwamatsu

author

2012-02-03 07:28 UTC #0 lore raw

PATCH 1/1 net: sh_eth: Remove SH_ETH_PHY_DELAY

SH_ETH_PHY_DELAY is not used.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>

---
 drivers/net/sh_eth.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

drivers/net/sh_eth.c +0 -2

index 995e249..0871575 100644
@@ -44,8 +44,6 @@
 #define flush_cache_wback(...)
 #endif
 
-#define SH_ETH_PHY_DELAY 50000
-
 int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 {
 	struct sh_eth_dev *eth = dev->priv;

Signature · 1 line

1.7.7.3

Nobuhiro Iwamatsu

author

2012-02-03 07:28 UTC #1 lore raw

PATCH 1/1 net: sh_eth: Collect up EDMR_INIT_CNT to TIMEOUT_CNT

EDMR_INIT_CNT holds the check count of initialization.
Since there were more same values (1000), this collected as TIMEOUT_CNT.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>

---
 drivers/net/sh_eth.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

drivers/net/sh_eth.c +5 -4

index 0871575..1bc44a8 100644
@@ -44,6 +44,8 @@
 #define flush_cache_wback(...)
 #endif
 
+#define TIMEOUT_CNT 1000
+
 int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 {
 	struct sh_eth_dev *eth = dev->priv;

@@ -78,7 +80,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 		outl(EDTRR_TRNS, EDTRR(port));
 
 	/* Wait until packet is transmitted */
-	timeout = 1000;
+	timeout = TIMEOUT_CNT;
 	while (port_info->tx_desc_cur->td0 & TD_TACT && timeout--)
 		udelay(100);

@@ -134,7 +136,6 @@ int sh_eth_recv(struct eth_device *dev)
 	return len;
 }
 
-#define EDMR_INIT_CNT 1000
 static int sh_eth_reset(struct sh_eth_dev *eth)
 {
 	int port = eth->port;

@@ -146,13 +147,13 @@ static int sh_eth_reset(struct sh_eth_dev *eth)
 
 	/* Perform a software reset and wait for it to complete */
 	outl(EDMR_SRST, EDMR(port));
-	for (i = 0; i < EDMR_INIT_CNT; i++) {
+	for (i = 0; i < TIMEOUT_CNT ; i++) {
 		if (!(inl(EDMR(port)) & EDMR_SRST))
 			break;
 		udelay(1000);
 	}
 
-	if (i == EDMR_INIT_CNT) {
+	if (i == TIMEOUT_CNT) {
 		printf(SHETHER_NAME  ": Software reset timeout\n");
 		ret = -EIO;
 	}

Signature · 1 line

1.7.7.3

Nobuhiro Iwamatsu

author

2012-02-03 07:28 UTC #2 lore raw

PATCH 1/1 net: sh_eth: Remove unnecessary return

In reply to Nobuhiro Iwamatsu

---
 drivers/net/sh_eth.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

drivers/net/sh_eth.c +0 -1

index 1bc44a8..8d3dac2 100644
@@ -94,7 +94,6 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 	if (port_info->tx_desc_cur >= port_info->tx_desc_base + NUM_TX_DESC)
 		port_info->tx_desc_cur = port_info->tx_desc_base;
 
-	return ret;
 err:
 	return ret;
 }

Signature · 1 line

1.7.7.3

Nobuhiro Iwamatsu

author

2012-02-03 07:28 UTC #3 lore raw

PATCH 1/1 net: sh_eth: Add support SH7734 Ethernet device

In reply to Nobuhiro Iwamatsu

SH7734 has one channel ethernet device.
This support 10/100/1000Base, and RMII/MII/GMII.
And this has the same structure as SH7763.

Signed-off-by Nobuhiro Iwamatsu <[email protected]>

---
 drivers/net/sh_eth.c |   17 +++++-----
 drivers/net/sh_eth.h |   85 ++++++++++++++++++++++++++++++++++++++------------
 2 files changed, 74 insertions(+), 28 deletions(-)

drivers/net/sh_eth.c +9 -8

index 8d3dac2..c1abe7c 100644
@@ -59,7 +59,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 	}
 
 	/* packet must be a 4 byte boundary */
-	if ((int)packet & (4 - 1)) {
+	if ((int)packet & 3) {
 		printf(SHETHER_NAME ": %s: packet not 4 byte alligned\n", __func__);
 		ret = -EFAULT;
 		goto err;

@@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev)
 static int sh_eth_reset(struct sh_eth_dev *eth)
 {
 	int port = eth->port;
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 	int ret = 0, i;
 
 	/* Start e-dmac transmitter and receiver */

@@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
 	/* Point the controller to the tx descriptor list. Must use physical
 	   addresses */
 	outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 	outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
 	outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
 	outl(0x01, TDFFR(port));/* Last discriptor bit */

@@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
 
 	/* Point the controller to the rx descriptor list */
 	outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 	outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
 	outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
 	outl(RDFFR_RDLF, RDFFR(port));

@@ -346,7 +346,8 @@ static int sh_eth_phy_config(struct sh_eth_dev *eth)
 	struct eth_device *dev = port_info->dev;
 	struct phy_device *phydev;
 
-	phydev = phy_connect(miiphy_get_dev_by_name(dev->name),
+	phydev = phy_connect(
+			miiphy_get_dev_by_name(dev->name),
 			port_info->phy_addr, dev, PHY_INTERFACE_MODE_MII);
 	port_info->phydev = phydev;
 	phy_config(phydev);

@@ -398,7 +399,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 	outl(APR_AP, APR(port));
 	outl(MPR_MP, MPR(port));
 #endif
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 	outl(TPAUSER_TPAUSE, TPAUSER(port));
 #elif defined(CONFIG_CPU_SH7757)
 	outl(TPAUSER_UNLIMITED, TPAUSER(port));

@@ -418,7 +419,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 	/* Set the transfer speed */
 	if (phy->speed == 100) {
 		printf(SHETHER_NAME ": 100Base/");
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 		outl(GECMR_100B, GECMR(port));
 #elif defined(CONFIG_CPU_SH7757)
 		outl(1, RTRATE(port));

@@ -427,7 +428,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 #endif
 	} else if (phy->speed == 10) {
 		printf(SHETHER_NAME ": 10Base/");
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 		outl(GECMR_10B, GECMR(port));
 #elif defined(CONFIG_CPU_SH7757)
 		outl(0, RTRATE(port));

drivers/net/sh_eth.h +65 ~~-20~~

180 lines not on this page · raw message

Signature · 1 line

1.7.7.3

Nobuhiro Iwamatsu

2012-05-09 07:22 UTC #4 lore raw

PATCH 1/1 net: sh_eth: Add support SH7734 Ethernet device

Hi, Joe.

I have not noticed that inaugurated as you at the maintainer of net. Could you apply this patch to your u-boot-net repository?

Best regards,
Nobuhiro

2012/2/3 Nobuhiro Iwamatsu <[email protected]>:

Quoted 286 lines

SH7734 has one channel ethernet device.
This support 10/100/1000Base, and RMII/MII/GMII.
And this has the same structure as SH7763.
Signed-off-by Nobuhiro Iwamatsu <[email protected]>
---
?drivers/net/sh_eth.c | ? 17 +++++-----
?drivers/net/sh_eth.h | ? 85 ++++++++++++++++++++++++++++++++++++++------------ ?2 files changed, 74 insertions(+), 28 deletions(-)
drivers/net/sh_eth.c +0 -0
index 8d3dac2..c1abe7c 100644
@@ -59,7 +59,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 ? ? ? ?}
 
? ? ? ?/* packet must be a 4 byte boundary */
- ? ? ? if ((int)packet & (4 - 1)) {
+ ? ? ? if ((int)packet & 3) {
? ? ? ? ? ? ? ?printf(SHETHER_NAME ": %s: packet not 4 byte alligned\n", __func__); ? ? ? ? ? ? ? ?ret = -EFAULT;
? ? ? ? ? ? ? ?goto err;
drivers/net/sh_eth.c +1 -1
@@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev)
 ?static int sh_eth_reset(struct sh_eth_dev *eth)
 ?{
 ? ? ? ?int port = eth->port;
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ? ? ? ?int ret = 0, i;
 
? ? ? ?/* Start e-dmac transmitter and receiver */
drivers/net/sh_eth.c +0 -0
@@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
? ? ? ?/* Point the controller to the tx descriptor list. Must use physical ? ? ? ? ? addresses */
? ? ? ?outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
drivers/net/sh_eth.c +1 -1
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port)); ? ? ? ?outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
? ? ? ?outl(0x01, TDFFR(port));/* Last discriptor bit */
drivers/net/sh_eth.c +0 -0
@@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
 
? ? ? ?/* Point the controller to the rx descriptor list */ ? ? ? ?outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
drivers/net/sh_eth.c +1 -1
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port)); ? ? ? ?outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
? ? ? ?outl(RDFFR_RDLF, RDFFR(port));
drivers/net/sh_eth.c +2 -1
@@ -346,7 +346,8 @@ static int sh_eth_phy_config(struct sh_eth_dev *eth)
 ? ? ? ?struct eth_device *dev = port_info->dev;
 ? ? ? ?struct phy_device *phydev;
 
- ? ? ? phydev = phy_connect(miiphy_get_dev_by_name(dev->name),
+ ? ? ? phydev = phy_connect(
+ ? ? ? ? ? ? ? ? ? ? ? miiphy_get_dev_by_name(dev->name),
 ? ? ? ? ? ? ? ? ? ? ? ?port_info->phy_addr, dev, PHY_INTERFACE_MODE_MII);
 ? ? ? ?port_info->phydev = phydev;
 ? ? ? ?phy_config(phydev);
@@ -398,7 +399,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 ? ? ? ?outl(APR_AP, APR(port));
 ? ? ? ?outl(MPR_MP, MPR(port));
?#endif
drivers/net/sh_eth.c +1 -1
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?outl(TPAUSER_TPAUSE, TPAUSER(port));
?#elif defined(CONFIG_CPU_SH7757)
? ? ? ?outl(TPAUSER_UNLIMITED, TPAUSER(port));
drivers/net/sh_eth.c +0 -0
@@ -418,7 +419,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
? ? ? ?/* Set the transfer speed */
? ? ? ?if (phy->speed == 100) {
? ? ? ? ? ? ? ?printf(SHETHER_NAME ": 100Base/");
drivers/net/sh_eth.c +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ? ? ? ? ?outl(GECMR_100B, GECMR(port));
?#elif defined(CONFIG_CPU_SH7757)
? ? ? ? ? ? ? ?outl(1, RTRATE(port));
drivers/net/sh_eth.c +0 -0
@@ -427,7 +428,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
?#endif
? ? ? ?} else if (phy->speed == 10) {
? ? ? ? ? ? ? ?printf(SHETHER_NAME ": 10Base/");
drivers/net/sh_eth.c +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ? ? ? ? ?outl(GECMR_10B, GECMR(port));
?#elif defined(CONFIG_CPU_SH7757)
? ? ? ? ? ? ? ?outl(0, RTRATE(port));
drivers/net/sh_eth.h +38 -0
index 27fde05..1f646e2 100644
@@ -188,13 +188,51 @@ struct sh_eth_dev {
 ?#define TPAUSER(port) ?(BASE_IO_ADDR + 0x0164)
 ?#define MAHR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x01c0)
 ?#define MALR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x01c8)
+
+#elif defined(CONFIG_CPU_SH7734)
+#define BASE_IO_ADDR ? 0xFEE00000
+
+#define EDSR(port) ? ? ? ? ? ? (BASE_IO_ADDR)
+
+#define TDLAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0010)
+#define TDFAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0014)
+#define TDFXR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0018)
+#define TDFFR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x001c)
+#define RDLAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0030)
+#define RDFAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0034)
+#define RDFXR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0038)
+#define RDFFR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x003c)
+
+#define EDMR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0400)
+#define EDTRR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0408)
+#define EDRRR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0410)
+#define EESR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0428)
+#define EESIPR(port) ? (BASE_IO_ADDR + 0x0430)
+#define TRSCER(port) ? (BASE_IO_ADDR + 0x0438)
+#define TFTR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0448)
+#define FDR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0450)
+#define RMCR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0458)
+#define RPADIR(port) ? (BASE_IO_ADDR + 0x0460)
+#define FCFTR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0468)
+#define ECMR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0500)
+#define RFLR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0508)
+#define ECSIPR(port) ? (BASE_IO_ADDR + 0x0518)
+#define PIR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0520)
+#define PIPR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x052c)
+#define APR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0554)
+#define MPR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0558)
+#define TPAUSER(port) ?(BASE_IO_ADDR + 0x0564)
+#define GECMR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x05b0)
+#define MAHR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x05C0)
+#define MALR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x05C8)
+
?#endif
?/*
?* Register's bits
?* Copy from Linux driver source code
?*/
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined (CONFIG_CPU_SH7734)
?/* EDSR */
?enum EDSR_BIT {
? ? ? ?EDSR_ENT = 0x01, EDSR_ENR = 0x02,
drivers/net/sh_eth.h +0 -0
@@ -205,11 +243,11 @@ enum EDSR_BIT {
?/* EDMR */
?enum DMAC_M_BIT {
? ? ? ?EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
drivers/net/sh_eth.h +2 -2
-#ifdef CONFIG_CPU_SH7763
- ? ? ? EDMR_SRST ? ? ? = 0x03,
+#if defined(CONFIG_CPU_SH7763) || defined (CONFIG_CPU_SH7734)
+ ? ? ? EDMR_SRST ? ? ? = 0x03, /* Receive/Send reset */
? ? ? ?EMDR_DESC_R ? ? = 0x30, /* Descriptor reserve size */ ? ? ? ?EDMR_EL ? ? ? ? = 0x40, /* Litte endian */
drivers/net/sh_eth.h +1 -1
-#elif defined(CONFIG_CPU_SH7757) ||defined (CONFIG_CPU_SH7724)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7724)
? ? ? ?EDMR_SRST ? ? ? = 0x01,
? ? ? ?EMDR_DESC_R ? ? = 0x30, /* Descriptor reserve size */ ? ? ? ?EDMR_EL ? ? ? ? = 0x40, /* Litte endian */
drivers/net/sh_eth.h +0 -0
@@ -223,7 +261,7 @@ enum DMAC_M_BIT {
 
?/* EDTRR */
?enum DMAC_T_BIT {
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?EDTRR_TRNS = 0x03,
?#else
? ? ? ?EDTRR_TRNS = 0x01,
drivers/net/sh_eth.h +0 -0
@@ -262,7 +300,8 @@ enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, };
 
?/* EESR */
?enum EESR_BIT {
drivers/net/sh_eth.h +2 -1
-#ifndef CONFIG_CPU_SH7763
+
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
? ? ? ?EESR_TWB ?= 0x40000000,
?#else
? ? ? ?EESR_TWB ?= 0xC0000000,
drivers/net/sh_eth.h +0 -0
@@ -272,14 +311,14 @@ enum EESR_BIT {
?#endif
? ? ? ?EESR_TABT = 0x04000000,
? ? ? ?EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000,
drivers/net/sh_eth.h +1 -1
-#ifndef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
? ? ? ?EESR_ADE ?= 0x00800000,
?#endif
? ? ? ?EESR_ECI ?= 0x00400000,
? ? ? ?EESR_FTC ?= 0x00200000, EESR_TDE ?= 0x00100000, ? ? ? ?EESR_TFE ?= 0x00080000, EESR_FRC ?= 0x00040000, ? ? ? ?EESR_RDE ?= 0x00020000, EESR_RFE ?= 0x00010000,
drivers/net/sh_eth.h +1 -1
-#ifndef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
? ? ? ?EESR_CND ?= 0x00000800,
?#endif
? ? ? ?EESR_DLC ?= 0x00000400,
drivers/net/sh_eth.h +1 -1
@@ -291,7 +330,7 @@ enum EESR_BIT {
 ?};
 
 
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ?# define TX_CHECK (EESR_TC1 | EESR_FTC)
 ?# define EESR_ERR_CHECK ? ? ? ?(EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \
 ? ? ? ? ? ? ? ?| EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI)
@@ -352,7 +391,7 @@ enum FCFTR_BIT {
?/* Transfer descriptor bit */
?enum TD_STS_BIT {
?#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \
- ? ? ? ? ? ? ? || defined(CONFIG_CPU_SH7724)
+ ? ? ? ? ? ? ? || defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7734)
? ? ? ?TD_TACT = 0x80000000,
?#else
? ? ? ?TD_TACT = 0x7fffffff,
drivers/net/sh_eth.h +0 -0
@@ -368,7 +407,7 @@ enum TD_STS_BIT {
 ?enum RECV_RST_BIT { RMCR_RST = 0x01, };
?/* ECMR */
?enum FELIC_MODE_BIT {
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?ECMR_TRCCM=0x04000000, ECMR_RCSC= 0x00800000, ECMR_DPAD= 0x00200000, ? ? ? ?ECMR_RZPF = 0x00100000,
?#endif
drivers/net/sh_eth.h +1 -1
@@ -383,7 +422,7 @@ enum FELIC_MODE_BIT {
 
 ?};
 
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ?#define ECMR_CHG_DM ? ?(ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \
 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ECMR_TXF | ECMR_MCT)
?#elif CONFIG_CPU_SH7757
drivers/net/sh_eth.h +0 -0
@@ -396,14 +435,14 @@ enum FELIC_MODE_BIT {
 
?/* ECSR */
?enum ECSR_STATUS_BIT {
drivers/net/sh_eth.h +1 -1
-#ifndef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
? ? ? ?ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10,
?#endif
? ? ? ?ECSR_LCHNG = 0x04,
? ? ? ?ECSR_MPD = 0x02, ECSR_ICD = 0x01,
?};
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
?# define ECSR_INIT (ECSR_ICD | ECSIPR_MPDIP)
?#else
?# define ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | \
drivers/net/sh_eth.h +0 -0
@@ -412,14 +451,20 @@ enum ECSR_STATUS_BIT {
 
?/* ECSIPR */
?enum ECSIPR_STATUS_MASK_BIT {
drivers/net/sh_eth.h +7 -3
-#ifndef CONFIG_CPU_SH7763
- ? ? ? ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10,
-#endif
+#if defined(CONFIG_CPU_SH7724)
+ ? ? ? ECSIPR_PSRTOIP = 0x10,
+ ? ? ? ECSIPR_LCHNGIP = 0x04,
+ ? ? ? ECSIPR_ICDIP = 0x01,
+#elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+ ? ? ? ECSIPR_PSRTOIP = 0x10,
+ ? ? ? ECSIPR_PHYIP = 0x08,
? ? ? ?ECSIPR_LCHNGIP = 0x04,
- ? ? ? ECSIPR_MPDIP = 0x02, ECSIPR_ICDIP = 0x01,
+ ? ? ? ECSIPR_MPDIP = 0x02,
+ ? ? ? ECSIPR_ICDIP = 0x01,
+#endif
?};
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
?# define ECSIPR_INIT (ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP) ?#else
?# define ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | \
drivers/net/sh_eth.h +1 -1
@@ -458,7 +503,7 @@ enum RPADIR_BIT {
 ? ? ? ?RPADIR_PADR = 0x0003f,
 ?};
 
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ?# define RPADIR_INIT (0x00)
?#else
?# define RPADIR_INIT (RPADIR_PADS1)
--
1.7.7.3

Signature · 3 lines

Nobuhiro Iwamatsu
?? iwamatsu at {nigauri.org / debian.org}
?? GPG ID: 40AD1FA6

Nobuhiro Iwamatsu

2012-05-22 05:03 UTC #5 lore raw

PATCH 1/1 net: sh_eth: Add support SH7734 Ethernet device

Ping.
Please pickup 'net: sh-eth: Add support Gigabit of SH7734' too.

Best regards,
Nobuhiro

2012/5/9 Nobuhiro Iwamatsu <[email protected]>:

Quoted 302 lines

Hi, Joe.
I have not noticed that ?inaugurated as you at the maintainer of net. Could you apply this patch to your u-boot-net repository?
Best regards,
?Nobuhiro
2012/2/3 Nobuhiro Iwamatsu <[email protected]>:
Quoted 281 lines
SH7734 has one channel ethernet device.
This support 10/100/1000Base, and RMII/MII/GMII.
And this has the same structure as SH7763.
Signed-off-by Nobuhiro Iwamatsu <[email protected]>
---
?drivers/net/sh_eth.c | ? 17 +++++-----
?drivers/net/sh_eth.h | ? 85 ++++++++++++++++++++++++++++++++++++++------------ ?2 files changed, 74 insertions(+), 28 deletions(-)
drivers/net/sh_eth.c +0 -0
index 8d3dac2..c1abe7c 100644
@@ -59,7 +59,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
 ? ? ? ?}
 
? ? ? ?/* packet must be a 4 byte boundary */
- ? ? ? if ((int)packet & (4 - 1)) {
+ ? ? ? if ((int)packet & 3) {
? ? ? ? ? ? ? ?printf(SHETHER_NAME ": %s: packet not 4 byte alligned\n", __func__); ? ? ? ? ? ? ? ?ret = -EFAULT;
? ? ? ? ? ? ? ?goto err;
drivers/net/sh_eth.c +1 -1
@@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev)
 ?static int sh_eth_reset(struct sh_eth_dev *eth)
 ?{
 ? ? ? ?int port = eth->port;
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ? ? ? ?int ret = 0, i;
 
? ? ? ?/* Start e-dmac transmitter and receiver */
drivers/net/sh_eth.c +0 -0
@@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
? ? ? ?/* Point the controller to the tx descriptor list. Must use physical ? ? ? ? ? addresses */
? ? ? ?outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
drivers/net/sh_eth.c +1 -1
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port)); ? ? ? ?outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
? ? ? ?outl(0x01, TDFFR(port));/* Last discriptor bit */
drivers/net/sh_eth.c +0 -0
@@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
 
? ? ? ?/* Point the controller to the rx descriptor list */ ? ? ? ?outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
drivers/net/sh_eth.c +1 -1
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port)); ? ? ? ?outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
? ? ? ?outl(RDFFR_RDLF, RDFFR(port));
drivers/net/sh_eth.c +2 -1
@@ -346,7 +346,8 @@ static int sh_eth_phy_config(struct sh_eth_dev *eth)
 ? ? ? ?struct eth_device *dev = port_info->dev;
 ? ? ? ?struct phy_device *phydev;
 
- ? ? ? phydev = phy_connect(miiphy_get_dev_by_name(dev->name),
+ ? ? ? phydev = phy_connect(
+ ? ? ? ? ? ? ? ? ? ? ? miiphy_get_dev_by_name(dev->name),
 ? ? ? ? ? ? ? ? ? ? ? ?port_info->phy_addr, dev, PHY_INTERFACE_MODE_MII);
 ? ? ? ?port_info->phydev = phydev;
 ? ? ? ?phy_config(phydev);
@@ -398,7 +399,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 ? ? ? ?outl(APR_AP, APR(port));
 ? ? ? ?outl(MPR_MP, MPR(port));
?#endif
drivers/net/sh_eth.c +1 -1
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?outl(TPAUSER_TPAUSE, TPAUSER(port));
?#elif defined(CONFIG_CPU_SH7757)
? ? ? ?outl(TPAUSER_UNLIMITED, TPAUSER(port));
drivers/net/sh_eth.c +0 -0
@@ -418,7 +419,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
? ? ? ?/* Set the transfer speed */
? ? ? ?if (phy->speed == 100) {
? ? ? ? ? ? ? ?printf(SHETHER_NAME ": 100Base/");
drivers/net/sh_eth.c +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ? ? ? ? ?outl(GECMR_100B, GECMR(port));
?#elif defined(CONFIG_CPU_SH7757)
? ? ? ? ? ? ? ?outl(1, RTRATE(port));
drivers/net/sh_eth.c +0 -0
@@ -427,7 +428,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
?#endif
? ? ? ?} else if (phy->speed == 10) {
? ? ? ? ? ? ? ?printf(SHETHER_NAME ": 10Base/");
drivers/net/sh_eth.c +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ? ? ? ? ?outl(GECMR_10B, GECMR(port));
?#elif defined(CONFIG_CPU_SH7757)
? ? ? ? ? ? ? ?outl(0, RTRATE(port));
drivers/net/sh_eth.h +38 -0
index 27fde05..1f646e2 100644
@@ -188,13 +188,51 @@ struct sh_eth_dev {
 ?#define TPAUSER(port) ?(BASE_IO_ADDR + 0x0164)
 ?#define MAHR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x01c0)
 ?#define MALR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x01c8)
+
+#elif defined(CONFIG_CPU_SH7734)
+#define BASE_IO_ADDR ? 0xFEE00000
+
+#define EDSR(port) ? ? ? ? ? ? (BASE_IO_ADDR)
+
+#define TDLAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0010)
+#define TDFAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0014)
+#define TDFXR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0018)
+#define TDFFR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x001c)
+#define RDLAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0030)
+#define RDFAR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0034)
+#define RDFXR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0038)
+#define RDFFR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x003c)
+
+#define EDMR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0400)
+#define EDTRR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0408)
+#define EDRRR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0410)
+#define EESR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0428)
+#define EESIPR(port) ? (BASE_IO_ADDR + 0x0430)
+#define TRSCER(port) ? (BASE_IO_ADDR + 0x0438)
+#define TFTR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0448)
+#define FDR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0450)
+#define RMCR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0458)
+#define RPADIR(port) ? (BASE_IO_ADDR + 0x0460)
+#define FCFTR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x0468)
+#define ECMR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0500)
+#define RFLR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x0508)
+#define ECSIPR(port) ? (BASE_IO_ADDR + 0x0518)
+#define PIR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0520)
+#define PIPR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x052c)
+#define APR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0554)
+#define MPR(port) ? ? ? ? ? ? ?(BASE_IO_ADDR + 0x0558)
+#define TPAUSER(port) ?(BASE_IO_ADDR + 0x0564)
+#define GECMR(port) ? ? ? ? ? ?(BASE_IO_ADDR + 0x05b0)
+#define MAHR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x05C0)
+#define MALR(port) ? ? ? ? ? ? (BASE_IO_ADDR + 0x05C8)
+
?#endif
?/*
?* Register's bits
?* Copy from Linux driver source code
?*/
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined (CONFIG_CPU_SH7734)
?/* EDSR */
?enum EDSR_BIT {
? ? ? ?EDSR_ENT = 0x01, EDSR_ENR = 0x02,
drivers/net/sh_eth.h +0 -0
@@ -205,11 +243,11 @@ enum EDSR_BIT {
?/* EDMR */
?enum DMAC_M_BIT {
? ? ? ?EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
drivers/net/sh_eth.h +2 -2
-#ifdef CONFIG_CPU_SH7763
- ? ? ? EDMR_SRST ? ? ? = 0x03,
+#if defined(CONFIG_CPU_SH7763) || defined (CONFIG_CPU_SH7734)
+ ? ? ? EDMR_SRST ? ? ? = 0x03, /* Receive/Send reset */
? ? ? ?EMDR_DESC_R ? ? = 0x30, /* Descriptor reserve size */ ? ? ? ?EDMR_EL ? ? ? ? = 0x40, /* Litte endian */
drivers/net/sh_eth.h +1 -1
-#elif defined(CONFIG_CPU_SH7757) ||defined (CONFIG_CPU_SH7724)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7724)
? ? ? ?EDMR_SRST ? ? ? = 0x01,
? ? ? ?EMDR_DESC_R ? ? = 0x30, /* Descriptor reserve size */ ? ? ? ?EDMR_EL ? ? ? ? = 0x40, /* Litte endian */
drivers/net/sh_eth.h +0 -0
@@ -223,7 +261,7 @@ enum DMAC_M_BIT {
 
?/* EDTRR */
?enum DMAC_T_BIT {
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?EDTRR_TRNS = 0x03,
?#else
? ? ? ?EDTRR_TRNS = 0x01,
drivers/net/sh_eth.h +0 -0
@@ -262,7 +300,8 @@ enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, };
 
?/* EESR */
?enum EESR_BIT {
drivers/net/sh_eth.h +2 -1
-#ifndef CONFIG_CPU_SH7763
+
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
? ? ? ?EESR_TWB ?= 0x40000000,
?#else
? ? ? ?EESR_TWB ?= 0xC0000000,
drivers/net/sh_eth.h +0 -0
@@ -272,14 +311,14 @@ enum EESR_BIT {
?#endif
? ? ? ?EESR_TABT = 0x04000000,
? ? ? ?EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000,
drivers/net/sh_eth.h +1 -1
-#ifndef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
? ? ? ?EESR_ADE ?= 0x00800000,
?#endif
? ? ? ?EESR_ECI ?= 0x00400000,
? ? ? ?EESR_FTC ?= 0x00200000, EESR_TDE ?= 0x00100000, ? ? ? ?EESR_TFE ?= 0x00080000, EESR_FRC ?= 0x00040000, ? ? ? ?EESR_RDE ?= 0x00020000, EESR_RFE ?= 0x00010000,
drivers/net/sh_eth.h +1 -1
-#ifndef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
? ? ? ?EESR_CND ?= 0x00000800,
?#endif
? ? ? ?EESR_DLC ?= 0x00000400,
drivers/net/sh_eth.h +1 -1
@@ -291,7 +330,7 @@ enum EESR_BIT {
 ?};
 
 
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ?# define TX_CHECK (EESR_TC1 | EESR_FTC)
 ?# define EESR_ERR_CHECK ? ? ? ?(EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \
 ? ? ? ? ? ? ? ?| EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI)
@@ -352,7 +391,7 @@ enum FCFTR_BIT {
?/* Transfer descriptor bit */
?enum TD_STS_BIT {
?#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \
- ? ? ? ? ? ? ? || defined(CONFIG_CPU_SH7724)
+ ? ? ? ? ? ? ? || defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7734)
? ? ? ?TD_TACT = 0x80000000,
?#else
? ? ? ?TD_TACT = 0x7fffffff,
drivers/net/sh_eth.h +0 -0
@@ -368,7 +407,7 @@ enum TD_STS_BIT {
 ?enum RECV_RST_BIT { RMCR_RST = 0x01, };
?/* ECMR */
?enum FELIC_MODE_BIT {
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
? ? ? ?ECMR_TRCCM=0x04000000, ECMR_RCSC= 0x00800000, ECMR_DPAD= 0x00200000, ? ? ? ?ECMR_RZPF = 0x00100000,
?#endif
drivers/net/sh_eth.h +1 -1
@@ -383,7 +422,7 @@ enum FELIC_MODE_BIT {
 
 ?};
 
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ?#define ECMR_CHG_DM ? ?(ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \
 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ECMR_TXF | ECMR_MCT)
?#elif CONFIG_CPU_SH7757
drivers/net/sh_eth.h +0 -0
@@ -396,14 +435,14 @@ enum FELIC_MODE_BIT {
 
?/* ECSR */
?enum ECSR_STATUS_BIT {
drivers/net/sh_eth.h +1 -1
-#ifndef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
? ? ? ?ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10,
?#endif
? ? ? ?ECSR_LCHNG = 0x04,
? ? ? ?ECSR_MPD = 0x02, ECSR_ICD = 0x01,
?};
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
?# define ECSR_INIT (ECSR_ICD | ECSIPR_MPDIP)
?#else
?# define ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | \
drivers/net/sh_eth.h +0 -0
@@ -412,14 +451,20 @@ enum ECSR_STATUS_BIT {
 
?/* ECSIPR */
?enum ECSIPR_STATUS_MASK_BIT {
drivers/net/sh_eth.h +7 -3
-#ifndef CONFIG_CPU_SH7763
- ? ? ? ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10,
-#endif
+#if defined(CONFIG_CPU_SH7724)
+ ? ? ? ECSIPR_PSRTOIP = 0x10,
+ ? ? ? ECSIPR_LCHNGIP = 0x04,
+ ? ? ? ECSIPR_ICDIP = 0x01,
+#elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+ ? ? ? ECSIPR_PSRTOIP = 0x10,
+ ? ? ? ECSIPR_PHYIP = 0x08,
? ? ? ?ECSIPR_LCHNGIP = 0x04,
- ? ? ? ECSIPR_MPDIP = 0x02, ECSIPR_ICDIP = 0x01,
+ ? ? ? ECSIPR_MPDIP = 0x02,
+ ? ? ? ECSIPR_ICDIP = 0x01,
+#endif
?};
drivers/net/sh_eth.h +1 -1
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
?# define ECSIPR_INIT (ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP) ?#else
?# define ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | \
drivers/net/sh_eth.h +1 -1
@@ -458,7 +503,7 @@ enum RPADIR_BIT {
 ? ? ? ?RPADIR_PADR = 0x0003f,
 ?};
 
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 ?# define RPADIR_INIT (0x00)
Quoted 5 lines
?#else
?# define RPADIR_INIT (RPADIR_PADS1)
--
1.7.7.3
--
Nobuhiro Iwamatsu
?? iwamatsu at {nigauri.org / debian.org}
?? GPG ID: 40AD1FA6

Signature · 3 lines

Nobuhiro Iwamatsu
?? iwamatsu at {nigauri.org / debian.org}
?? GPG ID: 40AD1FA6

Joe Hershberger

Applied

2012-05-23 20:17 UTC #6 lore raw

PATCH 1/1 net: sh_eth: Add support SH7734 Ethernet device

In reply to Nobuhiro Iwamatsu

Hi Nobuhiro Iwamatsu,

Quoted 5 lines · Nobuhiro Iwamatsu

SH7734 has one channel ethernet device.
This support 10/100/1000Base, and RMII/MII/GMII.
And this has the same structure as SH7763.
Signed-off-by Nobuhiro Iwamatsu <[email protected]>

In the future, please run tools/checkpatch.pl on your patches before submitting. I fixed 2 failures for you.

Applied, thanks.

-Joe

Nobuhiro Iwamatsu

author

2012-05-24 00:41 UTC #7 lore raw

PATCH 1/1 net: sh_eth: Add support SH7734 Ethernet device

Joe Hershberger ????????:

Quoted 8 lines

Hi Nobuhiro Iwamatsu,
Quoted 4 lines · Nobuhiro Iwamatsu
SH7734 has one channel ethernet device.
This support 10/100/1000Base, and RMII/MII/GMII.
And this has the same structure as SH7763.

Quoted 7 lines

Quoted 1 line
Signed-off-by Nobuhiro Iwamatsu <[email protected]>
In the future, please run tools/checkpatch.pl on your patches before submitting. I fixed 2 failures for you.
Applied, thanks.

sorry and thanks!

Best regards,
Nobuhiro