new chiefriver BSP metadata

new file mode 100644
index 0000000..eebec13
@@ -0,0 +1,12 @@
+define KMACHINE chiefriver
+define KTYPE preempt-rt
+define KARCH x86_64
+
+# no new branch required, re-use the ktypes/preempt-rt branch
+include ktypes/preempt-rt
+include bsp/common-pc-64/common-pc-64.scc
+
+include chiefriver.scc
+
+# default policy for preempt-rt kernels
+include features/logbuf/size-normal.scc

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index 0000000..6e03b8c
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+define KMACHINE chiefriver
+define KTYPE standard
+define KARCH x86_64
+
+include bsp/common-pc-64/common-pc-64-standard
+branch chiefriver
+
+include chiefriver.scc
+
+# default policy for standard kernels
+include features/logbuf/size-normal.scc

new file mode 100644
index 0000000..190c1cb
@@ -0,0 +1,35 @@
+CONFIG_PRINTK=y
+
+# Basic hardware support for the box - network, PCI, sound
+CONFIG_NETDEVICES=y
+CONFIG_ATA=y
+CONFIG_ATA_GENERIC=y
+CONFIG_ATA_SFF=y
+CONFIG_PCI=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_R8169=y
+CONFIG_PATA_SCH=y
+CONFIG_MMC_SDHCI_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_NET=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_HDA_INTEL=y
+CONFIG_SND_HDA_CODEC_REALTEK=y
+
+# Make sure these are on, otherwise the bootup won't be fun
+CONFIG_EXT3_FS=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_MODULES=y
+CONFIG_SHMEM=y
+CONFIG_TMPFS=y
+CONFIG_PACKET=y
+
+CONFIG_I2C=y
+CONFIG_AGP=y
+CONFIG_PM=y
+CONFIG_ACPI=y
+CONFIG_INPUT=y

new file mode 100644
index 0000000..fbf4156
@@ -0,0 +1,7 @@
+kconf hardware chiefriver.cfg
+
+include features/i915/i915.scc
+include features/serial/8250.scc
+include features/power/intel.scc
+
+include features/usb/xhci-hcd.scc

new file mode 100644
index 0000000..f1f7c08
@@ -0,0 +1,81 @@
+From 83b7f9ac9126f0532ca34c14e4f0582c565c6b0d Mon Sep 17 00:00:00 2001
+From: Eugeni Dodonov <[email protected]>
+Date: Fri, 23 Mar 2012 11:57:18 -0300
+Subject: [PATCH] drm/i915: allow to select rc6 modes via kernel parameter
+
+This allows to select which rc6 modes are to be used via kernel parameter,
+via a bitmask parameter. E.g.:
+
+- to enable rc6, i915_enable_rc6=1
+- to enable rc6 and deep rc6, i915_enable_rc6=3
+- to enable rc6 and deepest rc6, use i915_enable_rc6=5
+- to enable rc6, deep and deepest rc6, use i915_enable_rc6=7
+
+Please keep in mind that the deepest RC6 state really should NOT be used
+by default, as it could potentially worsen the issues with deep RC6. So do
+enable it only when you know what you are doing. However, having it around
+could help solving possible future rc6-related issues and their debugging
+on user machines.
+
+Note that this changes behavior - previously, value of 1 would enable both
+RC6 and deep RC6. Now it should only enable RC6 and deep/deepest RC6
+stages must be enabled manually.
+
+v2: address Chris Wilson comments and clean up the code.
+
+References: https://bugs.freedesktop.org/show_bug.cgi?id=42579
+Reviewed-by: Chris Wilson <[email protected]>
+Reviewed-by: Ben Widawsky <[email protected]>
+Signed-off-by: Eugeni Dodonov <[email protected]>
+Signed-off-by: Daniel Vetter <[email protected]>
+Integrated-by: Tom Zanussi <[email protected]>
+
+Index: linux/drivers/gpu/drm/i915/i915_drv.c
+===================================================================
+--- linux.orig/drivers/gpu/drm/i915/i915_drv.c	2012-05-24 15:21:16.216263416 -0500
++++ linux/drivers/gpu/drm/i915/i915_drv.c	2012-05-24 15:21:42.386496572 -0500
+@@ -66,7 +66,11 @@
+ int i915_enable_rc6 __read_mostly = -1;
+ module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
+ MODULE_PARM_DESC(i915_enable_rc6,
+-		"Enable power-saving render C-state 6 (default: -1 (use per-chip default)");
++		"Enable power-saving render C-state 6. "
++		"Different stages can be selected via bitmask values "
++		"(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
++		"For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
++		"default: -1 (use per-chip default)");
+ 
+ int i915_enable_fbc __read_mostly = -1;
+ module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
+Index: linux/drivers/gpu/drm/i915/i915_drv.h
+===================================================================
+--- linux.orig/drivers/gpu/drm/i915/i915_drv.h	2012-05-24 15:21:23.926268189 -0500
++++ linux/drivers/gpu/drm/i915/i915_drv.h	2012-05-24 15:21:42.396308725 -0500
+@@ -1003,6 +1003,27 @@
+ 
+ #include "i915_trace.h"
+ 
++/**
++ * RC6 is a special power stage which allows the GPU to enter an very
++ * low-voltage mode when idle, using down to 0V while at this stage.  This
++ * stage is entered automatically when the GPU is idle when RC6 support is
++ * enabled, and as soon as new workload arises GPU wakes up automatically as well.
++ *
++ * There are different RC6 modes available in Intel GPU, which differentiate
++ * among each other with the latency required to enter and leave RC6 and
++ * voltage consumed by the GPU in different states.
++ *
++ * The combination of the following flags define which states GPU is allowed
++ * to enter, while RC6 is the normal RC6 state, RC6p is the deep RC6, and
++ * RC6pp is deepest RC6. Their support by hardware varies according to the
++ * GPU, BIOS, chipset and platform. RC6 is usually the safest one and the one
++ * which brings the most power savings; deeper states save more power, but
++ * require higher latency to switch to and wake up.
++ */
++#define INTEL_RC6_ENABLE			(1<<0)
++#define INTEL_RC6p_ENABLE			(1<<1)
++#define INTEL_RC6pp_ENABLE			(1<<2)
++
+ extern struct drm_ioctl_desc i915_ioctls[];
+ extern int i915_max_ioctl;
+ extern unsigned int i915_fbpercrtc __always_unused;

new file mode 100644
index 0000000..8c9a9b5
@@ -0,0 +1,5 @@
+patch snb-disable-rc6p.patch
+patch snb-disable-rc6p-fix-precedence.patch
+patch rc6-kernel-params.patch
+patch snb-enable-rc6.patch
+

new file mode 100644
index 0000000..e3e90b4
@@ -0,0 +1,26 @@
+From c0e2ee1bc0cf82eec89e26b7afe7e4db0561b7d9 Mon Sep 17 00:00:00 2001
+From: Eugeni Dodonov <[email protected]>
+Date: Thu, 23 Feb 2012 23:57:06 -0200
+Subject: [PATCH] drm/i915: fix operator precedence when enabling RC6p
+
+As noticed by Torsten Kaiser, the operator precedence can play tricks with
+us here.
+
+CC: Dave Airlie <[email protected]>
+Signed-off-by: Eugeni Dodonov <[email protected]>
+Signed-off-by: Jesse Barnes <[email protected]>
+Integrated-by: Tom Zanussi <[email protected]>
+
+Index: linux/drivers/gpu/drm/i915/intel_display.c
+===================================================================
+--- linux.orig/drivers/gpu/drm/i915/intel_display.c	2012-05-24 15:20:19.456911719 -0500
++++ linux/drivers/gpu/drm/i915/intel_display.c	2012-05-24 15:20:27.786724609 -0500
+@@ -7970,7 +7970,7 @@
+ 
+ 	if (intel_enable_rc6(dev_priv->dev))
+ 		rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
+-			(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
++			((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
+ 
+ 	I915_WRITE(GEN6_RC_CONTROL,
+ 		   rc6_mask |

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index 0000000..d3afd3a
@@ -0,0 +1,39 @@
+From 1c8ecf80fdee4e7b23a9e7da7ff9bd59ba2dcf96 Mon Sep 17 00:00:00 2001
+From: Eugeni Dodonov <[email protected]>
+Date: Tue, 14 Feb 2012 11:44:48 -0200
+Subject: [PATCH] drm/i915: do not enable RC6p on Sandy Bridge
+
+With base on latest findings, RC6p seems to be respondible for RC6-related
+issues on Sandy Bridge platform. To work-around those issues, the previous
+solution was to completely disable RC6 on Sandy Bridge for the past few
+releases, even if plain RC6 was not giving any issues.
+
+What this patch does is preventing RC6p from being enabled on Sandy Bridge
+even if users enable RC6 via a kernel parameter. So it won't change the
+defaults in any way, but will ensure that if users do enable RC6 manually
+it won't break their machines by enabling this extra state.
+
+Proper fix for this (enabling specific RC6 states according to the GPU
+generation) were proposed for the -next kernel, but we are too late in the
+release process now to pick such changes.
+
+Acked-by: Keith Packard <[email protected]>
+Signed-off-by: Eugeni Dodonov <[email protected]>
+Signed-off-by: Jesse Barnes <[email protected]>
+Integrated-by: Tom Zanussi <[email protected]>
+
+Index: linux/drivers/gpu/drm/i915/intel_display.c
+===================================================================
+--- linux.orig/drivers/gpu/drm/i915/intel_display.c	2012-05-24 14:35:19.446261789 -0500
++++ linux/drivers/gpu/drm/i915/intel_display.c	2012-05-24 14:35:44.906278169 -0500
+@@ -7969,8 +7969,8 @@
+ 	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
+ 
+ 	if (intel_enable_rc6(dev_priv->dev))
+-		rc6_mask = GEN6_RC_CTL_RC6p_ENABLE |
+-			GEN6_RC_CTL_RC6_ENABLE;
++		rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
++			(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
+ 
+ 	I915_WRITE(GEN6_RC_CONTROL,
+ 		   rc6_mask |

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