MX28: Fix a typo in mx28_reg_8 macro

PATCH New Otavio Salvador 3 participants 12 messages May 11, 2012 – Jun 13, 2012

Subsystems (5)

Arm (32-bit) USB Arm i.MX and Layerscape GPIO +1 more subsystems

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Otavio Salvador

author

2012-05-11 15:37 UTC #0 lore raw

PATCH 1/8 MX28: Fix a typo in mx28_reg_8 macro

The macro mistakenly referred to 32bit struct instead of 8bit one.

Signed-off-by Otavio Salvador <[email protected]>

Cc Fabio Estevam <[email protected]>

Cc Marek Vasut <[email protected]>

---
 arch/arm/include/asm/arch-mx28/regs-common.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/include/asm/arch-mx28/regs-common.h +1 -1

index 94b512d..d2e1953 100644
@@ -70,7 +70,7 @@ struct mx28_register_32 {
 #define	mx28_reg_8(name)				\
 	union {						\
 		struct { __mx28_reg_8(name) };		\
-		struct mx28_register_32 name##_reg;	\
+		struct mx28_register_8 name##_reg;	\
 	};
 
 #define	mx28_reg_32(name)				\

Signature · 1 line

1.7.10

Otavio Salvador

author

2012-05-11 15:38 UTC #1 lore raw

PATCH 2/8 m28evk: use same notation to alloc the 128kB stack

Signed-off-by Otavio Salvador <[email protected]>

---
 include/configs/m28evk.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

include/configs/m28evk.h +1 -1

index c62f4d0..7472ddc 100644
@@ -88,7 +88,7 @@
 #define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define	PHYS_SDRAM_1			0x40000000	/* Base address */
 #define	PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
-#define	CONFIG_STACKSIZE		0x00010000	/* 128 KB stack */
+#define	CONFIG_STACKSIZE		(128 * 1024)	/* 128 KB stack */
 #define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
 #define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
 #define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */

Signature · 1 line

1.7.10

Otavio Salvador

author

2012-05-11 15:38 UTC #2 lore raw

PATCH 3/8 m28evk: use "M28EVK U-Boot =>" as prompt

In reply to Otavio Salvador

Signed-off-by Otavio Salvador <[email protected]>

---
 include/configs/m28evk.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

include/configs/m28evk.h +1 -1

index 7472ddc..ebf7e39 100644
@@ -114,7 +114,7 @@
  * U-Boot general configurations
  */
 #define	CONFIG_SYS_LONGHELP
-#define	CONFIG_SYS_PROMPT	"=> "
+#define	CONFIG_SYS_PROMPT	"M28EVK U-Boot => "
 #define	CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
 #define	CONFIG_SYS_PBSIZE	\
 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

Signature · 1 line

1.7.10

Otavio Salvador

author

2012-05-11 15:38 UTC #3 lore raw

PATCH 4/8 mx28evk: ensure command definition is in alphabetic order

In reply to Otavio Salvador

Signed-off-by Otavio Salvador <[email protected]>

---
 include/configs/mx28evk.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

include/configs/mx28evk.h +1 -1

index 0c18e50..5ccfe70 100644
@@ -54,11 +54,11 @@
 #include <config_cmd_default.h>
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_FAT
 
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
 #define CONFIG_CMD_GPIO
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_MMC

Signature · 1 line

1.7.10

Otavio Salvador

author

2012-05-11 15:38 UTC #4 lore raw

PATCH 5/8 mxsboot: stop referring to i.MX28 as this ought to work for all i.MXS SoCs

In reply to Otavio Salvador

Signed-off-by Otavio Salvador <[email protected]>

---
 tools/mxsboot.c |  110 +++++++++++++++++++++++++++----------------------------
 1 file changed, 55 insertions(+), 55 deletions(-)

tools/mxsboot.c +55 ~~-55~~

index 6c05aa4..9661a48 100644
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 image generator
+ * Freescale i.MXS image generator
  *
  * Copyright (C) 2011 Marek Vasut <[email protected]>
  * on behalf of DENX Software Engineering GmbH

@@ -60,13 +60,13 @@ uint32_t sd_sector = 2048;
  */
 #define	MAX_BOOTSTREAM_SIZE	(1 * 1024 * 1024)
 
-/* i.MX28 NAND controller-specific constants. DO NOT TWEAK! */
+/* i.MXS NAND controller-specific constants. DO NOT TWEAK! */
 #define	MXS_NAND_DMA_DESCRIPTOR_COUNT		4
 #define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE		512
 #define	MXS_NAND_METADATA_SIZE			10
 #define	MXS_NAND_COMMAND_BUFFER_SIZE		32
 
-struct mx28_nand_fcb {
+struct mxs_nand_fcb {
 	uint32_t		checksum;
 	uint32_t		fingerprint;
 	uint32_t		version;

@@ -111,7 +111,7 @@ struct mx28_nand_fcb {
 	uint32_t		bb_marker_physical_offset;
 };
 
-struct mx28_nand_dbbt {
+struct mxs_nand_dbbt {
 	uint32_t		checksum;
 	uint32_t		fingerprint;
 	uint32_t		version;

@@ -119,13 +119,13 @@ struct mx28_nand_dbbt {
 	uint32_t		number_2k_pages_bb;
 };
 
-struct mx28_nand_bbt {
+struct mxs_nand_bbt {
 	uint32_t		nand;
 	uint32_t		number_bb;
 	uint32_t		badblock[510];
 };
 
-struct mx28_sd_drive_info {
+struct mxs_sd_drive_info {
 	uint32_t		chip_num;
 	uint32_t		drive_type;
 	uint32_t		tag;

@@ -133,20 +133,20 @@ struct mx28_sd_drive_info {
 	uint32_t		sector_count;
 };
 
-struct mx28_sd_config_block {
+struct mxs_sd_config_block {
 	uint32_t			signature;
 	uint32_t			primary_boot_tag;
 	uint32_t			secondary_boot_tag;
 	uint32_t			num_copies;
-	struct mx28_sd_drive_info	drv_info[1];
+	struct mxs_sd_drive_info	drv_info[1];
 };
 
-static inline uint32_t mx28_nand_ecc_size_in_bits(uint32_t ecc_strength)
+static inline uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength)
 {
 	return ecc_strength * 13;
 }
 
-static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size,
+static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
 						uint32_t page_oob_size)
 {
 	if (page_data_size == 2048)

@@ -163,7 +163,7 @@ static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size,
 	return 0;
 }
 
-static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,
+static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
 						uint32_t ecc_strength)
 {
 	uint32_t chunk_data_size_in_bits;

@@ -174,7 +174,7 @@ static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,
 	uint32_t block_mark_bit_offset;
 
 	chunk_data_size_in_bits = MXS_NAND_CHUNK_DATA_CHUNK_SIZE * 8;
-	chunk_ecc_size_in_bits  = mx28_nand_ecc_size_in_bits(ecc_strength);
+	chunk_ecc_size_in_bits  = mxs_nand_ecc_size_in_bits(ecc_strength);
 
 	chunk_total_size_in_bits =
 			chunk_data_size_in_bits + chunk_ecc_size_in_bits;

@@ -212,21 +212,21 @@ static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,
 	return block_mark_bit_offset;
 }
 
-static inline uint32_t mx28_nand_mark_byte_offset(void)
+static inline uint32_t mxs_nand_mark_byte_offset(void)
 {
 	uint32_t ecc_strength;
-	ecc_strength = mx28_nand_get_ecc_strength(nand_writesize, nand_oobsize);
-	return mx28_nand_get_mark_offset(nand_writesize, ecc_strength) >> 3;
+	ecc_strength = mxs_nand_get_ecc_strength(nand_writesize, nand_oobsize);
+	return mxs_nand_get_mark_offset(nand_writesize, ecc_strength) >> 3;
 }
 
-static inline uint32_t mx28_nand_mark_bit_offset(void)
+static inline uint32_t mxs_nand_mark_bit_offset(void)
 {
 	uint32_t ecc_strength;
-	ecc_strength = mx28_nand_get_ecc_strength(nand_writesize, nand_oobsize);
-	return mx28_nand_get_mark_offset(nand_writesize, ecc_strength) & 0x7;
+	ecc_strength = mxs_nand_get_ecc_strength(nand_writesize, nand_oobsize);
+	return mxs_nand_get_mark_offset(nand_writesize, ecc_strength) & 0x7;
 }
 
-static uint32_t mx28_nand_block_csum(uint8_t *block, uint32_t size)
+static uint32_t mxs_nand_block_csum(uint8_t *block, uint32_t size)
 {
 	uint32_t csum = 0;
 	int i;

@@ -237,9 +237,9 @@ static uint32_t mx28_nand_block_csum(uint8_t *block, uint32_t size)
 	return csum ^ 0xffffffff;
 }
 
-static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t size)
+static struct mxs_nand_fcb *mxs_nand_get_fcb(uint32_t size)
 {
-	struct mx28_nand_fcb *fcb;
+	struct mxs_nand_fcb *fcb;
 	uint32_t bcb_size_bytes;
 	uint32_t stride_size_bytes;
 	uint32_t bootstream_size_pages;

@@ -248,7 +248,7 @@ static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t size)
 
 	fcb = malloc(nand_writesize);
 	if (!fcb) {
-		printf("MX28 NAND: Unable to allocate FCB\n");
+		printf("MXS NAND: Unable to allocate FCB\n");
 		return NULL;
 	}

@@ -289,15 +289,15 @@ static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t size)
 	}
 
 	if (fcb->ecc_block_n_ecc_type == 0) {
-		printf("MX28 NAND: Unsupported NAND geometry\n");
+		printf("MXS NAND: Unsupported NAND geometry\n");
 		goto err;
 	}
 
 	fcb->boot_patch =			0;
 	fcb->patch_sectors =			0;
 
-	fcb->badblock_marker_byte =	mx28_nand_mark_byte_offset();
-	fcb->badblock_marker_start_bit = mx28_nand_mark_bit_offset();
+	fcb->badblock_marker_byte =	mxs_nand_mark_byte_offset();
+	fcb->badblock_marker_start_bit = mxs_nand_mark_bit_offset();
 	fcb->bb_marker_physical_offset = nand_writesize;
 
 	stride_size_bytes = STRIDE_PAGES * nand_writesize;

@@ -324,13 +324,13 @@ err:
 	return NULL;
 }
 
-static struct mx28_nand_dbbt *mx28_nand_get_dbbt(void)
+static struct mxs_nand_dbbt *mxs_nand_get_dbbt(void)
 {
-	struct mx28_nand_dbbt *dbbt;
+	struct mxs_nand_dbbt *dbbt;
 
 	dbbt = malloc(nand_writesize);
 	if (!dbbt) {
-		printf("MX28 NAND: Unable to allocate DBBT\n");
+		printf("MXS NAND: Unable to allocate DBBT\n");
 		return NULL;
 	}

@@ -342,7 +342,7 @@ static struct mx28_nand_dbbt *mx28_nand_get_dbbt(void)
 	return dbbt;
 }
 
-static inline uint8_t mx28_nand_parity_13_8(const uint8_t b)
+static inline uint8_t mxs_nand_parity_13_8(const uint8_t b)
 {
 	uint32_t parity = 0, tmp;

@@ -365,7 +365,7 @@ static inline uint8_t mx28_nand_parity_13_8(const uint8_t b)
 	return parity;
 }
 
-static uint8_t *mx28_nand_fcb_block(struct mx28_nand_fcb *fcb)
+static uint8_t *mxs_nand_fcb_block(struct mxs_nand_fcb *fcb)
 {
 	uint8_t *block;
 	uint8_t *ecc;

@@ -373,36 +373,36 @@ static uint8_t *mx28_nand_fcb_block(struct mx28_nand_fcb *fcb)
 
 	block = malloc(nand_writesize + nand_oobsize);
 	if (!block) {
-		printf("MX28 NAND: Unable to allocate FCB block\n");
+		printf("MXS NAND: Unable to allocate FCB block\n");
 		return NULL;
 	}
 
 	memset(block, 0, nand_writesize + nand_oobsize);
 
 	/* Update the FCB checksum */
-	fcb->checksum = mx28_nand_block_csum(((uint8_t *)fcb) + 4, 508);
+	fcb->checksum = mxs_nand_block_csum(((uint8_t *)fcb) + 4, 508);
 
-	/* Figure 12-11. in iMX28RM, rev. 1, says FCB is at offset 12 */
-	memcpy(block + 12, fcb, sizeof(struct mx28_nand_fcb));
+	/* Figure 12-11. in iMXSRM, rev. 1, says FCB is at offset 12 */
+	memcpy(block + 12, fcb, sizeof(struct mxs_nand_fcb));
 
 	/* ECC is at offset 12 + 512 */
 	ecc = block + 12 + 512;
 
 	/* Compute the ECC parity */
-	for (i = 0; i < sizeof(struct mx28_nand_fcb); i++)
-		ecc[i] = mx28_nand_parity_13_8(block[i + 12]);
+	for (i = 0; i < sizeof(struct mxs_nand_fcb); i++)
+		ecc[i] = mxs_nand_parity_13_8(block[i + 12]);
 
 	return block;
 }
 
-static int mx28_nand_write_fcb(struct mx28_nand_fcb *fcb, char *buf)
+static int mxs_nand_write_fcb(struct mxs_nand_fcb *fcb, char *buf)
 {
 	uint32_t offset;
 	uint8_t *fcbblock;
 	int ret = 0;
 	int i;
 
-	fcbblock = mx28_nand_fcb_block(fcb);
+	fcbblock = mxs_nand_fcb_block(fcb);
 	if (!fcbblock)
 		return -1;

@@ -415,20 +415,20 @@ static int mx28_nand_write_fcb(struct mx28_nand_fcb *fcb, char *buf)
 	return ret;
 }
 
-static int mx28_nand_write_dbbt(struct mx28_nand_dbbt *dbbt, char *buf)
+static int mxs_nand_write_dbbt(struct mxs_nand_dbbt *dbbt, char *buf)
 {
 	uint32_t offset;
 	int i = STRIDE_PAGES * STRIDE_COUNT;
 
 	for (; i < 2 * STRIDE_PAGES * STRIDE_COUNT; i += STRIDE_PAGES) {
 		offset = i * nand_writesize;
-		memcpy(buf + offset, dbbt, sizeof(struct mx28_nand_dbbt));
+		memcpy(buf + offset, dbbt, sizeof(struct mxs_nand_dbbt));
 	}
 
 	return 0;
 }
 
-static int mx28_nand_write_firmware(struct mx28_nand_fcb *fcb, int infd,
+static int mxs_nand_write_firmware(struct mxs_nand_fcb *fcb, int infd,
 					char *buf)
 {
 	int ret;

@@ -454,7 +454,7 @@ void usage(void)
 {
 	printf(
 		"Usage: mxsboot [ops] <type> <infile> <outfile>\n"
-		"Augment BootStream file with a proper header for i.MX28 boot\n"
+		"Augment BootStream file with a proper header for i.MXS boot\n"
 		"\n"
 		"  <type>	type of image:\n"
 		"                 \"nand\" for NAND image\n"

@@ -473,10 +473,10 @@ void usage(void)
 	);
 }
 
-static int mx28_create_nand_image(int infd, int outfd)
+static int mxs_create_nand_image(int infd, int outfd)
 {
-	struct mx28_nand_fcb *fcb;
-	struct mx28_nand_dbbt *dbbt;
+	struct mxs_nand_fcb *fcb;
+	struct mxs_nand_dbbt *dbbt;
 	int ret = -1;
 	char *buf;
 	int size;

@@ -492,31 +492,31 @@ static int mx28_create_nand_image(int infd, int outfd)
 
 	memset(buf, 0, size);
 
-	fcb = mx28_nand_get_fcb(MAX_BOOTSTREAM_SIZE);
+	fcb = mxs_nand_get_fcb(MAX_BOOTSTREAM_SIZE);
 	if (!fcb) {
 		printf("Unable to compile FCB\n");
 		goto err1;
 	}
 
-	dbbt = mx28_nand_get_dbbt();
+	dbbt = mxs_nand_get_dbbt();
 	if (!dbbt) {
 		printf("Unable to compile DBBT\n");
 		goto err2;
 	}
 
-	ret = mx28_nand_write_fcb(fcb, buf);
+	ret = mxs_nand_write_fcb(fcb, buf);
 	if (ret) {
 		printf("Unable to write FCB to buffer\n");
 		goto err3;
 	}
 
-	ret = mx28_nand_write_dbbt(dbbt, buf);
+	ret = mxs_nand_write_dbbt(dbbt, buf);
 	if (ret) {
 		printf("Unable to write DBBT to buffer\n");
 		goto err3;
 	}
 
-	ret = mx28_nand_write_firmware(fcb, infd, buf);
+	ret = mxs_nand_write_firmware(fcb, infd, buf);
 	if (ret) {
 		printf("Unable to write firmware to buffer\n");
 		goto err3;

@@ -540,14 +540,14 @@ err0:
 	return ret;
 }
 
-static int mx28_create_sd_image(int infd, int outfd)
+static int mxs_create_sd_image(int infd, int outfd)
 {
 	int ret = -1;
 	uint32_t *buf;
 	int size;
 	off_t fsize;
 	ssize_t wr_size;
-	struct mx28_sd_config_block *cb;
+	struct mxs_sd_config_block *cb;
 
 	fsize = lseek(infd, 0, SEEK_END);
 	lseek(infd, 0, SEEK_SET);

@@ -565,7 +565,7 @@ static int mx28_create_sd_image(int infd, int outfd)
 		goto err1;
 	}
 
-	cb = (struct mx28_sd_config_block *)buf;
+	cb = (struct mxs_sd_config_block *)buf;
 
 	cb->signature = 0x00112233;
 	cb->primary_boot_tag = 0x1;

@@ -675,9 +675,9 @@ int main(int argc, char **argv)
 	}
 
 	if (!strcmp(argv[offset], "sd"))
-		ret = mx28_create_sd_image(infd, outfd);
+		ret = mxs_create_sd_image(infd, outfd);
 	else if (!strcmp(argv[offset], "nand"))
-		ret = mx28_create_nand_image(infd, outfd);
+		ret = mxs_create_nand_image(infd, outfd);
 
 	close(outfd);
 err2:

Signature · 1 line

1.7.10

Otavio Salvador

author

2012-05-11 15:38 UTC #5 lore raw

PATCH 6/8 mxs: reorganize source directory for easy sharing of code among i.MXS SoCs

In reply to Otavio Salvador

Most code can be shared amount i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them.

Signed-off-by Otavio Salvador <[email protected]>

---
 arch/arm/cpu/arm926ejs/mx28/Makefile          |   50 -
 arch/arm/cpu/arm926ejs/mx28/clock.c           |  339 -------
 arch/arm/cpu/arm926ejs/mx28/iomux.c           |  109 ---
 arch/arm/cpu/arm926ejs/mx28/mx28.c            |  310 ------
 arch/arm/cpu/arm926ejs/mx28/mx28_init.h       |   45 -
 arch/arm/cpu/arm926ejs/mx28/spl_boot.c        |  135 ---
 arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c    |  242 -----
 arch/arm/cpu/arm926ejs/mx28/spl_power_init.c  | 1007 -------------------
 arch/arm/cpu/arm926ejs/mx28/start.S           |  247 -----
 arch/arm/cpu/arm926ejs/mx28/timer.c           |  156 ---
 arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds    |   87 --
 arch/arm/cpu/arm926ejs/mxs/Makefile           |   50 +
 arch/arm/cpu/arm926ejs/mxs/clock.c            |  339 +++++++
 arch/arm/cpu/arm926ejs/mxs/iomux.c            |  109 +++
 arch/arm/cpu/arm926ejs/mxs/mx28.c             |  310 ++++++
 arch/arm/cpu/arm926ejs/mxs/mx28_init.h        |   45 +
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c         |  135 +++
 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c     |  242 +++++
 arch/arm/cpu/arm926ejs/mxs/spl_power_init.c   | 1007 +++++++++++++++++++
 arch/arm/cpu/arm926ejs/mxs/start.S            |  247 +++++
 arch/arm/cpu/arm926ejs/mxs/timer.c            |  156 +++
 arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds     |   87 ++
 arch/arm/include/asm/arch-mx28/clock.h        |   61 --
 arch/arm/include/asm/arch-mx28/dma.h          |  147 ---
 arch/arm/include/asm/arch-mx28/gpio.h         |   32 -
 arch/arm/include/asm/arch-mx28/imx-regs.h     |   42 -
 arch/arm/include/asm/arch-mx28/iomux-mx28.h   |  537 -----------
 arch/arm/include/asm/arch-mx28/iomux.h        |  168 ----
 arch/arm/include/asm/arch-mx28/regs-apbh.h    |  466 ---------
 arch/arm/include/asm/arch-mx28/regs-base.h    |   88 --
 arch/arm/include/asm/arch-mx28/regs-bch.h     |  230 -----
 arch/arm/include/asm/arch-mx28/regs-clkctrl.h |  294 ------
 arch/arm/include/asm/arch-mx28/regs-common.h  |   82 --
 arch/arm/include/asm/arch-mx28/regs-digctl.h  |  155 ---
 arch/arm/include/asm/arch-mx28/regs-gpmi.h    |  222 -----
 arch/arm/include/asm/arch-mx28/regs-i2c.h     |  207 ----
 arch/arm/include/asm/arch-mx28/regs-ocotp.h   |  173 ----
 arch/arm/include/asm/arch-mx28/regs-pinctrl.h | 1284 -------------------------
 arch/arm/include/asm/arch-mx28/regs-power.h   |  413 --------
 arch/arm/include/asm/arch-mx28/regs-rtc.h     |  147 ---
 arch/arm/include/asm/arch-mx28/regs-ssp.h     |  349 -------
 arch/arm/include/asm/arch-mx28/regs-timrot.h  |  171 ----
 arch/arm/include/asm/arch-mx28/regs-usb.h     |  178 ----
 arch/arm/include/asm/arch-mx28/regs-usbphy.h  |  151 ---
 arch/arm/include/asm/arch-mx28/sys_proto.h    |   74 --
 arch/arm/include/asm/arch-mxs/clock.h         |   61 ++
 arch/arm/include/asm/arch-mxs/dma.h           |  147 +++
 arch/arm/include/asm/arch-mxs/gpio.h          |   32 +
 arch/arm/include/asm/arch-mxs/imx-regs.h      |   42 +
 arch/arm/include/asm/arch-mxs/iomux-mx28.h    |  537 +++++++++++
 arch/arm/include/asm/arch-mxs/iomux.h         |  168 ++++
 arch/arm/include/asm/arch-mxs/regs-apbh.h     |  466 +++++++++
 arch/arm/include/asm/arch-mxs/regs-base.h     |   88 ++
 arch/arm/include/asm/arch-mxs/regs-bch.h      |  230 +++++
 arch/arm/include/asm/arch-mxs/regs-clkctrl.h  |  294 ++++++
 arch/arm/include/asm/arch-mxs/regs-common.h   |   82 ++
 arch/arm/include/asm/arch-mxs/regs-digctl.h   |  155 +++
 arch/arm/include/asm/arch-mxs/regs-gpmi.h     |  222 +++++
 arch/arm/include/asm/arch-mxs/regs-i2c.h      |  207 ++++
 arch/arm/include/asm/arch-mxs/regs-ocotp.h    |  173 ++++
 arch/arm/include/asm/arch-mxs/regs-pinctrl.h  | 1284 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-mxs/regs-power.h    |  413 ++++++++
 arch/arm/include/asm/arch-mxs/regs-rtc.h      |  147 +++
 arch/arm/include/asm/arch-mxs/regs-ssp.h      |  349 +++++++
 arch/arm/include/asm/arch-mxs/regs-timrot.h   |  171 ++++
 arch/arm/include/asm/arch-mxs/regs-usb.h      |  178 ++++
 arch/arm/include/asm/arch-mxs/regs-usbphy.h   |  151 +++
 arch/arm/include/asm/arch-mxs/sys_proto.h     |   74 ++
 boards.cfg                                    |    4 +-
 doc/README.m28                                |    2 +-
 doc/README.mx28evk                            |    6 +-
 include/configs/m28evk.h                      |    4 +-
 include/configs/mx28evk.h                     |    4 +-
 73 files changed, 8408 insertions(+), 8408 deletions(-)
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/Makefile
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/clock.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/iomux.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/mx28.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/mx28_init.h
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_boot.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/start.S
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/timer.c
 delete mode 100644 arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/clock.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/iomux.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/mx28.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/mx28_init.h
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_boot.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/start.S
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/timer.c
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
 delete mode 100644 arch/arm/include/asm/arch-mx28/clock.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/dma.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/gpio.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/imx-regs.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/iomux-mx28.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/iomux.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-apbh.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-base.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-bch.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-clkctrl.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-common.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-gpmi.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-i2c.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-ocotp.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-pinctrl.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-power.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-rtc.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-ssp.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-timrot.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-usb.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/regs-usbphy.h
 delete mode 100644 arch/arm/include/asm/arch-mx28/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-mxs/clock.h
 create mode 100644 arch/arm/include/asm/arch-mxs/dma.h
 create mode 100644 arch/arm/include/asm/arch-mxs/gpio.h
 create mode 100644 arch/arm/include/asm/arch-mxs/imx-regs.h
 create mode 100644 arch/arm/include/asm/arch-mxs/iomux-mx28.h
 create mode 100644 arch/arm/include/asm/arch-mxs/iomux.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-apbh.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-base.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-bch.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-common.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-digctl.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-gpmi.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-i2c.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-ocotp.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-pinctrl.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-power.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-rtc.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-ssp.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-timrot.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-usb.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-usbphy.h
 create mode 100644 arch/arm/include/asm/arch-mxs/sys_proto.h

arch/arm/cpu/arm926ejs/mx28/Makefile deleted +0 ~~-50~~

deleted file mode 100644
index 674a3af..0000000
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(SOC).o
-
-COBJS	= clock.o mx28.o iomux.o timer.o
-
-ifdef	CONFIG_SPL_BUILD
-COBJS	+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
-endif
-
-SRCS	:= $(START:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-START	:= $(addprefix $(obj),$(START))
-
-all:	$(obj).depend $(LIB)
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################

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boards.cfg +2 -2

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Signature · 1 line

1.7.10

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Otavio Salvador

author

2012-05-11 15:51 UTC #6 lore raw

PATCH 6/8 mxs: reorganize source directory for easy sharing of code among i.MXS SoCs

Quoted 5 lines · Otavio Salvador

Most code can be shared amount i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them.
Signed-off-by Otavio Salvador <[email protected]>

This and next patches are not yet ready for merging but I'd like to get an review on the concept of it.

Signature · 3 lines

Otavio Salvador? ? ? ? ? ? ? ? ? ? ? ? ? ? ?O.S. Systems
E-mail: otavio at ossystems.com.br? http://www.ossystems.com.br
Mobile: +55 53 9981-7854? ? ? ?? ? ? ?http://projetos.ossystems.com.br

Otavio Salvador

author

2012-05-11 15:38 UTC #7 lore raw

PATCH 7/8 mxs: prefix register acessor macros with 'mxs' prefix

In reply to Otavio Salvador

As the register accessing mode is the same for all i.MXS SoCs we ought to use 'mxs' prefix intead of 'mx28'.

Signed-off-by Otavio Salvador <[email protected]>

---
 arch/arm/cpu/arm926ejs/mxs/clock.c           |    4 +-
 arch/arm/cpu/arm926ejs/mxs/iomux.c           |    6 +-
 arch/arm/cpu/arm926ejs/mxs/mx28.c            |    6 +-
 arch/arm/include/asm/arch-mxs/regs-apbh.h    |  254 +++++++++++++-------------
 arch/arm/include/asm/arch-mxs/regs-bch.h     |   42 ++---
 arch/arm/include/asm/arch-mxs/regs-clkctrl.h |   58 +++---
 arch/arm/include/asm/arch-mxs/regs-common.h  |   34 ++--
 arch/arm/include/asm/arch-mxs/regs-digctl.h  |   50 ++---
 arch/arm/include/asm/arch-mxs/regs-gpmi.h    |   26 +--
 arch/arm/include/asm/arch-mxs/regs-i2c.h     |   28 +--
 arch/arm/include/asm/arch-mxs/regs-ocotp.h   |   86 ++++-----
 arch/arm/include/asm/arch-mxs/regs-pinctrl.h |  168 ++++++++---------
 arch/arm/include/asm/arch-mxs/regs-power.h   |   28 +--
 arch/arm/include/asm/arch-mxs/regs-rtc.h     |   28 +--
 arch/arm/include/asm/arch-mxs/regs-ssp.h     |   40 ++--
 arch/arm/include/asm/arch-mxs/regs-timrot.h  |   38 ++--
 arch/arm/include/asm/arch-mxs/regs-usbphy.h  |   20 +-
 arch/arm/include/asm/arch-mxs/sys_proto.h    |    6 +-
 drivers/gpio/mxs_gpio.c                      |   16 +-
 drivers/usb/host/ehci-mxs.c                  |    8 +-
 20 files changed, 473 insertions(+), 473 deletions(-)

arch/arm/cpu/arm926ejs/mxs/clock.c +2 -2

index 0439f9c..3e29c56 100644
@@ -207,7 +207,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 		return;
 
 	clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
-			(ssp * sizeof(struct mx28_register_32));
+			(ssp * sizeof(struct mxs_register_32));
 
 	clrbits_le32(clkreg, CLKCTRL_SSP_CLKGATE);
 	while (readl(clkreg) & CLKCTRL_SSP_CLKGATE)

@@ -256,7 +256,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
 		return XTAL_FREQ_KHZ;
 
 	clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
-			(ssp * sizeof(struct mx28_register_32));
+			(ssp * sizeof(struct mxs_register_32));
 
 	tmp = readl(clkreg) & CLKCTRL_SSP_DIV_MASK;

arch/arm/cpu/arm926ejs/mxs/iomux.c +3 -3

index 12916b6..73f1446 100644
@@ -43,7 +43,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
 {
 	u32 reg, ofs, bp, bm;
 	void *iomux_base = (void *)MXS_PINCTRL_BASE;
-	struct mx28_register_32 *mxs_reg;
+	struct mxs_register_32 *mxs_reg;
 
 	/* muxsel */
 	ofs = 0x100;

@@ -70,7 +70,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
 	/* vol */
 	if (PAD_VOL_VALID(pad)) {
 		bp = PAD_PIN(pad) % 8 * 4 + 2;
-		mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
+		mxs_reg = (struct mxs_register_32 *)(iomux_base + ofs);
 		if (PAD_VOL(pad))
 			writel(1 << bp, &mxs_reg->reg_set);
 		else

@@ -82,7 +82,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
 		ofs = PULL_OFFSET;
 		ofs += PAD_BANK(pad) * 0x10;
 		bp = PAD_PIN(pad);
-		mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
+		mxs_reg = (struct mxs_register_32 *)(iomux_base + ofs);
 		if (PAD_PULL(pad))
 			writel(1 << bp, &mxs_reg->reg_set);
 		else

arch/arm/cpu/arm926ejs/mxs/mx28.c +3 -3

index a82ff25..a0ec06e 100644
@@ -81,7 +81,7 @@ void enable_caches(void)
 #endif
 }
 
-int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, int timeout)
 {
 	while (--timeout) {
 		if ((readl(&reg->reg) & mask) == mask)

@@ -92,7 +92,7 @@ int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout)
 	return !timeout;
 }
 
-int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, int timeout)
 {
 	while (--timeout) {
 		if ((readl(&reg->reg) & mask) == 0)

@@ -103,7 +103,7 @@ int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout)
 	return !timeout;
 }
 
-int mx28_reset_block(struct mx28_register_32 *reg)
+int mx28_reset_block(struct mxs_register_32 *reg)
 {
 	/* Clear SFTRST */
 	writel(MX28_BLOCK_SFTRST, &reg->reg_clr);

arch/arm/include/asm/arch-mxs/regs-apbh.h +127 ~~-127~~

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arch/arm/include/asm/arch-mxs/regs-bch.h +21 ~~-21~~

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arch/arm/include/asm/arch-mxs/regs-clkctrl.h +29 ~~-29~~

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arch/arm/include/asm/arch-mxs/regs-common.h +17 ~~-17~~

index d2e1953..bcea419 100644
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Register Accessors
+ * Freescale i.MXS Register Accessors
  *
  * Copyright (C) 2011 Marek Vasut <[email protected]>
  * on behalf of DENX Software Engineering GmbH

@@ -20,11 +20,11 @@
  *
  */
 
-#ifndef __MX28_REGS_COMMON_H__
-#define __MX28_REGS_COMMON_H__
+#ifndef __MXS_REGS_COMMON_H__
+#define __MXS_REGS_COMMON_H__
 
 /*
- * The i.MX28 has interesting feature when it comes to register access. There
+ * The i.MXS has interesting feature when it comes to register access. There
  * are four kinds of access to one particular register. Those are:
  *
  * 1) Common read/write access. To use this mode, just write to the address of

@@ -47,36 +47,36 @@
  *
  */
 
-#define	__mx28_reg_8(name)		\
+#define	__mxs_reg_8(name)		\
 	uint8_t	name[4];		\
 	uint8_t	name##_set[4];		\
 	uint8_t	name##_clr[4];		\
 	uint8_t	name##_tog[4];		\
 
-#define	__mx28_reg_32(name)		\
+#define	__mxs_reg_32(name)		\
 	uint32_t name;			\
 	uint32_t name##_set;		\
 	uint32_t name##_clr;		\
 	uint32_t name##_tog;
 
-struct mx28_register_8 {
-	__mx28_reg_8(reg)
+struct mxs_register_8 {
+	__mxs_reg_8(reg)
 };
 
-struct mx28_register_32 {
-	__mx28_reg_32(reg)
+struct mxs_register_32 {
+	__mxs_reg_32(reg)
 };
 
-#define	mx28_reg_8(name)				\
+#define	mxs_reg_8(name)				\
 	union {						\
-		struct { __mx28_reg_8(name) };		\
-		struct mx28_register_8 name##_reg;	\
+		struct { __mxs_reg_8(name) };		\
+		struct mxs_register_8 name##_reg;	\
 	};
 
-#define	mx28_reg_32(name)				\
+#define	mxs_reg_32(name)				\
 	union {						\
-		struct { __mx28_reg_32(name) };		\
-		struct mx28_register_32 name##_reg;	\
+		struct { __mxs_reg_32(name) };		\
+		struct mxs_register_32 name##_reg;	\
 	};
 
-#endif	/* __MX28_REGS_COMMON_H__ */
+#endif	/* __MXS_REGS_COMMON_H__ */

arch/arm/include/asm/arch-mxs/regs-digctl.h +25 ~~-25~~

76 lines not on this page · raw message

arch/arm/include/asm/arch-mxs/regs-gpmi.h +13 ~~-13~~

index 1b487f4..190a570 100644
@@ -30,22 +30,22 @@
 
 #ifndef	__ASSEMBLY__
 struct mx28_gpmi_regs {
-	mx28_reg_32(hw_gpmi_ctrl0)
-	mx28_reg_32(hw_gpmi_compare)
-	mx28_reg_32(hw_gpmi_eccctrl)
-	mx28_reg_32(hw_gpmi_ecccount)
-	mx28_reg_32(hw_gpmi_payload)
-	mx28_reg_32(hw_gpmi_auxiliary)
-	mx28_reg_32(hw_gpmi_ctrl1)
-	mx28_reg_32(hw_gpmi_timing0)
-	mx28_reg_32(hw_gpmi_timing1)
+	mxs_reg_32(hw_gpmi_ctrl0)
+	mxs_reg_32(hw_gpmi_compare)
+	mxs_reg_32(hw_gpmi_eccctrl)
+	mxs_reg_32(hw_gpmi_ecccount)
+	mxs_reg_32(hw_gpmi_payload)
+	mxs_reg_32(hw_gpmi_auxiliary)
+	mxs_reg_32(hw_gpmi_ctrl1)
+	mxs_reg_32(hw_gpmi_timing0)
+	mxs_reg_32(hw_gpmi_timing1)
 
 	uint32_t	reserved[4];
 
-	mx28_reg_32(hw_gpmi_data)
-	mx28_reg_32(hw_gpmi_stat)
-	mx28_reg_32(hw_gpmi_debug)
-	mx28_reg_32(hw_gpmi_version)
+	mxs_reg_32(hw_gpmi_data)
+	mxs_reg_32(hw_gpmi_stat)
+	mxs_reg_32(hw_gpmi_debug)
+	mxs_reg_32(hw_gpmi_version)
 };
 #endif

arch/arm/include/asm/arch-mxs/regs-i2c.h +14 ~~-14~~

index 2e2e814..418a3c0 100644
@@ -27,20 +27,20 @@
 
 #ifndef	__ASSEMBLY__
 struct mx28_i2c_regs {
-	mx28_reg_32(hw_i2c_ctrl0)
-	mx28_reg_32(hw_i2c_timing0)
-	mx28_reg_32(hw_i2c_timing1)
-	mx28_reg_32(hw_i2c_timing2)
-	mx28_reg_32(hw_i2c_ctrl1)
-	mx28_reg_32(hw_i2c_stat)
-	mx28_reg_32(hw_i2c_queuectrl)
-	mx28_reg_32(hw_i2c_queuestat)
-	mx28_reg_32(hw_i2c_queuecmd)
-	mx28_reg_32(hw_i2c_queuedata)
-	mx28_reg_32(hw_i2c_data)
-	mx28_reg_32(hw_i2c_debug0)
-	mx28_reg_32(hw_i2c_debug1)
-	mx28_reg_32(hw_i2c_version)
+	mxs_reg_32(hw_i2c_ctrl0)
+	mxs_reg_32(hw_i2c_timing0)
+	mxs_reg_32(hw_i2c_timing1)
+	mxs_reg_32(hw_i2c_timing2)
+	mxs_reg_32(hw_i2c_ctrl1)
+	mxs_reg_32(hw_i2c_stat)
+	mxs_reg_32(hw_i2c_queuectrl)
+	mxs_reg_32(hw_i2c_queuestat)
+	mxs_reg_32(hw_i2c_queuecmd)
+	mxs_reg_32(hw_i2c_queuedata)
+	mxs_reg_32(hw_i2c_data)
+	mxs_reg_32(hw_i2c_debug0)
+	mxs_reg_32(hw_i2c_debug1)
+	mxs_reg_32(hw_i2c_version)
 };
 #endif

arch/arm/include/asm/arch-mxs/regs-ocotp.h +43 ~~-43~~

92 lines not on this page · raw message

arch/arm/include/asm/arch-mxs/regs-pinctrl.h +84 ~~-84~~

213 lines not on this page · raw message

arch/arm/include/asm/arch-mxs/regs-power.h +14 ~~-14~~

index 8eadc6d..3c9e3b0 100644
@@ -26,10 +26,10 @@
 
 #ifndef	__ASSEMBLY__
 struct mx28_power_regs {
-	mx28_reg_32(hw_power_ctrl)
-	mx28_reg_32(hw_power_5vctrl)
-	mx28_reg_32(hw_power_minpwr)
-	mx28_reg_32(hw_power_charge)
+	mxs_reg_32(hw_power_ctrl)
+	mxs_reg_32(hw_power_5vctrl)
+	mxs_reg_32(hw_power_minpwr)
+	mxs_reg_32(hw_power_charge)
 	uint32_t	hw_power_vdddctrl;
 	uint32_t	reserved_vddd[3];
 	uint32_t	hw_power_vddactrl;

@@ -44,23 +44,23 @@ struct mx28_power_regs {
 	uint32_t	reserved_misc[3];
 	uint32_t	hw_power_dclimits;
 	uint32_t	reserved_dclimits[3];
-	mx28_reg_32(hw_power_loopctrl)
+	mxs_reg_32(hw_power_loopctrl)
 	uint32_t	hw_power_sts;
 	uint32_t	reserved_sts[3];
-	mx28_reg_32(hw_power_speed)
+	mxs_reg_32(hw_power_speed)
 	uint32_t	hw_power_battmonitor;
 	uint32_t	reserved_battmonitor[3];
 
 	uint32_t	reserved[4];
 
-	mx28_reg_32(hw_power_reset)
-	mx28_reg_32(hw_power_debug)
-	mx28_reg_32(hw_power_thermal)
-	mx28_reg_32(hw_power_usb1ctrl)
-	mx28_reg_32(hw_power_special)
-	mx28_reg_32(hw_power_version)
-	mx28_reg_32(hw_power_anaclkctrl)
-	mx28_reg_32(hw_power_refctrl)
+	mxs_reg_32(hw_power_reset)
+	mxs_reg_32(hw_power_debug)
+	mxs_reg_32(hw_power_thermal)
+	mxs_reg_32(hw_power_usb1ctrl)
+	mxs_reg_32(hw_power_special)
+	mxs_reg_32(hw_power_version)
+	mxs_reg_32(hw_power_anaclkctrl)
+	mxs_reg_32(hw_power_refctrl)
 };
 #endif

arch/arm/include/asm/arch-mxs/regs-rtc.h +14 ~~-14~~

index e605a03..0b660ae 100644
@@ -27,20 +27,20 @@
 
 #ifndef	__ASSEMBLY__
 struct mx28_rtc_regs {
-	mx28_reg_32(hw_rtc_ctrl)
-	mx28_reg_32(hw_rtc_stat)
-	mx28_reg_32(hw_rtc_milliseconds)
-	mx28_reg_32(hw_rtc_seconds)
-	mx28_reg_32(hw_rtc_rtc_alarm)
-	mx28_reg_32(hw_rtc_watchdog)
-	mx28_reg_32(hw_rtc_persistent0)
-	mx28_reg_32(hw_rtc_persistent1)
-	mx28_reg_32(hw_rtc_persistent2)
-	mx28_reg_32(hw_rtc_persistent3)
-	mx28_reg_32(hw_rtc_persistent4)
-	mx28_reg_32(hw_rtc_persistent5)
-	mx28_reg_32(hw_rtc_debug)
-	mx28_reg_32(hw_rtc_version)
+	mxs_reg_32(hw_rtc_ctrl)
+	mxs_reg_32(hw_rtc_stat)
+	mxs_reg_32(hw_rtc_milliseconds)
+	mxs_reg_32(hw_rtc_seconds)
+	mxs_reg_32(hw_rtc_rtc_alarm)
+	mxs_reg_32(hw_rtc_watchdog)
+	mxs_reg_32(hw_rtc_persistent0)
+	mxs_reg_32(hw_rtc_persistent1)
+	mxs_reg_32(hw_rtc_persistent2)
+	mxs_reg_32(hw_rtc_persistent3)
+	mxs_reg_32(hw_rtc_persistent4)
+	mxs_reg_32(hw_rtc_persistent5)
+	mxs_reg_32(hw_rtc_debug)
+	mxs_reg_32(hw_rtc_version)
 };
 #endif

arch/arm/include/asm/arch-mxs/regs-ssp.h +20 ~~-20~~

index be71d48..85b9894 100644
@@ -29,26 +29,26 @@
 
 #ifndef	__ASSEMBLY__
 struct mx28_ssp_regs {
-	mx28_reg_32(hw_ssp_ctrl0)
-	mx28_reg_32(hw_ssp_cmd0)
-	mx28_reg_32(hw_ssp_cmd1)
-	mx28_reg_32(hw_ssp_xfer_size)
-	mx28_reg_32(hw_ssp_block_size)
-	mx28_reg_32(hw_ssp_compref)
-	mx28_reg_32(hw_ssp_compmask)
-	mx28_reg_32(hw_ssp_timing)
-	mx28_reg_32(hw_ssp_ctrl1)
-	mx28_reg_32(hw_ssp_data)
-	mx28_reg_32(hw_ssp_sdresp0)
-	mx28_reg_32(hw_ssp_sdresp1)
-	mx28_reg_32(hw_ssp_sdresp2)
-	mx28_reg_32(hw_ssp_sdresp3)
-	mx28_reg_32(hw_ssp_ddr_ctrl)
-	mx28_reg_32(hw_ssp_dll_ctrl)
-	mx28_reg_32(hw_ssp_status)
-	mx28_reg_32(hw_ssp_dll_sts)
-	mx28_reg_32(hw_ssp_debug)
-	mx28_reg_32(hw_ssp_version)
+	mxs_reg_32(hw_ssp_ctrl0)
+	mxs_reg_32(hw_ssp_cmd0)
+	mxs_reg_32(hw_ssp_cmd1)
+	mxs_reg_32(hw_ssp_xfer_size)
+	mxs_reg_32(hw_ssp_block_size)
+	mxs_reg_32(hw_ssp_compref)
+	mxs_reg_32(hw_ssp_compmask)
+	mxs_reg_32(hw_ssp_timing)
+	mxs_reg_32(hw_ssp_ctrl1)
+	mxs_reg_32(hw_ssp_data)
+	mxs_reg_32(hw_ssp_sdresp0)
+	mxs_reg_32(hw_ssp_sdresp1)
+	mxs_reg_32(hw_ssp_sdresp2)
+	mxs_reg_32(hw_ssp_sdresp3)
+	mxs_reg_32(hw_ssp_ddr_ctrl)
+	mxs_reg_32(hw_ssp_dll_ctrl)
+	mxs_reg_32(hw_ssp_status)
+	mxs_reg_32(hw_ssp_dll_sts)
+	mxs_reg_32(hw_ssp_debug)
+	mxs_reg_32(hw_ssp_version)
 };
 #endif

arch/arm/include/asm/arch-mxs/regs-timrot.h +19 ~~-19~~

index 3e8dfe7..332654f 100644
@@ -29,25 +29,25 @@
 
 #ifndef	__ASSEMBLY__
 struct mx28_timrot_regs {
-	mx28_reg_32(hw_timrot_rotctrl)
-	mx28_reg_32(hw_timrot_rotcount)
-	mx28_reg_32(hw_timrot_timctrl0)
-	mx28_reg_32(hw_timrot_running_count0)
-	mx28_reg_32(hw_timrot_fixed_count0)
-	mx28_reg_32(hw_timrot_match_count0)
-	mx28_reg_32(hw_timrot_timctrl1)
-	mx28_reg_32(hw_timrot_running_count1)
-	mx28_reg_32(hw_timrot_fixed_count1)
-	mx28_reg_32(hw_timrot_match_count1)
-	mx28_reg_32(hw_timrot_timctrl2)
-	mx28_reg_32(hw_timrot_running_count2)
-	mx28_reg_32(hw_timrot_fixed_count2)
-	mx28_reg_32(hw_timrot_match_count2)
-	mx28_reg_32(hw_timrot_timctrl3)
-	mx28_reg_32(hw_timrot_running_count3)
-	mx28_reg_32(hw_timrot_fixed_count3)
-	mx28_reg_32(hw_timrot_match_count3)
-	mx28_reg_32(hw_timrot_version)
+	mxs_reg_32(hw_timrot_rotctrl)
+	mxs_reg_32(hw_timrot_rotcount)
+	mxs_reg_32(hw_timrot_timctrl0)
+	mxs_reg_32(hw_timrot_running_count0)
+	mxs_reg_32(hw_timrot_fixed_count0)
+	mxs_reg_32(hw_timrot_match_count0)
+	mxs_reg_32(hw_timrot_timctrl1)
+	mxs_reg_32(hw_timrot_running_count1)
+	mxs_reg_32(hw_timrot_fixed_count1)
+	mxs_reg_32(hw_timrot_match_count1)
+	mxs_reg_32(hw_timrot_timctrl2)
+	mxs_reg_32(hw_timrot_running_count2)
+	mxs_reg_32(hw_timrot_fixed_count2)
+	mxs_reg_32(hw_timrot_match_count2)
+	mxs_reg_32(hw_timrot_timctrl3)
+	mxs_reg_32(hw_timrot_running_count3)
+	mxs_reg_32(hw_timrot_fixed_count3)
+	mxs_reg_32(hw_timrot_match_count3)
+	mxs_reg_32(hw_timrot_version)
 };
 #endif

arch/arm/include/asm/arch-mxs/regs-usbphy.h +10 ~~-10~~

index 0291d81..5dd5125 100644
@@ -24,16 +24,16 @@
 #define __REGS_USBPHY_H__
 
 struct mx28_usbphy_regs {
-	mx28_reg_32(hw_usbphy_pwd)
-	mx28_reg_32(hw_usbphy_tx)
-	mx28_reg_32(hw_usbphy_rx)
-	mx28_reg_32(hw_usbphy_ctrl)
-	mx28_reg_32(hw_usbphy_status)
-	mx28_reg_32(hw_usbphy_debug)
-	mx28_reg_32(hw_usbphy_debug0_status)
-	mx28_reg_32(hw_usbphy_debug1)
-	mx28_reg_32(hw_usbphy_version)
-	mx28_reg_32(hw_usbphy_ip)
+	mxs_reg_32(hw_usbphy_pwd)
+	mxs_reg_32(hw_usbphy_tx)
+	mxs_reg_32(hw_usbphy_rx)
+	mxs_reg_32(hw_usbphy_ctrl)
+	mxs_reg_32(hw_usbphy_status)
+	mxs_reg_32(hw_usbphy_debug)
+	mxs_reg_32(hw_usbphy_debug0_status)
+	mxs_reg_32(hw_usbphy_debug1)
+	mxs_reg_32(hw_usbphy_version)
+	mxs_reg_32(hw_usbphy_ip)
 };
 
 #define	USBPHY_PWD_RXPWDRX				(1 << 20)

arch/arm/include/asm/arch-mxs/sys_proto.h +3 -3

index e701c64..7337458 100644
@@ -23,11 +23,11 @@
 #ifndef __MX28_H__
 #define __MX28_H__
 
-int mx28_reset_block(struct mx28_register_32 *reg);
-int mx28_wait_mask_set(struct mx28_register_32 *reg,
+int mx28_reset_block(struct mxs_register_32 *reg);
+int mx28_wait_mask_set(struct mxs_register_32 *reg,
 		       uint32_t mask,
 		       int timeout);
-int mx28_wait_mask_clr(struct mx28_register_32 *reg,
+int mx28_wait_mask_clr(struct mxs_register_32 *reg,
 		       uint32_t mask,
 		       int timeout);

drivers/gpio/mxs_gpio.c +8 -8

index 38dbc81..29f19ba 100644
@@ -73,8 +73,8 @@ int gpio_get_value(unsigned gpio)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DIN(bank);
-	struct mx28_register_32 *reg =
-		(struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	return (readl(&reg->reg) >> PAD_PIN(gpio)) & 1;
 }

@@ -83,8 +83,8 @@ void gpio_set_value(unsigned gpio, int value)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DOUT(bank);
-	struct mx28_register_32 *reg =
-		(struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	if (value)
 		writel(1 << PAD_PIN(gpio), &reg->reg_set);

@@ -96,8 +96,8 @@ int gpio_direction_input(unsigned gpio)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DOE(bank);
-	struct mx28_register_32 *reg =
-		(struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	writel(1 << PAD_PIN(gpio), &reg->reg_clr);

@@ -108,8 +108,8 @@ int gpio_direction_output(unsigned gpio, int value)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DOE(bank);
-	struct mx28_register_32 *reg =
-		(struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	writel(1 << PAD_PIN(gpio), &reg->reg_set);

drivers/usb/host/ehci-mxs.c +4 -4

index e1bd37e..f32df51 100644
@@ -75,8 +75,8 @@ int ehci_hcd_init(void)
 
 	int ret;
 	uint32_t usb_base, cap_base;
-	struct mx28_register_32 *digctl_ctrl =
-		(struct mx28_register_32 *)HW_DIGCTL_CTRL;
+	struct mxs_register_32 *digctl_ctrl =
+		(struct mxs_register_32 *)HW_DIGCTL_CTRL;
 	struct mx28_clkctrl_regs *clkctrl_regs =
 		(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;

@@ -119,8 +119,8 @@ int ehci_hcd_stop(void)
 {
 	int ret;
 	uint32_t tmp;
-	struct mx28_register_32 *digctl_ctrl =
-		(struct mx28_register_32 *)HW_DIGCTL_CTRL;
+	struct mxs_register_32 *digctl_ctrl =
+		(struct mxs_register_32 *)HW_DIGCTL_CTRL;
 	struct mx28_clkctrl_regs *clkctrl_regs =
 		(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;

Signature · 1 line

1.7.10

Otavio Salvador

author

2012-05-11 15:38 UTC #8 lore raw

PATCH 8/8 MX28: rename regs-clkctrl.h to regs-clkctrl-mx28.h

In reply to Otavio Salvador

The CLKCTRL registers are SoC specific so we ought to have it clear on filename.

Signed-off-by Otavio Salvador <[email protected]>

---
 arch/arm/include/asm/arch-mxs/imx-regs.h          |    2 +-
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h |  294 +++++++++++++++++++++
 arch/arm/include/asm/arch-mxs/regs-clkctrl.h      |  294 ---------------------
 drivers/usb/host/ehci-mxs.c                       |    2 +-
 4 files changed, 296 insertions(+), 296 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
 delete mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl.h

arch/arm/include/asm/arch-mxs/imx-regs.h +1 -1

index 37d0a93..5e1901e 100644
@@ -26,7 +26,7 @@
 #include <asm/arch/regs-apbh.h>
 #include <asm/arch/regs-base.h>
 #include <asm/arch/regs-bch.h>
-#include <asm/arch/regs-clkctrl.h>
+#include <asm/arch/regs-clkctrl-mx28.h>
 #include <asm/arch/regs-digctl.h>
 #include <asm/arch/regs-gpmi.h>
 #include <asm/arch/regs-i2c.h>

arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h new file +294 -0

294 lines not on this page · raw message

arch/arm/include/asm/arch-mxs/regs-clkctrl.h deleted +0 ~~-294~~

294 lines not on this page · raw message

drivers/usb/host/ehci-mxs.c +1 -1

index f32df51..8a36513 100644
@@ -23,7 +23,7 @@
 #include <asm/io.h>
 #include <asm/arch/regs-common.h>
 #include <asm/arch/regs-base.h>
-#include <asm/arch/regs-clkctrl.h>
+#include <asm/arch/regs-clkctrl-mx28.h>
 #include <asm/arch/regs-usb.h>
 #include <asm/arch/regs-usbphy.h>

Signature · 1 line

1.7.10

Marek Vasut

2012-05-11 21:03 UTC #9 lore raw

PATCH 1/8 MX28: Fix a typo in mx28_reg_8 macro

In reply to Otavio Salvador

Dear Otavio Salvador,

Quoted 15 lines

The macro mistakenly referred to 32bit struct instead of 8bit one.
Signed-off-by Otavio Salvador <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Marek Vasut <[email protected]>
---
 arch/arm/include/asm/arch-mx28/regs-common.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
(quoted diff) +0 -0
b/arch/arm/include/asm/arch-mx28/regs-common.h index 94b512d..d2e1953 100644

arch/arm/include/asm/arch-mx28/regs-common.h struct mx28_register_32 { · line 76

Quoted 8 lines

arch/arm/include/asm/arch-mx28/regs-common.h +1 -1

@@ -70,7 +70,7 @@ struct mx28_register_32 {
 #define	mx28_reg_8(name)				\
 	union {						\
 		struct { __mx28_reg_8(name) };		\
-		struct mx28_register_32 name##_reg;	\
+		struct mx28_register_8 name##_reg;	\
 	};
 
 #define	mx28_reg_32(name)				\

Didn't Fabio sent in something similar already? Either way

Acked-by Marek Vasut <[email protected]>

Best regards,
Marek Vasut

Otavio Salvador

author

2012-05-11 21:12 UTC #10 lore raw

PATCH 1/8 MX28: Fix a typo in mx28_reg_8 macro

Quoted 2 lines · Marek Vasut

Quoted 1 line
The macro mistakenly referred to 32bit struct instead of 8bit one.
Didn't Fabio sent in something similar already? Either way

Yes; I asked him to send my patch while I was in a client with a very restricted firewall.

Thanks by acking it.

Signature · 3 lines

Otavio Salvador? ? ? ? ? ? ? ? ? ? ? ? ? ? ?O.S. Systems
E-mail: otavio at ossystems.com.br? http://www.ossystems.com.br
Mobile: +55 53 9981-7854? ? ? ?? ? ? ?http://projetos.ossystems.com.br

Stefano Babic

2012-06-13 09:06 UTC #11 lore raw

PATCH 1/8 MX28: Fix a typo in mx28_reg_8 macro

In reply to Otavio Salvador

Quoted 6 lines · Otavio Salvador

The macro mistakenly referred to 32bit struct instead of 8bit one.
Signed-off-by Otavio Salvador <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Marek Vasut <[email protected]>
---

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines

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