i.MX6 USDHC: Use the ESDHC clock
Subsystems (2)
PATCH 1/1 i.MX6 USDHC: Use the ESDHC clock
From: Michael Langer <[email protected]>
The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC.
MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()).
--- arch/arm/cpu/armv7/imx-common/speed.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/imx-common/speed.c +4 -0
@@ -35,7 +35,11 @@ DECLARE_GLOBAL_DATA_PTR;int get_clocks (void ) {#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_USDHC + gd->sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +#else gd->sdhc_clk =mxc_get_clock (MXC_IPG_PERCLK );#endif +#endif return 0 ; }
Signature · 1 line
1.7.0.4
PATCH 1/1 i.MX6 USDHC: Use the ESDHC clock
Quoted 23 lines · Dirk Behme
From: Michael Langer <[email protected]>
The commit "i.mx:
fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC.
MXC_IPG_PERCLKsets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock onSD_CLKthan expected (seefsl_esdh.c->set_sysctl()).Signed-off-by Michael Langer <[email protected]>CC Stefano Babic <[email protected]>CC Jason Liu <[email protected]>--- arch/arm/cpu/armv7/imx-common/speed.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)arch/arm/cpu/armv7/imx-common/speed.c +0
-0@@ -35,7 +35,11 @@ DECLARE_GLOBAL_DATA_PTR;int get_clocks (void )
arch/arm/cpu/armv7/imx-common/speed.c DECLARE_GLOBAL_DATA_PTR; · line 45
Quoted 10 lines
arch/arm/cpu/armv7/imx-common/speed.c +4
-0{#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_USDHC + gd->sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +#else gd->sdhc_clk =mxc_get_clock (MXC_IPG_PERCLK );#endif +#endif return 0 ; }
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 i.MX6 USDHC: Use the ESDHC clock
In reply to Dirk BehmeQuoted 10 lines · Dirk Behme
From: Michael Langer <[email protected]>
The commit "i.mx:
fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC.
MXC_IPG_PERCLKsets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock onSD_CLKthan expected (seefsl_esdh.c->set_sysctl()).
Quoted 4 lines
Signed-off-by Michael Langer <[email protected]>CC Stefano Babic <[email protected]>CC Jason Liu <[email protected]>---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================