ARM: at91: add sparse irq support and introduce aic5
Subsystems (4)
v3 cover ARM: at91: add sparse irq support and introduce aic5
From: Ludovic Desroches <[email protected]>
This set of patches introduces AIC5 support with the goal to have only one kernel image for all SOCs. That's why sparse irq support was added. AIC5 can manage up to 128 irq lines. It introduces a new register map and a source select register to select the IRQ line we want to configure.
v3 changes:
- of irq priorities support patch reworked: add a cell for priority value.
- sparse irq support patch reworked: no more using nr_irqs, so have to shift static irq number by NR_IRQS_LEGACY.
v2 changes:
- add Jean-Christophe patches since my patches are based on abd there have not been submitted yet
- I missed some machine descriptors in the first version, it is corrected with this new one.
- correct sparse irq support and remove mach/irqs.h.
- correct issue on AIC5 support (missing allocation).
Jean-Christophe PLAGNIOL-VILLARD (1):
ARM: at91: aic add dt support for external irqs
Ludovic Desroches (6):
ARM: at91: add of irq priorities support
ARM: at91: remove static irq priorities for sam9x5
ARM: at91: at91 based machines specify their own irq handler at run
time
ARM: at91: sparse irq support
ARM: at91: remove mach/irqs.h
ARM: at91: add AIC5 support
.../devicetree/bindings/arm/atmel-aic.txt | 9 +- arch/arm/boot/dts/at91sam9260.dtsi | 37 +- arch/arm/boot/dts/at91sam9263.dtsi | 31 +- arch/arm/boot/dts/at91sam9g45.dtsi | 39 +- arch/arm/boot/dts/at91sam9n12.dtsi | 30 +- arch/arm/boot/dts/at91sam9x5.dtsi | 39 +- arch/arm/mach-at91/Kconfig | 2 + arch/arm/mach-at91/at91rm9200.c | 1 + arch/arm/mach-at91/at91rm9200_devices.c | 84 ++-- arch/arm/mach-at91/at91sam9260.c | 1 + arch/arm/mach-at91/at91sam9260_devices.c | 92 +++--- arch/arm/mach-at91/at91sam9261.c | 1 + arch/arm/mach-at91/at91sam9261_devices.c | 68 ++-- arch/arm/mach-at91/at91sam9263.c | 1 + arch/arm/mach-at91/at91sam9263_devices.c | 80 ++-- arch/arm/mach-at91/at91sam926x_time.c | 2 +- arch/arm/mach-at91/at91sam9g45.c | 1 + arch/arm/mach-at91/at91sam9g45_devices.c | 108 +++--- arch/arm/mach-at91/at91sam9rl.c | 1 + arch/arm/mach-at91/at91sam9rl_devices.c | 76 ++-- arch/arm/mach-at91/at91sam9x5.c | 40 -- arch/arm/mach-at91/at91x40.c | 1 + arch/arm/mach-at91/board-1arm.c | 2 + arch/arm/mach-at91/board-afeb-9260v1.c | 2 + arch/arm/mach-at91/board-cam60.c | 2 + arch/arm/mach-at91/board-carmeva.c | 2 + arch/arm/mach-at91/board-cpu9krea.c | 2 + arch/arm/mach-at91/board-cpuat91.c | 2 + arch/arm/mach-at91/board-csb337.c | 2 + arch/arm/mach-at91/board-csb637.c | 2 + arch/arm/mach-at91/board-dt.c | 2 + arch/arm/mach-at91/board-eb01.c | 2 + arch/arm/mach-at91/board-eb9200.c | 2 + arch/arm/mach-at91/board-ecbat91.c | 2 + arch/arm/mach-at91/board-eco920.c | 2 + arch/arm/mach-at91/board-flexibity.c | 2 + arch/arm/mach-at91/board-foxg20.c | 2 + arch/arm/mach-at91/board-gsia18s.c | 2 + arch/arm/mach-at91/board-kafa.c | 2 + arch/arm/mach-at91/board-kb9202.c | 2 + arch/arm/mach-at91/board-neocore926.c | 2 + arch/arm/mach-at91/board-pcontrol-g20.c | 2 + arch/arm/mach-at91/board-picotux200.c | 2 + arch/arm/mach-at91/board-qil-a9260.c | 2 + arch/arm/mach-at91/board-rm9200dk.c | 2 + arch/arm/mach-at91/board-rm9200ek.c | 2 + arch/arm/mach-at91/board-rsi-ews.c | 2 + arch/arm/mach-at91/board-sam9-l9260.c | 2 + arch/arm/mach-at91/board-sam9260ek.c | 2 + arch/arm/mach-at91/board-sam9261ek.c | 2 + arch/arm/mach-at91/board-sam9263ek.c | 2 + arch/arm/mach-at91/board-sam9g20ek.c | 3 + arch/arm/mach-at91/board-sam9m10g45ek.c | 2 + arch/arm/mach-at91/board-sam9rlek.c | 2 + arch/arm/mach-at91/board-snapper9260.c | 2 + arch/arm/mach-at91/board-stamp9g20.c | 3 + arch/arm/mach-at91/board-usb-a926x.c | 4 + arch/arm/mach-at91/board-yl-9200.c | 2 + arch/arm/mach-at91/generic.h | 2 + arch/arm/mach-at91/include/mach/at91_aic.h | 34 ++ arch/arm/mach-at91/include/mach/entry-macro.S | 27 -- arch/arm/mach-at91/include/mach/irqs.h | 41 -- arch/arm/mach-at91/irq.c | 400 +++++++++++++++++--- arch/arm/mach-at91/pm.c | 1 + 64 files changed, 818 insertions(+), 507 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-at91/include/mach/irqs.h
Signature · 1 line
1.7.5.4
PATCH v3 1/7 ARM: at91: aic add dt support for external irqs
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
--- .../devicetree/bindings/arm/atmel-aic.txt | 1 + arch/arm/boot/dts/at91sam9260.dtsi | 1 + arch/arm/boot/dts/at91sam9263.dtsi | 1 + arch/arm/boot/dts/at91sam9g45.dtsi | 1 + arch/arm/boot/dts/at91sam9x5.dtsi | 1 + arch/arm/mach-at91/at91sam9x5.c | 2 -- arch/arm/mach-at91/irq.c | 12 ++++++++++++ 7 files changed, 17 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/arm/atmel-aic.txt +1 -0
@@ -15,6 +15,7 @@ Required properties: Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). - reg: Should contain AIC registers location and length +- atmel,external-irqs: u32 array of external irqs. Examples: /*
arch/arm/boot/dts/at91sam9260.dtsi +1 -0
@@ -56,6 +56,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <29 30 31>; }; ramc0: ramc at ffffea00 {
arch/arm/boot/dts/at91sam9263.dtsi +1 -0
@@ -52,6 +52,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <30 31>; }; pmc: pmc at fffffc00 {
arch/arm/boot/dts/at91sam9g45.dtsi +1 -0
@@ -57,6 +57,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc at ffffe400 {
arch/arm/boot/dts/at91sam9x5.dtsi +1 -0
@@ -55,6 +55,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc at ffffe800 {
arch/arm/mach-at91/at91sam9x5.c +0 -2
@@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void)void __init at91sam9x5_initialize (void ) { - at91_extern_irq = (1 <<AT91SAM9X5_ID_IRQ0 ); -/* Register GPIO subsystem (using DT) */ at91_gpio_init (NULL ,0 ); }
arch/arm/mach-at91/irq.c +12 -0
@@ -194,6 +194,10 @@ static struct irq_domain_ops at91_aic_irq_ops = {int __init at91_aic_of_init (struct device_node *node,struct device_node *parent) { +struct property *prop; +const __be32 *p; +u32 val; + at91_aic_base =of_iomap (node,0 ); at91_aic_np = node;
@@ -202,6 +206,14 @@ int __init at91_aic_of_init(struct device_node *node,if (!at91_aic_domain)panic ("Unable to add AIC irq domain (DT)\n" ); + at91_extern_irq =0 ; +of_property_for_each_u32 (node,"atmel,external-irqs" , prop, p, val) { +if (val >31 ) +pr_warn ("AIC: external irq %d > 31 skip it\n" , val); +else + at91_extern_irq |= (1 << val); + } +irq_set_default_host (at91_aic_domain);at91_aic_hw_init (NR_AIC_IRQS );
Signature · 1 line
1.7.5.4
PATCH v3 1/7 ARM: at91: aic add dt support for external irqs
On 06/23/2012 06:05 PM, ludovic.desroches at atmel.com :
Quoted 3 lines
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Quoted 114 lines
--- .../devicetree/bindings/arm/atmel-aic.txt | 1 + arch/arm/boot/dts/at91sam9260.dtsi | 1 + arch/arm/boot/dts/at91sam9263.dtsi | 1 + arch/arm/boot/dts/at91sam9g45.dtsi | 1 + arch/arm/boot/dts/at91sam9x5.dtsi | 1 + arch/arm/mach-at91/at91sam9x5.c | 2 -- arch/arm/mach-at91/irq.c | 12 ++++++++++++ 7 files changed, 17 insertions(+), 2 deletions(-)Documentation/devicetree/bindings/arm/atmel-aic.txt +1
-0@@ -15,6 +15,7 @@ Required properties: Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). - reg: Should contain AIC registers location and length +- atmel,external-irqs: u32 array of external irqs. Examples: /*arch/arm/boot/dts/at91sam9260.dtsi +1
-0@@ -56,6 +56,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <29 30 31>; }; ramc0: ramc at ffffea00 {arch/arm/boot/dts/at91sam9263.dtsi +1
-0@@ -52,6 +52,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <30 31>; }; pmc: pmc at fffffc00 {arch/arm/boot/dts/at91sam9g45.dtsi +1
-0@@ -57,6 +57,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc at ffffe400 {arch/arm/boot/dts/at91sam9x5.dtsi +1
-0@@ -55,6 +55,7 @@ compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; + atmel,external-irqs = <31>; }; ramc0: ramc at ffffe800 {arch/arm/mach-at91/at91sam9x5.c +0
-2@@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void)void __init at91sam9x5_initialize (void ) { - at91_extern_irq = (1 <<AT91SAM9X5_ID_IRQ0 ); -/* Register GPIO subsystem (using DT) */ at91_gpio_init (NULL ,0 ); }arch/arm/mach-at91/irq.c +12
-0@@ -194,6 +194,10 @@ static struct irq_domain_ops at91_aic_irq_ops = {int __init at91_aic_of_init (struct device_node *node,struct device_node *parent) { +struct property *prop; +const __be32 *p; +u32 val; + at91_aic_base =of_iomap (node,0 ); at91_aic_np = node;@@ -202,6 +206,14 @@ int __init at91_aic_of_init(struct device_node *node,if (!at91_aic_domain)panic ("Unable to add AIC irq domain (DT)\n" ); + at91_extern_irq =0 ; +of_property_for_each_u32 (node,"atmel,external-irqs" , prop, p, val) { +if (val >31 ) +pr_warn ("AIC: external irq %d > 31 skip it\n" , val); +else + at91_extern_irq |= (1 << val); + } +irq_set_default_host (at91_aic_domain);at91_aic_hw_init (NR_AIC_IRQS );
Signature · 1 line
Nicolas Ferre
PATCH v3 2/7 ARM: at91: add of irq priorities support
In reply to ludovic.desroches at atmel.comFrom: Ludovic Desroches <[email protected]>
Add a third cell to define irq priority.
--- .../devicetree/bindings/arm/atmel-aic.txt | 8 +++-- arch/arm/boot/dts/at91sam9260.dtsi | 36 +++++++++--------- arch/arm/boot/dts/at91sam9263.dtsi | 30 ++++++++-------- arch/arm/boot/dts/at91sam9g45.dtsi | 38 ++++++++++---------- arch/arm/boot/dts/at91sam9n12.dtsi | 30 ++++++++-------- arch/arm/boot/dts/at91sam9x5.dtsi | 38 ++++++++++---------- arch/arm/mach-at91/include/mach/at91_aic.h | 3 ++ arch/arm/mach-at91/irq.c | 34 ++++++++++++++++-- 8 files changed, 125 insertions(+), 92 deletions(-)
Documentation/devicetree/bindings/arm/atmel-aic.txt +5 -3
@@ -4,7 +4,7 @@ Required properties: - compatible: Should be "atmel,<chip>-aic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. +- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The second cell is used to specify flags: bits[3:0] trigger type and level flags:
@@ -14,6 +14,8 @@ Required properties: 8 = active low level-sensitive. Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). + The third cell is used to specify the irq priority from 0 (lowest) to 7 + (highest). - reg: Should contain AIC registers location and length - atmel,external-irqs: u32 array of external irqs.
@@ -25,7 +27,7 @@ Examples: compatible = "atmel,at91rm9200-aic"; interrupt-controller; interrupt-parent; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0xfffff000 0x200>; };
@@ -35,5 +37,5 @@ Examples: dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 5>; };
arch/arm/boot/dts/at91sam9260.dtsi +18 -18
@@ -52,7 +52,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;
@@ -82,25 +82,25 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 18 4 19 4>; + interrupts = <17 4 0 18 4 0 19 4 0>; }; tcb1: timer at fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; - interrupts = <26 4 27 4 28 4>; + interrupts = <26 4 0 27 4 0 28 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -109,7 +109,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -118,7 +118,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -127,14 +127,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -143,7 +143,7 @@ usart1: serial at fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -152,7 +152,7 @@ usart2: serial at fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -161,7 +161,7 @@ usart3: serial at fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; - interrupts = <23 4>; + interrupts = <23 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -170,7 +170,7 @@ usart4: serial at fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; - interrupts = <24 4>; + interrupts = <24 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -179,7 +179,7 @@ usart5: serial at fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; - interrupts = <25 4>; + interrupts = <25 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -188,21 +188,21 @@ macb0: ethernet at fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget at fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; - interrupts = <10 4>; + interrupts = <10 4 2>; status = "disabled"; }; adc0: adc at fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; - interrupts = <5 4>; + interrupts = <5 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>;
@@ -254,7 +254,7 @@ usb0: ohci at 00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; - interrupts = <20 4>; + interrupts = <20 4 2>; status = "disabled"; }; };
arch/arm/boot/dts/at91sam9263.dtsi +15 -15
@@ -48,7 +48,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;
@@ -69,13 +69,13 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; }; rstc at fffffd00 {
@@ -91,7 +91,7 @@ pioA: gpio at fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -100,7 +100,7 @@ pioB: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -109,7 +109,7 @@ pioC: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -118,7 +118,7 @@ pioD: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -127,7 +127,7 @@ pioE: gpio at fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -136,14 +136,14 @@ dbgu: serial at ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -152,7 +152,7 @@ usart1: serial at fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -161,7 +161,7 @@ usart2: serial at fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -170,14 +170,14 @@ macb0: ethernet at fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget at fff78000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfff78000 0x4000>; - interrupts = <24 4>; + interrupts = <24 4 2>; status = "disabled"; }; };
@@ -201,7 +201,7 @@ usb0: ohci at 00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; - interrupts = <29 4>; + interrupts = <29 4 2>; status = "disabled"; }; };
arch/arm/boot/dts/at91sam9g45.dtsi +19 -19
@@ -53,7 +53,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;
@@ -79,7 +79,7 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; };
@@ -91,25 +91,25 @@ tcb0: timer at fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; tcb1: timer at fffd4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffd4000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio at fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -118,7 +118,7 @@ pioB: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -127,7 +127,7 @@ pioC: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -136,7 +136,7 @@ pioD: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -145,7 +145,7 @@ pioE: gpio at fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -154,14 +154,14 @@ dbgu: serial at ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -170,7 +170,7 @@ usart1: serial at fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -179,7 +179,7 @@ usart2: serial at fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -188,7 +188,7 @@ usart3: serial at fff98000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff98000 0x200>; - interrupts = <10 4>; + interrupts = <10 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -197,14 +197,14 @@ macb0: ethernet at fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <25 4>; + interrupts = <25 4 3>; status = "disabled"; }; adc0: adc at fffb0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffb0000 0x100>; - interrupts = <20 4>; + interrupts = <20 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>;
@@ -258,14 +258,14 @@ usb0: ohci at 00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci at 00800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };
arch/arm/boot/dts/at91sam9n12.dtsi +15 -15
@@ -50,7 +50,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;
@@ -74,7 +74,7 @@ pit: timer at fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; shdwc at fffffe10 {
@@ -85,25 +85,25 @@ tcb0: timer at f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer at f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -112,7 +112,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -121,7 +121,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -130,7 +130,7 @@ pioD: gpio at fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -139,14 +139,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -155,7 +155,7 @@ usart1: serial at f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -164,7 +164,7 @@ usart2: serial at f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -173,7 +173,7 @@ usart3: serial at f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -201,7 +201,7 @@ usb0: ohci at 00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };
arch/arm/boot/dts/at91sam9x5.dtsi +19 -19
@@ -51,7 +51,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;
@@ -81,37 +81,37 @@ pit: timer at fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer at f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma0: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; dma1: dma-controller at ffffee00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffee00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -120,7 +120,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -129,7 +129,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -138,7 +138,7 @@ pioD: gpio at fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;
@@ -147,14 +147,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -163,7 +163,7 @@ usart1: serial at f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -172,7 +172,7 @@ usart2: serial at f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";
@@ -181,21 +181,21 @@ macb0: ethernet at f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <24 4>; + interrupts = <24 4 3>; status = "disabled"; }; macb1: ethernet at f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; - interrupts = <27 4>; + interrupts = <27 4 3>; status = "disabled"; }; adc0: adc at f804c000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; atmel,adc-use-external; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>;
@@ -249,14 +249,14 @@ usb0: ohci at 00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci at 00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };
arch/arm/mach-at91/include/mach/at91_aic.h +3 -0
@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; .extern at91_aic_base#endif +#define AT91_AIC_IRQ_MIN_PRIORITY 0 +#define AT91_AIC_IRQ_MAX_PRIORITY 7 +#define AT91_AIC_SMR (n) ((n) * 4)/* Source Mode Registers 0-31 */ #define AT91_AIC_PRIOR (7 << 0)/* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5)/* Interrupt Source Type */
arch/arm/mach-at91/irq.c +31 -3
@@ -30,6 +30,7 @@#include <linux/of_irq.h> #include <linux/irqdomain.h> #include <linux/err.h> +#include <linux/slab.h> #include <mach/hardware.h> #include <asm/irq.h>
@@ -42,6 +43,7 @@void __iomem *at91_aic_base;static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np; +static unsigned int *at91_aic_irq_priorities;static void at91_aic_mask_irq (struct irq_data *d) {
@@ -177,8 +179,9 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,/* Put virq number in Source Vector Register */ at91_aic_write (AT91_AIC_SVR (hw), virq); -/* Active Low interrupt, without priority */ -at91_aic_write (AT91_AIC_SMR (hw),AT91_AIC_SRCTYPE_LOW ); +/* Active Low interrupt, with priority */ +at91_aic_write (AT91_AIC_SMR (hw), +AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);irq_set_chip_and_handler (virq, &at91_aic_chip, handle_fasteoi_irq);set_irq_flags (virq,IRQF_VALID |IRQF_PROBE );
@@ -186,9 +189,28 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,return 0 ; } +static int at91_aic_irq_domain_xlate (struct irq_domain *d,struct device_node *ctrlr, +const u32 *intspec,unsigned int intsize, +irq_hw_number_t *out_hwirq,unsigned int *out_type) +{ +if (WARN_ON (intsize <3 )) +return -EINVAL ; +if (WARN_ON (intspec[0 ] >=NR_AIC_IRQS )) +return -EINVAL ; +if (WARN_ON ((intspec[2 ] <AT91_AIC_IRQ_MIN_PRIORITY ) + || (intspec[2 ] >AT91_AIC_IRQ_MAX_PRIORITY ))) +return -EINVAL ; + + *out_hwirq = intspec[0 ]; + *out_type = intspec[1 ] &IRQ_TYPE_SENSE_MASK ; + at91_aic_irq_priorities[*out_hwirq] = intspec[2 ]; + +return 0 ; +} +static struct irq_domain_ops at91_aic_irq_ops = { .map = at91_aic_irq_map, - .xlate = irq_domain_xlate_twocell, + .xlate = at91_aic_irq_domain_xlate, }; int __init at91_aic_of_init(struct device_node *node,
@@ -198,6 +220,12 @@ int __init at91_aic_of_init(struct device_node *node,const __be32 *p;u32 val; + at91_aic_irq_priorities =kzalloc (NR_AIC_IRQS + *sizeof (*at91_aic_irq_priorities), +GFP_KERNEL ); +if (!at91_aic_irq_priorities) +return -ENOMEM ; + at91_aic_base =of_iomap (node,0 ); at91_aic_np = node;
Signature · 1 line
1.7.5.4
PATCH v3 2/7 ARM: at91: add of irq priorities support
Quoted 5 lines · ludovic.desroches at atmel.com
From: Ludovic Desroches <[email protected]>
Add a third cell to define irq priority.
Signed-off-by Ludovic Desroches <[email protected]>
Looks good.
Quoted 889 lines
--- .../devicetree/bindings/arm/atmel-aic.txt | 8 +++-- arch/arm/boot/dts/at91sam9260.dtsi | 36 +++++++++--------- arch/arm/boot/dts/at91sam9263.dtsi | 30 ++++++++-------- arch/arm/boot/dts/at91sam9g45.dtsi | 38 ++++++++++---------- arch/arm/boot/dts/at91sam9n12.dtsi | 30 ++++++++-------- arch/arm/boot/dts/at91sam9x5.dtsi | 38 ++++++++++---------- arch/arm/mach-at91/include/mach/at91_aic.h | 3 ++ arch/arm/mach-at91/irq.c | 34 ++++++++++++++++-- 8 files changed, 125 insertions(+), 92 deletions(-)Documentation/devicetree/bindings/arm/atmel-aic.txt +5
-3@@ -4,7 +4,7 @@ Required properties: - compatible: Should be "atmel,<chip>-aic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. +- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The second cell is used to specify flags: bits[3:0] trigger type and level flags:@@ -14,6 +14,8 @@ Required properties: 8 = active low level-sensitive. Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). + The third cell is used to specify the irq priority from 0 (lowest) to 7 + (highest). - reg: Should contain AIC registers location and length - atmel,external-irqs: u32 array of external irqs.@@ -25,7 +27,7 @@ Examples: compatible = "atmel,at91rm9200-aic"; interrupt-controller; interrupt-parent; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0xfffff000 0x200>; };@@ -35,5 +37,5 @@ Examples: dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 5>; };arch/arm/boot/dts/at91sam9260.dtsi +18
-18@@ -52,7 +52,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -82,25 +82,25 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 18 4 19 4>; + interrupts = <17 4 0 18 4 0 19 4 0>; }; tcb1: timer at fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; - interrupts = <26 4 27 4 28 4>; + interrupts = <26 4 0 27 4 0 28 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -109,7 +109,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -118,7 +118,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -127,14 +127,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -143,7 +143,7 @@ usart1: serial at fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -152,7 +152,7 @@ usart2: serial at fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -161,7 +161,7 @@ usart3: serial at fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; - interrupts = <23 4>; + interrupts = <23 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -170,7 +170,7 @@ usart4: serial at fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; - interrupts = <24 4>; + interrupts = <24 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -179,7 +179,7 @@ usart5: serial at fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; - interrupts = <25 4>; + interrupts = <25 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -188,21 +188,21 @@ macb0: ethernet at fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget at fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; - interrupts = <10 4>; + interrupts = <10 4 2>; status = "disabled"; }; adc0: adc at fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; - interrupts = <5 4>; + interrupts = <5 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>;@@ -254,7 +254,7 @@ usb0: ohci at 00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; - interrupts = <20 4>; + interrupts = <20 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9263.dtsi +15
-15@@ -48,7 +48,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -69,13 +69,13 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; }; rstc at fffffd00 {@@ -91,7 +91,7 @@ pioA: gpio at fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -100,7 +100,7 @@ pioB: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -109,7 +109,7 @@ pioC: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -118,7 +118,7 @@ pioD: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -127,7 +127,7 @@ pioE: gpio at fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -136,14 +136,14 @@ dbgu: serial at ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -152,7 +152,7 @@ usart1: serial at fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -161,7 +161,7 @@ usart2: serial at fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -170,14 +170,14 @@ macb0: ethernet at fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget at fff78000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfff78000 0x4000>; - interrupts = <24 4>; + interrupts = <24 4 2>; status = "disabled"; }; };@@ -201,7 +201,7 @@ usb0: ohci at 00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; - interrupts = <29 4>; + interrupts = <29 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9g45.dtsi +19
-19@@ -53,7 +53,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -79,7 +79,7 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; };@@ -91,25 +91,25 @@ tcb0: timer at fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; tcb1: timer at fffd4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffd4000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio at fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -118,7 +118,7 @@ pioB: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -127,7 +127,7 @@ pioC: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -136,7 +136,7 @@ pioD: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -145,7 +145,7 @@ pioE: gpio at fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -154,14 +154,14 @@ dbgu: serial at ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -170,7 +170,7 @@ usart1: serial at fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -179,7 +179,7 @@ usart2: serial at fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -188,7 +188,7 @@ usart3: serial at fff98000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff98000 0x200>; - interrupts = <10 4>; + interrupts = <10 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -197,14 +197,14 @@ macb0: ethernet at fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <25 4>; + interrupts = <25 4 3>; status = "disabled"; }; adc0: adc at fffb0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffb0000 0x100>; - interrupts = <20 4>; + interrupts = <20 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>;@@ -258,14 +258,14 @@ usb0: ohci at 00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci at 00800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9n12.dtsi +15
-15@@ -50,7 +50,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -74,7 +74,7 @@ pit: timer at fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; shdwc at fffffe10 {@@ -85,25 +85,25 @@ tcb0: timer at f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer at f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -112,7 +112,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -121,7 +121,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -130,7 +130,7 @@ pioD: gpio at fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -139,14 +139,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -155,7 +155,7 @@ usart1: serial at f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -164,7 +164,7 @@ usart2: serial at f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -173,7 +173,7 @@ usart3: serial at f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -201,7 +201,7 @@ usb0: ohci at 00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9x5.dtsi +19
-19@@ -51,7 +51,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -81,37 +81,37 @@ pit: timer at fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer at f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma0: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; dma1: dma-controller at ffffee00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffee00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -120,7 +120,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -129,7 +129,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -138,7 +138,7 @@ pioD: gpio at fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -147,14 +147,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -163,7 +163,7 @@ usart1: serial at f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -172,7 +172,7 @@ usart2: serial at f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -181,21 +181,21 @@ macb0: ethernet at f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <24 4>; + interrupts = <24 4 3>; status = "disabled"; }; macb1: ethernet at f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; - interrupts = <27 4>; + interrupts = <27 4 3>; status = "disabled"; }; adc0: adc at f804c000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; atmel,adc-use-external; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>;@@ -249,14 +249,14 @@ usb0: ohci at 00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci at 00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };arch/arm/mach-at91/include/mach/at91_aic.h +3
-0@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; .extern at91_aic_base#endif +#define AT91_AIC_IRQ_MIN_PRIORITY 0 +#define AT91_AIC_IRQ_MAX_PRIORITY 7 +#define AT91_AIC_SMR (n) ((n) * 4)/* Source Mode Registers 0-31 */ #define AT91_AIC_PRIOR (7 << 0)/* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5)/* Interrupt Source Type */ arch/arm/mach-at91/irq.c +31
-3@@ -30,6 +30,7 @@#include <linux/of_irq.h> #include <linux/irqdomain.h> #include <linux/err.h> +#include <linux/slab.h> #include <mach/hardware.h> #include <asm/irq.h> @@ -42,6 +43,7 @@void __iomem *at91_aic_base;static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np; +static unsigned int *at91_aic_irq_priorities;static void at91_aic_mask_irq (struct irq_data *d) {@@ -177,8 +179,9 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,/* Put virq number in Source Vector Register */ at91_aic_write (AT91_AIC_SVR (hw), virq); -/* Active Low interrupt, without priority */ -at91_aic_write (AT91_AIC_SMR (hw),AT91_AIC_SRCTYPE_LOW ); +/* Active Low interrupt, with priority */ +at91_aic_write (AT91_AIC_SMR (hw), +AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);irq_set_chip_and_handler (virq, &at91_aic_chip, handle_fasteoi_irq);set_irq_flags (virq,IRQF_VALID |IRQF_PROBE );@@ -186,9 +189,28 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,return 0 ; } +static int at91_aic_irq_domain_xlate (struct irq_domain *d,struct device_node *ctrlr, +const u32 *intspec,unsigned int intsize, +irq_hw_number_t *out_hwirq,unsigned int *out_type) +{ +if (WARN_ON (intsize <3 )) +return -EINVAL ; +if (WARN_ON (intspec[0 ] >=NR_AIC_IRQS )) +return -EINVAL ; +if (WARN_ON ((intspec[2 ] <AT91_AIC_IRQ_MIN_PRIORITY ) + || (intspec[2 ] >AT91_AIC_IRQ_MAX_PRIORITY ))) +return -EINVAL ; + + *out_hwirq = intspec[0 ]; + *out_type = intspec[1 ] &IRQ_TYPE_SENSE_MASK ; + at91_aic_irq_priorities[*out_hwirq] = intspec[2 ]; + +return 0 ; +} +static struct irq_domain_ops at91_aic_irq_ops = { .map = at91_aic_irq_map, - .xlate = irq_domain_xlate_twocell, + .xlate = at91_aic_irq_domain_xlate, }; int __init at91_aic_of_init(struct device_node *node,@@ -198,6 +220,12 @@ int __init at91_aic_of_init(struct device_node *node,const __be32 *p;u32 val; + at91_aic_irq_priorities =kzalloc (NR_AIC_IRQS + *sizeof (*at91_aic_irq_priorities), +GFP_KERNEL ); +if (!at91_aic_irq_priorities) +return -ENOMEM ; + at91_aic_base =of_iomap (node,0 ); at91_aic_np = node;
PATCH v3 2/7 ARM: at91: add of irq priorities support
In reply to ludovic.desroches at atmel.comOn 06/23/2012 06:05 PM, ludovic.desroches at atmel.com :
Quoted 5 lines
From: Ludovic Desroches <[email protected]>
Add a third cell to define irq priority.
Signed-off-by Ludovic Desroches <[email protected]>
Quoted 890 lines
--- .../devicetree/bindings/arm/atmel-aic.txt | 8 +++-- arch/arm/boot/dts/at91sam9260.dtsi | 36 +++++++++--------- arch/arm/boot/dts/at91sam9263.dtsi | 30 ++++++++-------- arch/arm/boot/dts/at91sam9g45.dtsi | 38 ++++++++++---------- arch/arm/boot/dts/at91sam9n12.dtsi | 30 ++++++++-------- arch/arm/boot/dts/at91sam9x5.dtsi | 38 ++++++++++---------- arch/arm/mach-at91/include/mach/at91_aic.h | 3 ++ arch/arm/mach-at91/irq.c | 34 ++++++++++++++++-- 8 files changed, 125 insertions(+), 92 deletions(-)Documentation/devicetree/bindings/arm/atmel-aic.txt +5
-3@@ -4,7 +4,7 @@ Required properties: - compatible: Should be "atmel,<chip>-aic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. +- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The second cell is used to specify flags: bits[3:0] trigger type and level flags:@@ -14,6 +14,8 @@ Required properties: 8 = active low level-sensitive. Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). + The third cell is used to specify the irq priority from 0 (lowest) to 7 + (highest). - reg: Should contain AIC registers location and length - atmel,external-irqs: u32 array of external irqs.@@ -25,7 +27,7 @@ Examples: compatible = "atmel,at91rm9200-aic"; interrupt-controller; interrupt-parent; - #interrupt-cells = <2>; + #interrupt-cells = <3>; reg = <0xfffff000 0x200>; };@@ -35,5 +37,5 @@ Examples: dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 5>; };arch/arm/boot/dts/at91sam9260.dtsi +18
-18@@ -52,7 +52,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -82,25 +82,25 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 18 4 19 4>; + interrupts = <17 4 0 18 4 0 19 4 0>; }; tcb1: timer at fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; - interrupts = <26 4 27 4 28 4>; + interrupts = <26 4 0 27 4 0 28 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -109,7 +109,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -118,7 +118,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -127,14 +127,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -143,7 +143,7 @@ usart1: serial at fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -152,7 +152,7 @@ usart2: serial at fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -161,7 +161,7 @@ usart3: serial at fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; - interrupts = <23 4>; + interrupts = <23 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -170,7 +170,7 @@ usart4: serial at fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; - interrupts = <24 4>; + interrupts = <24 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -179,7 +179,7 @@ usart5: serial at fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; - interrupts = <25 4>; + interrupts = <25 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -188,21 +188,21 @@ macb0: ethernet at fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget at fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; - interrupts = <10 4>; + interrupts = <10 4 2>; status = "disabled"; }; adc0: adc at fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; - interrupts = <5 4>; + interrupts = <5 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>;@@ -254,7 +254,7 @@ usb0: ohci at 00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; - interrupts = <20 4>; + interrupts = <20 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9263.dtsi +15
-15@@ -48,7 +48,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -69,13 +69,13 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; }; rstc at fffffd00 {@@ -91,7 +91,7 @@ pioA: gpio at fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -100,7 +100,7 @@ pioB: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -109,7 +109,7 @@ pioC: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -118,7 +118,7 @@ pioD: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -127,7 +127,7 @@ pioE: gpio at fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -136,14 +136,14 @@ dbgu: serial at ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -152,7 +152,7 @@ usart1: serial at fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -161,7 +161,7 @@ usart2: serial at fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -170,14 +170,14 @@ macb0: ethernet at fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <21 4>; + interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget at fff78000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfff78000 0x4000>; - interrupts = <24 4>; + interrupts = <24 4 2>; status = "disabled"; }; };@@ -201,7 +201,7 @@ usb0: ohci at 00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; - interrupts = <29 4>; + interrupts = <29 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9g45.dtsi +19
-19@@ -53,7 +53,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -79,7 +79,7 @@ pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; };@@ -91,25 +91,25 @@ tcb0: timer at fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; tcb1: timer at fffd4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffd4000 0x100>; - interrupts = <18 4>; + interrupts = <18 4 0>; }; dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio at fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -118,7 +118,7 @@ pioB: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -127,7 +127,7 @@ pioC: gpio at fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4>; + interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -136,7 +136,7 @@ pioD: gpio at fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -145,7 +145,7 @@ pioE: gpio at fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <5 4>; + interrupts = <5 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -154,14 +154,14 @@ dbgu: serial at ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -170,7 +170,7 @@ usart1: serial at fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -179,7 +179,7 @@ usart2: serial at fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4>; + interrupts = <9 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -188,7 +188,7 @@ usart3: serial at fff98000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff98000 0x200>; - interrupts = <10 4>; + interrupts = <10 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -197,14 +197,14 @@ macb0: ethernet at fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <25 4>; + interrupts = <25 4 3>; status = "disabled"; }; adc0: adc at fffb0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffb0000 0x100>; - interrupts = <20 4>; + interrupts = <20 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>;@@ -258,14 +258,14 @@ usb0: ohci at 00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci at 00800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9n12.dtsi +15
-15@@ -50,7 +50,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -74,7 +74,7 @@ pit: timer at fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; shdwc at fffffe10 {@@ -85,25 +85,25 @@ tcb0: timer at f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer at f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -112,7 +112,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -121,7 +121,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -130,7 +130,7 @@ pioD: gpio at fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -139,14 +139,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -155,7 +155,7 @@ usart1: serial at f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -164,7 +164,7 @@ usart2: serial at f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -173,7 +173,7 @@ usart3: serial at f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; - interrupts = <8 4>; + interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -201,7 +201,7 @@ usb0: ohci at 00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };arch/arm/boot/dts/at91sam9x5.dtsi +19
-19@@ -51,7 +51,7 @@ ranges; aic: interrupt-controller at fffff000 { - #interrupt-cells = <2>; + #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>;@@ -81,37 +81,37 @@ pit: timer at fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4>; + interrupts = <1 4 7>; }; tcb0: timer at f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; tcb1: timer at f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4>; + interrupts = <17 4 0>; }; dma0: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4>; + interrupts = <20 4 0>; }; dma1: dma-controller at ffffee00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffee00 0x200>; - interrupts = <21 4>; + interrupts = <21 4 0>; }; pioA: gpio at fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -120,7 +120,7 @@ pioB: gpio at fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4>; + interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -129,7 +129,7 @@ pioC: gpio at fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -138,7 +138,7 @@ pioD: gpio at fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4>; + interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller;@@ -147,14 +147,14 @@ dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4>; + interrupts = <1 4 7>; status = "disabled"; }; usart0: serial at f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; - interrupts = <5 4>; + interrupts = <5 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -163,7 +163,7 @@ usart1: serial at f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; - interrupts = <6 4>; + interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -172,7 +172,7 @@ usart2: serial at f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; - interrupts = <7 4>; + interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled";@@ -181,21 +181,21 @@ macb0: ethernet at f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <24 4>; + interrupts = <24 4 3>; status = "disabled"; }; macb1: ethernet at f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; - interrupts = <27 4>; + interrupts = <27 4 3>; status = "disabled"; }; adc0: adc at f804c000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; - interrupts = <19 4>; + interrupts = <19 4 0>; atmel,adc-use-external; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>;@@ -249,14 +249,14 @@ usb0: ohci at 00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; usb1: ehci at 00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <22 4>; + interrupts = <22 4 2>; status = "disabled"; }; };arch/arm/mach-at91/include/mach/at91_aic.h +3
-0@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; .extern at91_aic_base#endif +#define AT91_AIC_IRQ_MIN_PRIORITY 0 +#define AT91_AIC_IRQ_MAX_PRIORITY 7 +#define AT91_AIC_SMR (n) ((n) * 4)/* Source Mode Registers 0-31 */ #define AT91_AIC_PRIOR (7 << 0)/* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5)/* Interrupt Source Type */ arch/arm/mach-at91/irq.c +31
-3@@ -30,6 +30,7 @@#include <linux/of_irq.h> #include <linux/irqdomain.h> #include <linux/err.h> +#include <linux/slab.h> #include <mach/hardware.h> #include <asm/irq.h> @@ -42,6 +43,7 @@void __iomem *at91_aic_base;static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np; +static unsigned int *at91_aic_irq_priorities;static void at91_aic_mask_irq (struct irq_data *d) {@@ -177,8 +179,9 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,/* Put virq number in Source Vector Register */ at91_aic_write (AT91_AIC_SVR (hw), virq); -/* Active Low interrupt, without priority */ -at91_aic_write (AT91_AIC_SMR (hw),AT91_AIC_SRCTYPE_LOW ); +/* Active Low interrupt, with priority */ +at91_aic_write (AT91_AIC_SMR (hw), +AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);irq_set_chip_and_handler (virq, &at91_aic_chip, handle_fasteoi_irq);set_irq_flags (virq,IRQF_VALID |IRQF_PROBE );@@ -186,9 +189,28 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,return 0 ; } +static int at91_aic_irq_domain_xlate (struct irq_domain *d,struct device_node *ctrlr, +const u32 *intspec,unsigned int intsize, +irq_hw_number_t *out_hwirq,unsigned int *out_type) +{ +if (WARN_ON (intsize <3 )) +return -EINVAL ; +if (WARN_ON (intspec[0 ] >=NR_AIC_IRQS )) +return -EINVAL ; +if (WARN_ON ((intspec[2 ] <AT91_AIC_IRQ_MIN_PRIORITY ) + || (intspec[2 ] >AT91_AIC_IRQ_MAX_PRIORITY ))) +return -EINVAL ; + + *out_hwirq = intspec[0 ]; + *out_type = intspec[1 ] &IRQ_TYPE_SENSE_MASK ; + at91_aic_irq_priorities[*out_hwirq] = intspec[2 ]; + +return 0 ; +} +static struct irq_domain_ops at91_aic_irq_ops = { .map = at91_aic_irq_map, - .xlate = irq_domain_xlate_twocell, + .xlate = at91_aic_irq_domain_xlate, }; int __init at91_aic_of_init(struct device_node *node,@@ -198,6 +220,12 @@ int __init at91_aic_of_init(struct device_node *node,const __be32 *p;u32 val; + at91_aic_irq_priorities =kzalloc (NR_AIC_IRQS + *sizeof (*at91_aic_irq_priorities), +GFP_KERNEL ); +if (!at91_aic_irq_priorities) +return -ENOMEM ; + at91_aic_base =of_iomap (node,0 ); at91_aic_np = node;
Signature · 1 line
Nicolas Ferre
PATCH v3 3/7 ARM: at91: remove static irq priorities for sam9x5
In reply to ludovic.desroches at atmel.comFrom: Ludovic Desroches <[email protected]>
Since irq priorites are managed in DT, static ones are no more required for sam9x5 which only has DT support.
--- arch/arm/mach-at91/at91sam9x5.c | 38 -------------------------------------- 1 files changed, 0 insertions(+), 38 deletions(-)
arch/arm/mach-at91/at91sam9x5.c +0 -38
@@ -319,47 +319,9 @@ void __init at91sam9x5_initialize(void)/* -------------------------------------------------------------------- * Interrupt initialization * -------------------------------------------------------------------- */ -/* -* The default interrupt priority levels (0 = lowest, 7 = highest). -*/ -static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS ]__initdata = { -7 ,/* Advanced Interrupt Controller (FIQ) */ -7 ,/* System Peripherals */ -1 ,/* Parallel IO Controller A and B */ -1 ,/* Parallel IO Controller C and D */ -4 ,/* Soft Modem */ -5 ,/* USART 0 */ -5 ,/* USART 1 */ -5 ,/* USART 2 */ -5 ,/* USART 3 */ -6 ,/* Two-Wire Interface 0 */ -6 ,/* Two-Wire Interface 1 */ -6 ,/* Two-Wire Interface 2 */ -0 ,/* Multimedia Card Interface 0 */ -5 ,/* Serial Peripheral Interface 0 */ -5 ,/* Serial Peripheral Interface 1 */ -5 ,/* UART 0 */ -5 ,/* UART 1 */ -0 ,/* Timer Counter 0, 1, 2, 3, 4 and 5 */ -0 ,/* Pulse Width Modulation Controller */ -0 ,/* ADC Controller */ -0 ,/* DMA Controller 0 */ -0 ,/* DMA Controller 1 */ -2 ,/* USB Host High Speed port */ -2 ,/* USB Device High speed port */ -3 ,/* Ethernet MAC 0 */ -3 ,/* LDC Controller or Image Sensor Interface */ -0 ,/* Multimedia Card Interface 1 */ -3 ,/* Ethernet MAC 1 */ -4 ,/* Synchronous Serial Interface */ -4 ,/* CAN Controller 0 */ -4 ,/* CAN Controller 1 */ -0 ,/* Advanced Interrupt Controller (IRQ0) */ -};struct at91_init_soc __initdata at91sam9x5_soc = { .map_io = at91sam9x5_map_io, - .default_irq_priority = at91sam9x5_default_irq_priority, .register_clocks = at91sam9x5_register_clocks, .init = at91sam9x5_initialize, };
Signature · 1 line
1.7.5.4
PATCH v3 3/7 ARM: at91: remove static irq priorities for sam9x5
On 06/23/2012 06:05 PM, ludovic.desroches at atmel.com :
Quoted 6 lines
From: Ludovic Desroches <[email protected]>
Since irq priorites are managed in DT, static ones are no more required for sam9x5 which only has DT support.
Signed-off-by Ludovic Desroches <[email protected]>
Quoted 57 lines
--- arch/arm/mach-at91/at91sam9x5.c | 38 -------------------------------------- 1 files changed, 0 insertions(+), 38 deletions(-)arch/arm/mach-at91/at91sam9x5.c +0
-38@@ -319,47 +319,9 @@ void __init at91sam9x5_initialize(void)/* -------------------------------------------------------------------- * Interrupt initialization * -------------------------------------------------------------------- */ -/* -* The default interrupt priority levels (0 = lowest, 7 = highest). -*/ -static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS ]__initdata = { -7 ,/* Advanced Interrupt Controller (FIQ) */ -7 ,/* System Peripherals */ -1 ,/* Parallel IO Controller A and B */ -1 ,/* Parallel IO Controller C and D */ -4 ,/* Soft Modem */ -5 ,/* USART 0 */ -5 ,/* USART 1 */ -5 ,/* USART 2 */ -5 ,/* USART 3 */ -6 ,/* Two-Wire Interface 0 */ -6 ,/* Two-Wire Interface 1 */ -6 ,/* Two-Wire Interface 2 */ -0 ,/* Multimedia Card Interface 0 */ -5 ,/* Serial Peripheral Interface 0 */ -5 ,/* Serial Peripheral Interface 1 */ -5 ,/* UART 0 */ -5 ,/* UART 1 */ -0 ,/* Timer Counter 0, 1, 2, 3, 4 and 5 */ -0 ,/* Pulse Width Modulation Controller */ -0 ,/* ADC Controller */ -0 ,/* DMA Controller 0 */ -0 ,/* DMA Controller 1 */ -2 ,/* USB Host High Speed port */ -2 ,/* USB Device High speed port */ -3 ,/* Ethernet MAC 0 */ -3 ,/* LDC Controller or Image Sensor Interface */ -0 ,/* Multimedia Card Interface 1 */ -3 ,/* Ethernet MAC 1 */ -4 ,/* Synchronous Serial Interface */ -4 ,/* CAN Controller 0 */ -4 ,/* CAN Controller 1 */ -0 ,/* Advanced Interrupt Controller (IRQ0) */ -};struct at91_init_soc __initdata at91sam9x5_soc = { .map_io = at91sam9x5_map_io, - .default_irq_priority = at91sam9x5_default_irq_priority, .register_clocks = at91sam9x5_register_clocks, .init = at91sam9x5_initialize, };
Signature · 1 line
Nicolas Ferre
PATCH v3 4/7 ARM: at91: at91 based machines specify their own irq handler at run time
In reply to ludovic.desroches at atmel.comFrom: Ludovic Desroches <[email protected]>
SOC_AT91SAM9 selects MULTI_IRQ_HANDLER in order to let machines specify their own IRQ handler at run time.
--- arch/arm/mach-at91/Kconfig | 1 + arch/arm/mach-at91/board-1arm.c | 2 + arch/arm/mach-at91/board-afeb-9260v1.c | 2 + arch/arm/mach-at91/board-cam60.c | 2 + arch/arm/mach-at91/board-carmeva.c | 2 + arch/arm/mach-at91/board-cpu9krea.c | 2 + arch/arm/mach-at91/board-cpuat91.c | 2 + arch/arm/mach-at91/board-csb337.c | 2 + arch/arm/mach-at91/board-csb637.c | 2 + arch/arm/mach-at91/board-dt.c | 2 + arch/arm/mach-at91/board-eb01.c | 2 + arch/arm/mach-at91/board-eb9200.c | 2 + arch/arm/mach-at91/board-ecbat91.c | 2 + arch/arm/mach-at91/board-eco920.c | 2 + arch/arm/mach-at91/board-flexibity.c | 2 + arch/arm/mach-at91/board-foxg20.c | 2 + arch/arm/mach-at91/board-gsia18s.c | 2 + arch/arm/mach-at91/board-kafa.c | 2 + arch/arm/mach-at91/board-kb9202.c | 2 + arch/arm/mach-at91/board-neocore926.c | 2 + arch/arm/mach-at91/board-pcontrol-g20.c | 2 + arch/arm/mach-at91/board-picotux200.c | 2 + arch/arm/mach-at91/board-qil-a9260.c | 2 + arch/arm/mach-at91/board-rm9200dk.c | 2 + arch/arm/mach-at91/board-rm9200ek.c | 2 + arch/arm/mach-at91/board-rsi-ews.c | 2 + arch/arm/mach-at91/board-sam9-l9260.c | 2 + arch/arm/mach-at91/board-sam9260ek.c | 2 + arch/arm/mach-at91/board-sam9261ek.c | 2 + arch/arm/mach-at91/board-sam9263ek.c | 2 + arch/arm/mach-at91/board-sam9g20ek.c | 3 ++ arch/arm/mach-at91/board-sam9m10g45ek.c | 2 + arch/arm/mach-at91/board-sam9rlek.c | 2 + arch/arm/mach-at91/board-snapper9260.c | 2 + arch/arm/mach-at91/board-stamp9g20.c | 3 ++ arch/arm/mach-at91/board-usb-a926x.c | 4 +++ arch/arm/mach-at91/board-yl-9200.c | 2 + arch/arm/mach-at91/include/mach/at91_aic.h | 2 + arch/arm/mach-at91/include/mach/entry-macro.S | 27 ------------------------- arch/arm/mach-at91/irq.c | 19 +++++++++++++++++ 40 files changed, 98 insertions(+), 27 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/entry-macro.S
arch/arm/mach-at91/Kconfig +1 -0
@@ -29,6 +29,7 @@ comment "Atmel AT91 Processor" config SOC_AT91SAM9 bool select CPU_ARM926T + select MULTI_IRQ_HANDLER select AT91_SAM9_TIME select AT91_SAM9_SMC
arch/arm/mach-at91/board-1arm.c +2 -0
@@ -36,6 +36,7 @@#include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")/* Maintainer: Lennert Buytenhek <[email protected]> */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = onearm_init_early, .init_irq = at91_init_irq_default, .init_machine = onearm_board_init,
arch/arm/mach-at91/board-afeb-9260v1.c +2 -0
@@ -44,6 +44,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board")/* Maintainer: Sergey Lapin <[email protected]> */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = afeb9260_init_early, .init_irq = at91_init_irq_default, .init_machine = afeb9260_board_init,
arch/arm/mach-at91/board-cam60.c +2 -0
@@ -39,6 +39,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h"
@@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60")/* Maintainer: KwikByte */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cam60_init_early, .init_irq = at91_init_irq_default, .init_machine = cam60_board_init,
arch/arm/mach-at91/board-carmeva.c +2 -0
@@ -36,6 +36,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva")/* Maintainer: Conitec Datasystems */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = carmeva_init_early, .init_irq = at91_init_irq_default, .init_machine = carmeva_board_init,
arch/arm/mach-at91/board-cpu9krea.c +2 -0
@@ -41,6 +41,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91sam9260_matrix.h> #include <mach/at91_matrix.h>
@@ -376,6 +377,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")/* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cpu9krea_init_early, .init_irq = at91_init_irq_default, .init_machine = cpu9krea_board_init,
arch/arm/mach-at91/board-cpuat91.c +2 -0
@@ -37,6 +37,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h>
@@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea")/* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cpuat91_init_early, .init_irq = at91_init_irq_default, .init_machine = cpuat91_board_init,
arch/arm/mach-at91/board-csb337.c +2 -0
@@ -39,6 +39,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337")/* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = csb337_init_early, .init_irq = at91_init_irq_default, .init_machine = csb337_board_init,
arch/arm/mach-at91/board-csb637.c +2 -0
@@ -36,6 +36,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637")/* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = csb637_init_early, .init_irq = at91_init_irq_default, .init_machine = csb637_board_init,
arch/arm/mach-at91/board-dt.c +2 -0
@@ -16,6 +16,7 @@#include <linux/of_platform.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <asm/setup.h> #include <asm/irq.h>
@@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = at91_dt_initialize, .init_irq = at91_dt_init_irq, .init_machine = at91_dt_device_init,
arch/arm/mach-at91/board-eb01.c +2 -0
@@ -28,6 +28,7 @@#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" static void __init at91eb01_init_irq (void )
@@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void)MACHINE_START (AT91EB01 ,"Atmel AT91 EB01" )/* Maintainer: Greg Ungerer <[email protected]> */ .timer = &at91x40_timer, + .handle_irq = at91_aic_handle_irq, .init_early = at91eb01_init_early, .init_irq = at91eb01_init_irq,MACHINE_END
arch/arm/mach-at91/board-eb9200.c +2 -0
@@ -36,6 +36,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -118,6 +119,7 @@ static void __init eb9200_board_init(void)MACHINE_START (ATEB9200 ,"Embest ATEB9200" ) .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = eb9200_init_early, .init_irq = at91_init_irq_default, .init_machine = eb9200_board_init,
arch/arm/mach-at91/board-ecbat91.c +2 -0
@@ -39,6 +39,7 @@#include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91")/* Maintainer: emQbit.com */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ecb_at91init_early, .init_irq = at91_init_irq_default, .init_machine = ecb_at91board_init,
arch/arm/mach-at91/board-eco920.c +2 -0
@@ -25,6 +25,7 @@#include <asm/mach/map.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h>
@@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920")/* Maintainer: Sascha Hauer */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = eco920_init_early, .init_irq = at91_init_irq_default, .init_machine = eco920_board_init,
arch/arm/mach-at91/board-flexibity.c +2 -0
@@ -34,6 +34,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h"
@@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect")/* Maintainer: Maxim Osipov */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = flexibity_init_early, .init_irq = at91_init_irq_default, .init_machine = flexibity_board_init,
arch/arm/mach-at91/board-foxg20.c +2 -0
@@ -42,6 +42,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h"
@@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")/* Maintainer: Sergio Tanzilli */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = foxg20_init_early, .init_irq = at91_init_irq_default, .init_machine = foxg20_board_init,
arch/arm/mach-at91/board-gsia18s.c +2 -0
@@ -31,6 +31,7 @@#include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/gsia18s.h> #include <mach/stamp9g20.h>
@@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void)MACHINE_START (GSIA18S ,"GS_IA18_S" ) .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = gsia18s_init_early, .init_irq = at91_init_irq_default, .init_machine = gsia18s_board_init,
arch/arm/mach-at91/board-kafa.c +2 -0
@@ -35,6 +35,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/cpu.h> #include "generic.h"
@@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA")/* Maintainer: Sergei Sharonov */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = kafa_init_early, .init_irq = at91_init_irq_default, .init_machine = kafa_board_init,
arch/arm/mach-at91/board-kb9202.c +2 -0
@@ -37,6 +37,7 @@#include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h>
@@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x")/* Maintainer: KwikByte, Inc. */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = kb9202_init_early, .init_irq = at91_init_irq_default, .init_machine = kb9202_board_init,
arch/arm/mach-at91/board-neocore926.c +2 -0
@@ -45,6 +45,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h"
@@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")/* Maintainer: ADENEO */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = neocore926_init_early, .init_irq = at91_init_irq_default, .init_machine = neocore926_board_init,
arch/arm/mach-at91/board-pcontrol-g20.c +2 -0
@@ -30,6 +30,7 @@#include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/stamp9g20.h>
@@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20")/* Maintainer: pgsellmann at portner-elektronik.at */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = pcontrol_g20_init_early, .init_irq = at91_init_irq_default, .init_machine = pcontrol_g20_board_init,
arch/arm/mach-at91/board-picotux200.c +2 -0
@@ -38,6 +38,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h>
@@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200")/* Maintainer: Kleinhenz Elektronik GmbH */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = picotux200_init_early, .init_irq = at91_init_irq_default, .init_machine = picotux200_board_init,
arch/arm/mach-at91/board-qil-a9260.c +2 -0
@@ -41,6 +41,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h>
@@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260")/* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-rm9200dk.c +2 -0
@@ -40,6 +40,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h>
@@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")/* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = dk_init_early, .init_irq = at91_init_irq_default, .init_machine = dk_board_init,
arch/arm/mach-at91/board-rm9200ek.c +2 -0
@@ -40,6 +40,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h>
@@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")/* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-rsi-ews.c +2 -0
@@ -26,6 +26,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <linux/gpio.h>
@@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS")/* Maintainer: Josef Holzmayr <[email protected]> */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = rsi_ews_init_early, .init_irq = at91_init_irq_default, .init_machine = rsi_ews_board_init,
arch/arm/mach-at91/board-sam9-l9260.c +2 -0
@@ -38,6 +38,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h"
@@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")/* Maintainer: Olimex */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-sam9260ek.c +2 -0
@@ -42,6 +42,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h>
@@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-sam9261ek.c +2 -0
@@ -46,6 +46,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h>
@@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-sam9263ek.c +2 -0
@@ -45,6 +45,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h>
@@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-sam9g20ek.c +3 -0
@@ -44,6 +44,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/system_rev.h>
@@ -413,6 +414,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
@@ -422,6 +424,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-sam9m10g45ek.c +2 -0
@@ -43,6 +43,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h>
@@ -503,6 +504,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-sam9rlek.c +2 -0
@@ -31,6 +31,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h>
@@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-snapper9260.c +2 -0
@@ -33,6 +33,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h"
@@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void)MACHINE_START (SNAPPER_9260 ,"Bluewater Systems Snapper 9260/9G20 module" ) .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = snapper9260_init_early, .init_irq = at91_init_irq_default, .init_machine = snapper9260_board_init,
arch/arm/mach-at91/board-stamp9g20.c +3 -0
@@ -26,6 +26,7 @@#include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h"
@@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")/* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = portuxg20_board_init,
@@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")/* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = stamp9g20evb_board_init,
arch/arm/mach-at91/board-usb-a926x.c +4 -0
@@ -42,6 +42,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h>
@@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263")/* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
@@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260")/* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
@@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0")/* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,
arch/arm/mach-at91/board-yl-9200.c +2 -0
@@ -44,6 +44,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h>
@@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200")/* Maintainer: S.Birtles */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = yl9200_init_early, .init_irq = at91_init_irq_default, .init_machine = yl9200_board_init,
arch/arm/mach-at91/include/mach/at91_aic.h +2 -0
@@ -65,4 +65,6 @@ extern void __iomem *at91_aic_base;#define AT91_AIC_FFDR 0x144/* Fast Forcing Disable Register [SAM9 only] */ #define AT91_AIC_FFSR 0x148/* Fast Forcing Status Register [SAM9 only] */ +void at91_aic_handle_irq (struct pt_regs *regs); +#endif
arch/arm/mach-at91/include/mach/entry-macro.S deleted +0 -27
@@ -1,27 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/entry-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Low-level IRQ helper macros for AT91RM9200 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/hardware.h> -#include <mach/at91_aic.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =at91_aic_base @ base virtual address of AIC peripheral - ldr \base, [\base] - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) - ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number - teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt - streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. - .endm -
arch/arm/mach-at91/irq.c +19 -0
@@ -36,6 +36,7 @@#include <asm/irq.h> #include <asm/setup.h> +#include <asm/exception.h> #include <asm/mach/arch.h> #include <asm/mach/irq.h> #include <asm/mach/map.h>
@@ -45,6 +46,24 @@ static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np;static unsigned int *at91_aic_irq_priorities; +asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) +{ +u32 irqnr; +u32 irqstat; + + irqnr =at91_aic_read (AT91_AIC_IVR ); + irqstat =at91_aic_read (AT91_AIC_ISR ); + +/* +* ISR value is 0 when there is no current interrupt or when there is +* a spurious interrupt +*/ +if (!irqstat) +at91_aic_write (AT91_AIC_EOICR ,0 ); +else +handle_IRQ (irqnr, regs); +} +static void at91_aic_mask_irq (struct irq_data *d) {/* Disable interrupt on AIC */
Signature · 1 line
1.7.5.4
PATCH v3 4/7 ARM: at91: at91 based machines specify their own irq handler at run time
On 06/23/2012 06:05 PM, ludovic.desroches at atmel.com :
Quoted 6 lines
From: Ludovic Desroches <[email protected]>
SOC_AT91SAM9selectsMULTI_IRQ_HANDLERin order to let machines specify their own IRQ handler at run time.Signed-off-by Ludovic Desroches <[email protected]>
Quoted 890 lines
--- arch/arm/mach-at91/Kconfig | 1 + arch/arm/mach-at91/board-1arm.c | 2 + arch/arm/mach-at91/board-afeb-9260v1.c | 2 + arch/arm/mach-at91/board-cam60.c | 2 + arch/arm/mach-at91/board-carmeva.c | 2 + arch/arm/mach-at91/board-cpu9krea.c | 2 + arch/arm/mach-at91/board-cpuat91.c | 2 + arch/arm/mach-at91/board-csb337.c | 2 + arch/arm/mach-at91/board-csb637.c | 2 + arch/arm/mach-at91/board-dt.c | 2 + arch/arm/mach-at91/board-eb01.c | 2 + arch/arm/mach-at91/board-eb9200.c | 2 + arch/arm/mach-at91/board-ecbat91.c | 2 + arch/arm/mach-at91/board-eco920.c | 2 + arch/arm/mach-at91/board-flexibity.c | 2 + arch/arm/mach-at91/board-foxg20.c | 2 + arch/arm/mach-at91/board-gsia18s.c | 2 + arch/arm/mach-at91/board-kafa.c | 2 + arch/arm/mach-at91/board-kb9202.c | 2 + arch/arm/mach-at91/board-neocore926.c | 2 + arch/arm/mach-at91/board-pcontrol-g20.c | 2 + arch/arm/mach-at91/board-picotux200.c | 2 + arch/arm/mach-at91/board-qil-a9260.c | 2 + arch/arm/mach-at91/board-rm9200dk.c | 2 + arch/arm/mach-at91/board-rm9200ek.c | 2 + arch/arm/mach-at91/board-rsi-ews.c | 2 + arch/arm/mach-at91/board-sam9-l9260.c | 2 + arch/arm/mach-at91/board-sam9260ek.c | 2 + arch/arm/mach-at91/board-sam9261ek.c | 2 + arch/arm/mach-at91/board-sam9263ek.c | 2 + arch/arm/mach-at91/board-sam9g20ek.c | 3 ++ arch/arm/mach-at91/board-sam9m10g45ek.c | 2 + arch/arm/mach-at91/board-sam9rlek.c | 2 + arch/arm/mach-at91/board-snapper9260.c | 2 + arch/arm/mach-at91/board-stamp9g20.c | 3 ++ arch/arm/mach-at91/board-usb-a926x.c | 4 +++ arch/arm/mach-at91/board-yl-9200.c | 2 + arch/arm/mach-at91/include/mach/at91_aic.h | 2 + arch/arm/mach-at91/include/mach/entry-macro.S | 27 ------------------------- arch/arm/mach-at91/irq.c | 19 +++++++++++++++++ 40 files changed, 98 insertions(+), 27 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/entry-macro.Sarch/arm/mach-at91/Kconfig +1
-0@@ -29,6 +29,7 @@ comment "Atmel AT91 Processor" config SOC_AT91SAM9 bool select CPU_ARM926T + select MULTI_IRQ_HANDLER select AT91_SAM9_TIME select AT91_SAM9_SMCarch/arm/mach-at91/board-1arm.c +2
-0@@ -36,6 +36,7 @@#include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -91,6 +92,7 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")/* Maintainer: Lennert Buytenhek <[email protected]> */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = onearm_init_early, .init_irq = at91_init_irq_default, .init_machine = onearm_board_init,arch/arm/mach-at91/board-afeb-9260v1.c +2
-0@@ -44,6 +44,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -212,6 +213,7 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board")/* Maintainer: Sergey Lapin <[email protected]> */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = afeb9260_init_early, .init_irq = at91_init_irq_default, .init_machine = afeb9260_board_init,arch/arm/mach-at91/board-cam60.c +2
-0@@ -39,6 +39,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -188,6 +189,7 @@ MACHINE_START(CAM60, "KwikByte CAM60")/* Maintainer: KwikByte */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cam60_init_early, .init_irq = at91_init_irq_default, .init_machine = cam60_board_init,arch/arm/mach-at91/board-carmeva.c +2
-0@@ -36,6 +36,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -158,6 +159,7 @@ MACHINE_START(CARMEVA, "Carmeva")/* Maintainer: Conitec Datasystems */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = carmeva_init_early, .init_irq = at91_init_irq_default, .init_machine = carmeva_board_init,arch/arm/mach-at91/board-cpu9krea.c +2
-0@@ -41,6 +41,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91sam9260_matrix.h> #include <mach/at91_matrix.h> @@ -376,6 +377,7 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")/* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cpu9krea_init_early, .init_irq = at91_init_irq_default, .init_machine = cpu9krea_board_init,arch/arm/mach-at91/board-cpuat91.c +2
-0@@ -37,6 +37,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> @@ -178,6 +179,7 @@ MACHINE_START(CPUAT91, "Eukrea")/* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = cpuat91_init_early, .init_irq = at91_init_irq_default, .init_machine = cpuat91_board_init,arch/arm/mach-at91/board-csb337.c +2
-0@@ -39,6 +39,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -252,6 +253,7 @@ MACHINE_START(CSB337, "Cogent CSB337")/* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = csb337_init_early, .init_irq = at91_init_irq_default, .init_machine = csb337_board_init,arch/arm/mach-at91/board-csb637.c +2
-0@@ -36,6 +36,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -133,6 +134,7 @@ MACHINE_START(CSB637, "Cogent CSB637")/* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = csb637_init_early, .init_irq = at91_init_irq_default, .init_machine = csb637_board_init,arch/arm/mach-at91/board-dt.c +2
-0@@ -16,6 +16,7 @@#include <linux/of_platform.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <asm/setup.h> #include <asm/irq.h> @@ -53,6 +54,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = at91_dt_initialize, .init_irq = at91_dt_init_irq, .init_machine = at91_dt_device_init,arch/arm/mach-at91/board-eb01.c +2
-0@@ -28,6 +28,7 @@#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" static void __init at91eb01_init_irq (void )@@ -43,6 +44,7 @@ static void __init at91eb01_init_early(void)MACHINE_START (AT91EB01 ,"Atmel AT91 EB01" )/* Maintainer: Greg Ungerer <[email protected]> */ .timer = &at91x40_timer, + .handle_irq = at91_aic_handle_irq, .init_early = at91eb01_init_early, .init_irq = at91eb01_init_irq,MACHINE_END arch/arm/mach-at91/board-eb9200.c +2
-0@@ -36,6 +36,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -118,6 +119,7 @@ static void __init eb9200_board_init(void)MACHINE_START (ATEB9200 ,"Embest ATEB9200" ) .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = eb9200_init_early, .init_irq = at91_init_irq_default, .init_machine = eb9200_board_init,arch/arm/mach-at91/board-ecbat91.c +2
-0@@ -39,6 +39,7 @@#include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -170,6 +171,7 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91")/* Maintainer: emQbit.com */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ecb_at91init_early, .init_irq = at91_init_irq_default, .init_machine = ecb_at91board_init,arch/arm/mach-at91/board-eco920.c +2
-0@@ -25,6 +25,7 @@#include <asm/mach/map.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> @@ -132,6 +133,7 @@ MACHINE_START(ECO920, "eco920")/* Maintainer: Sascha Hauer */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = eco920_init_early, .init_irq = at91_init_irq_default, .init_machine = eco920_board_init,arch/arm/mach-at91/board-flexibity.c +2
-0@@ -34,6 +34,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include "generic.h" @@ -160,6 +161,7 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect")/* Maintainer: Maxim Osipov */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = flexibity_init_early, .init_irq = at91_init_irq_default, .init_machine = flexibity_board_init,arch/arm/mach-at91/board-foxg20.c +2
-0@@ -42,6 +42,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -262,6 +263,7 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")/* Maintainer: Sergio Tanzilli */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = foxg20_init_early, .init_irq = at91_init_irq_default, .init_machine = foxg20_board_init,arch/arm/mach-at91/board-gsia18s.c +2
-0@@ -31,6 +31,7 @@#include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/gsia18s.h> #include <mach/stamp9g20.h> @@ -575,6 +576,7 @@ static void __init gsia18s_board_init(void)MACHINE_START (GSIA18S ,"GS_IA18_S" ) .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = gsia18s_init_early, .init_irq = at91_init_irq_default, .init_machine = gsia18s_board_init,arch/arm/mach-at91/board-kafa.c +2
-0@@ -35,6 +35,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/cpu.h> #include "generic.h" @@ -93,6 +94,7 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA")/* Maintainer: Sergei Sharonov */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = kafa_init_early, .init_irq = at91_init_irq_default, .init_machine = kafa_board_init,arch/arm/mach-at91/board-kb9202.c +2
-0@@ -37,6 +37,7 @@#include <mach/board.h> #include <mach/cpu.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -133,6 +134,7 @@ MACHINE_START(KB9200, "KB920x")/* Maintainer: KwikByte, Inc. */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = kb9202_init_early, .init_irq = at91_init_irq_default, .init_machine = kb9202_board_init,arch/arm/mach-at91/board-neocore926.c +2
-0@@ -45,6 +45,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -378,6 +379,7 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")/* Maintainer: ADENEO */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = neocore926_init_early, .init_irq = at91_init_irq_default, .init_machine = neocore926_board_init,arch/arm/mach-at91/board-pcontrol-g20.c +2
-0@@ -30,6 +30,7 @@#include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/stamp9g20.h> @@ -218,6 +219,7 @@ MACHINE_START(PCONTROL_G20, "PControl G20")/* Maintainer: pgsellmann at portner-elektronik.at */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = pcontrol_g20_init_early, .init_irq = at91_init_irq_default, .init_machine = pcontrol_g20_board_init,arch/arm/mach-at91/board-picotux200.c +2
-0@@ -38,6 +38,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -120,6 +121,7 @@ MACHINE_START(PICOTUX2XX, "picotux 200")/* Maintainer: Kleinhenz Elektronik GmbH */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = picotux200_init_early, .init_irq = at91_init_irq_default, .init_machine = picotux200_board_init,arch/arm/mach-at91/board-qil-a9260.c +2
-0@@ -41,6 +41,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> @@ -258,6 +259,7 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260")/* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-rm9200dk.c +2
-0@@ -40,6 +40,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -223,6 +224,7 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")/* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = dk_init_early, .init_irq = at91_init_irq_default, .init_machine = dk_board_init,arch/arm/mach-at91/board-rm9200ek.c +2
-0@@ -40,6 +40,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> @@ -190,6 +191,7 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")/* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-rsi-ews.c +2
-0@@ -26,6 +26,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <linux/gpio.h> @@ -225,6 +226,7 @@ MACHINE_START(RSI_EWS, "RSI EWS")/* Maintainer: Josef Holzmayr <[email protected]> */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = rsi_ews_init_early, .init_irq = at91_init_irq_default, .init_machine = rsi_ews_board_init,arch/arm/mach-at91/board-sam9-l9260.c +2
-0@@ -38,6 +38,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -202,6 +203,7 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")/* Maintainer: Olimex */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-sam9260ek.c +2
-0@@ -42,6 +42,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -344,6 +345,7 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-sam9261ek.c +2
-0@@ -46,6 +46,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -615,6 +616,7 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-sam9263ek.c +2
-0@@ -45,6 +45,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -443,6 +444,7 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-sam9g20ek.c +3
-0@@ -44,6 +44,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/system_rev.h> @@ -413,6 +414,7 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,@@ -422,6 +424,7 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-sam9m10g45ek.c +2
-0@@ -43,6 +43,7 @@#include <asm/mach/irq.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> #include <mach/system_rev.h> @@ -503,6 +504,7 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-sam9rlek.c +2
-0@@ -31,6 +31,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> @@ -319,6 +320,7 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")/* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-snapper9260.c +2
-0@@ -33,6 +33,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -178,6 +179,7 @@ static void __init snapper9260_board_init(void)MACHINE_START (SNAPPER_9260 ,"Bluewater Systems Snapper 9260/9G20 module" ) .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = snapper9260_init_early, .init_irq = at91_init_irq_default, .init_machine = snapper9260_board_init,arch/arm/mach-at91/board-stamp9g20.c +3
-0@@ -26,6 +26,7 @@#include <asm/mach/arch.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" @@ -287,6 +288,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")/* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = portuxg20_board_init,@@ -296,6 +298,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")/* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = stamp9g20evb_board_init,arch/arm/mach-at91/board-usb-a926x.c +4
-0@@ -42,6 +42,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91sam9_smc.h> #include <mach/at91_shdwc.h> @@ -358,6 +359,7 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263")/* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,@@ -367,6 +369,7 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260")/* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,@@ -376,6 +379,7 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0")/* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ .timer = &at91sam926x_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init,arch/arm/mach-at91/board-yl-9200.c +2
-0@@ -44,6 +44,7 @@#include <mach/hardware.h> #include <mach/board.h> +#include <mach/at91_aic.h> #include <mach/at91rm9200_mc.h> #include <mach/at91_ramc.h> #include <mach/cpu.h> @@ -590,6 +591,7 @@ MACHINE_START(YL9200, "uCdragon YL-9200")/* Maintainer: S.Birtles */ .timer = &at91rm9200_timer, .map_io = at91_map_io, + .handle_irq = at91_aic_handle_irq, .init_early = yl9200_init_early, .init_irq = at91_init_irq_default, .init_machine = yl9200_board_init,arch/arm/mach-at91/include/mach/at91_aic.h +2
-0@@ -65,4 +65,6 @@ extern void __iomem *at91_aic_base;#define AT91_AIC_FFDR 0x144/* Fast Forcing Disable Register [SAM9 only] */ #define AT91_AIC_FFSR 0x148/* Fast Forcing Status Register [SAM9 only] */ +void at91_aic_handle_irq (struct pt_regs *regs); +#endif arch/arm/mach-at91/include/mach/entry-macro.S deleted +0
-27@@ -1,27 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/entry-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Low-level IRQ helper macros for AT91RM9200 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/hardware.h> -#include <mach/at91_aic.h> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =at91_aic_base @ base virtual address of AIC peripheral - ldr \base, [\base] - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) - ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number - teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt - streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. - .endm -arch/arm/mach-at91/irq.c +19
-0@@ -36,6 +36,7 @@#include <asm/irq.h> #include <asm/setup.h> +#include <asm/exception.h> #include <asm/mach/arch.h> #include <asm/mach/irq.h> #include <asm/mach/map.h> @@ -45,6 +46,24 @@ static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np;static unsigned int *at91_aic_irq_priorities; +asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) +{ +u32 irqnr; +u32 irqstat; + + irqnr =at91_aic_read (AT91_AIC_IVR ); + irqstat =at91_aic_read (AT91_AIC_ISR ); + +/* +* ISR value is 0 when there is no current interrupt or when there is +* a spurious interrupt +*/ +if (!irqstat) +at91_aic_write (AT91_AIC_EOICR ,0 ); +else +handle_IRQ (irqnr, regs); +} +static void at91_aic_mask_irq (struct irq_data *d) {/* Disable interrupt on AIC */
Signature · 1 line
Nicolas Ferre
PATCH v3 5/7 ARM: at91: sparse irq support
In reply to ludovic.desroches at atmel.comFrom: Ludovic Desroches <[email protected]>
Enable sparse irq support for multisoc image. It involves to add the NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY irq descs are allocated before AIC requests irq descs allocation. Move NR_AIC_IRQS macro to a more appropiate place with the purpose to remove mach/irqs.h later.
--- arch/arm/mach-at91/Kconfig | 1 + arch/arm/mach-at91/at91rm9200.c | 1 + arch/arm/mach-at91/at91rm9200_devices.c | 84 +++++++++++----------- arch/arm/mach-at91/at91sam9260.c | 1 + arch/arm/mach-at91/at91sam9260_devices.c | 92 ++++++++++++------------ arch/arm/mach-at91/at91sam9261.c | 1 + arch/arm/mach-at91/at91sam9261_devices.c | 68 +++++++++--------- arch/arm/mach-at91/at91sam9263.c | 1 + arch/arm/mach-at91/at91sam9263_devices.c | 80 ++++++++++---------- arch/arm/mach-at91/at91sam926x_time.c | 2 +- arch/arm/mach-at91/at91sam9g45.c | 1 + arch/arm/mach-at91/at91sam9g45_devices.c | 108 ++++++++++++++-------------- arch/arm/mach-at91/at91sam9rl.c | 1 + arch/arm/mach-at91/at91sam9rl_devices.c | 76 ++++++++++---------- arch/arm/mach-at91/at91x40.c | 1 + arch/arm/mach-at91/include/mach/at91_aic.h | 3 + arch/arm/mach-at91/include/mach/irqs.h | 12 --- arch/arm/mach-at91/irq.c | 6 +- arch/arm/mach-at91/pm.c | 1 + 19 files changed, 271 insertions(+), 269 deletions(-)
arch/arm/mach-at91/Kconfig +1 -0
@@ -30,6 +30,7 @@ config SOC_AT91SAM9 bool select CPU_ARM926T select MULTI_IRQ_HANDLER + select SPARSE_IRQ select AT91_SAM9_TIME select AT91_SAM9_SMC
arch/arm/mach-at91/at91rm9200.c +1 -0
@@ -17,6 +17,7 @@#include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91rm9200.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_st.h> #include <mach/cpu.h>
arch/arm/mach-at91/at91rm9200_devices.c +42 -42
198 lines not on this page · raw message
arch/arm/mach-at91/at91sam9260.c +1 -0
@@ -20,6 +20,7 @@#include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9260.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h>
arch/arm/mach-at91/at91sam9260_devices.c +46 -46
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arch/arm/mach-at91/at91sam9261.c +1 -0
@@ -19,6 +19,7 @@#include <asm/system_misc.h> #include <mach/cpu.h> #include <mach/at91sam9261.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h>
arch/arm/mach-at91/at91sam9261_devices.c +34 -34
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arch/arm/mach-at91/at91sam9263.c +1 -0
@@ -18,6 +18,7 @@#include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9263.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h>
arch/arm/mach-at91/at91sam9263_devices.c +40 -40
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arch/arm/mach-at91/at91sam926x_time.c +1 -1
@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { .name = "at91_tick", .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .handler = at91sam926x_pit_interrupt, - .irq = AT91_ID_SYS, + .irq = NR_IRQS_LEGACY + AT91_ID_SYS, };static void at91sam926x_pit_reset (void )
arch/arm/mach-at91/at91sam9g45.c +1 -0
@@ -18,6 +18,7 @@#include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9g45.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h>
arch/arm/mach-at91/at91sam9g45_devices.c +54 -54
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arch/arm/mach-at91/at91sam9rl.c +1 -0
@@ -19,6 +19,7 @@#include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9rl.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h>
arch/arm/mach-at91/at91sam9rl_devices.c +38 -38
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arch/arm/mach-at91/at91x40.c +1 -0
@@ -17,6 +17,7 @@#include <asm/system_misc.h> #include <asm/mach/arch.h> #include <mach/at91x40.h> +#include <mach/at91_aic.h> #include <mach/at91_st.h> #include <mach/timex.h> #include "generic.h"
arch/arm/mach-at91/include/mach/at91_aic.h +3 -0
@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; .extern at91_aic_base#endif +/* Number of irq lines managed by AIC */ +#define NR_AIC_IRQS 32 +#define AT91_AIC_IRQ_MIN_PRIORITY 0#define AT91_AIC_IRQ_MAX_PRIORITY 7
arch/arm/mach-at91/include/mach/irqs.h +0 -12
@@ -22,18 +22,6 @@#define __ASM_ARCH_IRQS_H#include <linux/io.h> -#include <mach/at91_aic.h> - -#define NR_AIC_IRQS 32 - - -/* -* IRQ interrupt symbols are the AT91xxx_ID_* symbols -* for IRQs handled directly through the AIC, or else the AT91_PIN_* -* symbols in gpio.h for ones handled indirectly as GPIOs. -* We make provision for 5 banks of GPIO. -*/ -#define NR_IRQS (NR_AIC_IRQS + (5 * 32))/* FIQ is AIC source 0. */ #define FIQ_START AT91_ID_FIQ
arch/arm/mach-at91/irq.c +4 -2
@@ -41,6 +41,8 @@#include <asm/mach/irq.h> #include <asm/mach/map.h> +#include <mach/at91_aic.h> +void __iomem *at91_aic_base;static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np;
@@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])*/ for (i =0 ; i <NR_AIC_IRQS ; i++) {/* Put hardware irq number in Source Vector Register: */ -at91_aic_write (AT91_AIC_SVR (i), i); +at91_aic_write (AT91_AIC_SVR (i),NR_IRQS_LEGACY + i);/* Active Low interrupt, with the specified priority */ at91_aic_write (AT91_AIC_SMR (i),AT91_AIC_SRCTYPE_LOW | priority[i]); -irq_set_chip_and_handler (i, &at91_aic_chip, handle_fasteoi_irq); +irq_set_chip_and_handler (NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);set_irq_flags (i,IRQF_VALID |IRQF_PROBE ); }
arch/arm/mach-at91/pm.c +1 -0
@@ -25,6 +25,7 @@#include <asm/mach/time.h> #include <asm/mach/irq.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h>
Signature · 1 line
1.7.5.4
PATCH v3 5/7 ARM: at91: sparse irq support
On 06/23/2012 06:11 PM, ludovic.desroches at atmel.com :
Quoted 9 lines
From: Ludovic Desroches <[email protected]>
Enable sparse irq support for multisoc image. It involves to add the
NR_IRQS_LEGACYoffset to static SoC irq number definitions sinceNR_IRQS_LEGACYirq descs are allocated before AIC requests irq descs allocation. MoveNR_AIC_IRQSmacro to a more appropiate place with the purpose to removemach/irqs.hlater.Signed-off-by Ludovic Desroches <[email protected]>
Quoted 1,581 lines
--- arch/arm/mach-at91/Kconfig | 1 + arch/arm/mach-at91/at91rm9200.c | 1 + arch/arm/mach-at91/at91rm9200_devices.c | 84 +++++++++++----------- arch/arm/mach-at91/at91sam9260.c | 1 + arch/arm/mach-at91/at91sam9260_devices.c | 92 ++++++++++++------------ arch/arm/mach-at91/at91sam9261.c | 1 + arch/arm/mach-at91/at91sam9261_devices.c | 68 +++++++++--------- arch/arm/mach-at91/at91sam9263.c | 1 + arch/arm/mach-at91/at91sam9263_devices.c | 80 ++++++++++---------- arch/arm/mach-at91/at91sam926x_time.c | 2 +- arch/arm/mach-at91/at91sam9g45.c | 1 + arch/arm/mach-at91/at91sam9g45_devices.c | 108 ++++++++++++++-------------- arch/arm/mach-at91/at91sam9rl.c | 1 + arch/arm/mach-at91/at91sam9rl_devices.c | 76 ++++++++++---------- arch/arm/mach-at91/at91x40.c | 1 + arch/arm/mach-at91/include/mach/at91_aic.h | 3 + arch/arm/mach-at91/include/mach/irqs.h | 12 --- arch/arm/mach-at91/irq.c | 6 +- arch/arm/mach-at91/pm.c | 1 + 19 files changed, 271 insertions(+), 269 deletions(-)arch/arm/mach-at91/Kconfig +1
-0@@ -30,6 +30,7 @@ config SOC_AT91SAM9 bool select CPU_ARM926T select MULTI_IRQ_HANDLER + select SPARSE_IRQ select AT91_SAM9_TIME select AT91_SAM9_SMCarch/arm/mach-at91/at91rm9200.c +1
-0@@ -17,6 +17,7 @@#include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91rm9200.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_st.h> #include <mach/cpu.h> arch/arm/mach-at91/at91rm9200_devices.c +42
-42@@ -41,8 +41,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_UHP, - .end = AT91RM9200_ID_UHP, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, .flags = IORESOURCE_IRQ, }, };@@ -94,8 +94,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_UDP, - .end = AT91RM9200_ID_UDP, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, .flags = IORESOURCE_IRQ, }, };@@ -145,8 +145,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_EMAC, - .end = AT91RM9200_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, .flags = IORESOURCE_IRQ, }, };@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_MCI, - .end = AT91RM9200_ID_MCI, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, .flags = IORESOURCE_IRQ, }, };@@ -488,8 +488,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_TWI, - .end = AT91RM9200_ID_TWI, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, .flags = IORESOURCE_IRQ, }, };@@ -532,8 +532,8 @@ static struct resource spi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SPI, - .end = AT91RM9200_ID_SPI, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, .flags = IORESOURCE_IRQ, }, };@@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_TC0, - .end = AT91RM9200_ID_TC0, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91RM9200_ID_TC1, - .end = AT91RM9200_ID_TC1, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91RM9200_ID_TC2, - .end = AT91RM9200_ID_TC2, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, .flags = IORESOURCE_IRQ, }, };@@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_TC3, - .end = AT91RM9200_ID_TC3, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91RM9200_ID_TC4, - .end = AT91RM9200_ID_TC4, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91RM9200_ID_TC5, - .end = AT91RM9200_ID_TC5, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, .flags = IORESOURCE_IRQ, }, };@@ -673,8 +673,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SSC0, - .end = AT91RM9200_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, .flags = IORESOURCE_IRQ, }, };@@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SSC1, - .end = AT91RM9200_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, .flags = IORESOURCE_IRQ, }, };@@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_SSC2, - .end = AT91RM9200_ID_SSC2, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, .flags = IORESOURCE_IRQ, }, };@@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -935,8 +935,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US0, - .end = AT91RM9200_ID_US0, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0, .flags = IORESOURCE_IRQ, }, };@@ -984,8 +984,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US1, - .end = AT91RM9200_ID_US1, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1, .flags = IORESOURCE_IRQ, }, };@@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US2, - .end = AT91RM9200_ID_US2, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2, .flags = IORESOURCE_IRQ, }, };@@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91RM9200_ID_US3, - .end = AT91RM9200_ID_US3, + .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3, + .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3, .flags = IORESOURCE_IRQ, }, };arch/arm/mach-at91/at91sam9260.c +1
-0@@ -20,6 +20,7 @@#include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9260.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> arch/arm/mach-at91/at91sam9260_devices.c +46
-46@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_UHP, - .end = AT91SAM9260_ID_UHP, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, .flags = IORESOURCE_IRQ, }, };@@ -98,8 +98,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_UDP, - .end = AT91SAM9260_ID_UDP, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, .flags = IORESOURCE_IRQ, }, };@@ -149,8 +149,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_EMAC, - .end = AT91SAM9260_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, .flags = IORESOURCE_IRQ, }, };@@ -223,8 +223,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_MCI, - .end = AT91SAM9260_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, .flags = IORESOURCE_IRQ, }, };@@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_MCI, - .end = AT91SAM9260_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, .flags = IORESOURCE_IRQ, }, };@@ -496,8 +496,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_TWI, - .end = AT91SAM9260_ID_TWI, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, .flags = IORESOURCE_IRQ, }, };@@ -540,8 +540,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_SPI0, - .end = AT91SAM9260_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, .flags = IORESOURCE_IRQ, }, };@@ -566,8 +566,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_SPI1, - .end = AT91SAM9260_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, .flags = IORESOURCE_IRQ, }, };@@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_TC0, - .end = AT91SAM9260_ID_TC0, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9260_ID_TC1, - .end = AT91SAM9260_ID_TC1, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9260_ID_TC2, - .end = AT91SAM9260_ID_TC2, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, .flags = IORESOURCE_IRQ, }, };@@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_TC3, - .end = AT91SAM9260_ID_TC3, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9260_ID_TC4, - .end = AT91SAM9260_ID_TC4, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9260_ID_TC5, - .end = AT91SAM9260_ID_TC5, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, .flags = IORESOURCE_IRQ, }, };@@ -807,8 +807,8 @@ static struct resource ssc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_SSC, - .end = AT91SAM9260_ID_SSC, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, .flags = IORESOURCE_IRQ, }, };@@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -920,8 +920,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US0, - .end = AT91SAM9260_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, .flags = IORESOURCE_IRQ, }, };@@ -971,8 +971,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US1, - .end = AT91SAM9260_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, .flags = IORESOURCE_IRQ, }, };@@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US2, - .end = AT91SAM9260_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, .flags = IORESOURCE_IRQ, }, };@@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US3, - .end = AT91SAM9260_ID_US3, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, .flags = IORESOURCE_IRQ, }, };@@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US4, - .end = AT91SAM9260_ID_US4, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, .flags = IORESOURCE_IRQ, }, };@@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_US5, - .end = AT91SAM9260_ID_US5, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, .flags = IORESOURCE_IRQ, }, };@@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9260_ID_ADC, - .end = AT91SAM9260_ID_ADC, + .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, + .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, .flags = IORESOURCE_IRQ, }, };arch/arm/mach-at91/at91sam9261.c +1
-0@@ -19,6 +19,7 @@#include <asm/system_misc.h> #include <mach/cpu.h> #include <mach/at91sam9261.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> arch/arm/mach-at91/at91sam9261_devices.c +34
-34@@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_UHP, - .end = AT91SAM9261_ID_UHP, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, .flags = IORESOURCE_IRQ, }, };@@ -98,8 +98,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_UDP, - .end = AT91SAM9261_ID_UDP, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, .flags = IORESOURCE_IRQ, }, };@@ -148,8 +148,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_MCI, - .end = AT91SAM9261_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, .flags = IORESOURCE_IRQ, }, };@@ -310,8 +310,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_TWI, - .end = AT91SAM9261_ID_TWI, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, .flags = IORESOURCE_IRQ, }, };@@ -354,8 +354,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SPI0, - .end = AT91SAM9261_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, .flags = IORESOURCE_IRQ, }, };@@ -380,8 +380,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SPI1, - .end = AT91SAM9261_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, .flags = IORESOURCE_IRQ, }, };@@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_LCDC, - .end = AT91SAM9261_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, .flags = IORESOURCE_IRQ, },#if defined(CONFIG_FB_INTSRAM )@@ -566,18 +566,18 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_TC0, - .end = AT91SAM9261_ID_TC0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9261_ID_TC1, - .end = AT91SAM9261_ID_TC1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9261_ID_TC2, - .end = AT91SAM9261_ID_TC2, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, .flags = IORESOURCE_IRQ, }, };@@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SSC0, - .end = AT91SAM9261_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, .flags = IORESOURCE_IRQ, }, };@@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SSC1, - .end = AT91SAM9261_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, .flags = IORESOURCE_IRQ, }, };@@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_SSC2, - .end = AT91SAM9261_ID_SSC2, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, .flags = IORESOURCE_IRQ, }, };@@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -895,8 +895,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_US0, - .end = AT91SAM9261_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, .flags = IORESOURCE_IRQ, }, };@@ -938,8 +938,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_US1, - .end = AT91SAM9261_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, .flags = IORESOURCE_IRQ, }, };@@ -981,8 +981,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9261_ID_US2, - .end = AT91SAM9261_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, .flags = IORESOURCE_IRQ, }, };arch/arm/mach-at91/at91sam9263.c +1
-0@@ -18,6 +18,7 @@#include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9263.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> arch/arm/mach-at91/at91sam9263_devices.c +40
-40@@ -44,8 +44,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_UHP, - .end = AT91SAM9263_ID_UHP, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, .flags = IORESOURCE_IRQ, }, };@@ -104,8 +104,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_UDP, - .end = AT91SAM9263_ID_UDP, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, .flags = IORESOURCE_IRQ, }, };@@ -155,8 +155,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_EMAC, - .end = AT91SAM9263_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, .flags = IORESOURCE_IRQ, }, };@@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_MCI0, - .end = AT91SAM9263_ID_MCI0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, .flags = IORESOURCE_IRQ, }, };@@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_MCI1, - .end = AT91SAM9263_ID_MCI1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, .flags = IORESOURCE_IRQ, }, };@@ -567,8 +567,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_TWI, - .end = AT91SAM9263_ID_TWI, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, .flags = IORESOURCE_IRQ, }, };@@ -611,8 +611,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SPI0, - .end = AT91SAM9263_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, .flags = IORESOURCE_IRQ, }, };@@ -637,8 +637,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SPI1, - .end = AT91SAM9263_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, .flags = IORESOURCE_IRQ, }, };@@ -725,8 +725,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_AC97C, - .end = AT91SAM9263_ID_AC97C, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, .flags = IORESOURCE_IRQ, }, };@@ -776,8 +776,8 @@ static struct resource can_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_CAN, - .end = AT91SAM9263_ID_CAN, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, .flags = IORESOURCE_IRQ, }, };@@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_LCDC, - .end = AT91SAM9263_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, .flags = IORESOURCE_IRQ, }, };@@ -883,8 +883,8 @@ struct resource isi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_ISI, - .end = AT91SAM9263_ID_ISI, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, .flags = IORESOURCE_IRQ, }, };@@ -940,8 +940,8 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_TCB, - .end = AT91SAM9263_ID_TCB, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, .flags = IORESOURCE_IRQ, }, };@@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_PWMC, - .end = AT91SAM9263_ID_PWMC, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, .flags = IORESOURCE_IRQ, }, };@@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SSC0, - .end = AT91SAM9263_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, .flags = IORESOURCE_IRQ, }, };@@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_SSC1, - .end = AT91SAM9263_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, .flags = IORESOURCE_IRQ, }, };@@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_US0, - .end = AT91SAM9263_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, .flags = IORESOURCE_IRQ, }, };@@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_US1, - .end = AT91SAM9263_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, .flags = IORESOURCE_IRQ, }, };@@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9263_ID_US2, - .end = AT91SAM9263_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, .flags = IORESOURCE_IRQ, }, };arch/arm/mach-at91/at91sam926x_time.c +1
-1@@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { .name = "at91_tick", .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .handler = at91sam926x_pit_interrupt, - .irq = AT91_ID_SYS, + .irq = NR_IRQS_LEGACY + AT91_ID_SYS, };static void at91sam926x_pit_reset (void )arch/arm/mach-at91/at91sam9g45.c +1
-0@@ -18,6 +18,7 @@#include <asm/mach/map.h> #include <asm/system_misc.h> #include <mach/at91sam9g45.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h> arch/arm/mach-at91/at91sam9g45_devices.c +54
-54@@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_DMA, - .end = AT91SAM9G45_ID_DMA, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, .flags = IORESOURCE_IRQ, }, };@@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_UHPHS, - .end = AT91SAM9G45_ID_UHPHS, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, .flags = IORESOURCE_IRQ, }, };@@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_UHPHS, - .end = AT91SAM9G45_ID_UHPHS, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, .flags = IORESOURCE_IRQ, }, };@@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91SAM9G45_ID_UDPHS, - .end = AT91SAM9G45_ID_UDPHS, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, .flags = IORESOURCE_IRQ, }, };@@ -296,8 +296,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_EMAC, - .end = AT91SAM9G45_ID_EMAC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, .flags = IORESOURCE_IRQ, }, };@@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_MCI0, - .end = AT91SAM9G45_ID_MCI0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, .flags = IORESOURCE_IRQ, }, };@@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_MCI1, - .end = AT91SAM9G45_ID_MCI1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, .flags = IORESOURCE_IRQ, }, };@@ -645,8 +645,8 @@ static struct resource twi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TWI0, - .end = AT91SAM9G45_ID_TWI0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, .flags = IORESOURCE_IRQ, }, };@@ -665,8 +665,8 @@ static struct resource twi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TWI1, - .end = AT91SAM9G45_ID_TWI1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, .flags = IORESOURCE_IRQ, }, };@@ -720,8 +720,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SPI0, - .end = AT91SAM9G45_ID_SPI0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, .flags = IORESOURCE_IRQ, }, };@@ -746,8 +746,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SPI1, - .end = AT91SAM9G45_ID_SPI1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, .flags = IORESOURCE_IRQ, }, };@@ -834,8 +834,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_AC97C, - .end = AT91SAM9G45_ID_AC97C, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, .flags = IORESOURCE_IRQ, }, };@@ -887,8 +887,8 @@ struct resource isi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_ISI, - .end = AT91SAM9G45_ID_ISI, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, .flags = IORESOURCE_IRQ, }, };@@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_LCDC, - .end = AT91SAM9G45_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, .flags = IORESOURCE_IRQ, }, };@@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TCB, - .end = AT91SAM9G45_ID_TCB, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, .flags = IORESOURCE_IRQ, }, };@@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TCB, - .end = AT91SAM9G45_ID_TCB, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, .flags = IORESOURCE_IRQ, }, };@@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TSC, - .end = AT91SAM9G45_ID_TSC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, .flags = IORESOURCE_IRQ, } };@@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_TSC, - .end = AT91SAM9G45_ID_TSC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, .flags = IORESOURCE_IRQ, } };@@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_PWMC, - .end = AT91SAM9G45_ID_PWMC, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, .flags = IORESOURCE_IRQ, }, };@@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SSC0, - .end = AT91SAM9G45_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, .flags = IORESOURCE_IRQ, }, };@@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_SSC1, - .end = AT91SAM9G45_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, .flags = IORESOURCE_IRQ, }, };@@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US0, - .end = AT91SAM9G45_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, .flags = IORESOURCE_IRQ, }, };@@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US1, - .end = AT91SAM9G45_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, .flags = IORESOURCE_IRQ, }, };@@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US2, - .end = AT91SAM9G45_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, .flags = IORESOURCE_IRQ, }, };@@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9G45_ID_US3, - .end = AT91SAM9G45_ID_US3, + .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, + .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, .flags = IORESOURCE_IRQ, }, };arch/arm/mach-at91/at91sam9rl.c +1
-0@@ -19,6 +19,7 @@#include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91sam9rl.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> arch/arm/mach-at91/at91sam9rl_devices.c +38
-38@@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91SAM9RL_ID_DMA, - .end = AT91SAM9RL_ID_DMA, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, .flags = IORESOURCE_IRQ, }, };@@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91SAM9RL_ID_UDPHS, - .end = AT91SAM9RL_ID_UDPHS, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, .flags = IORESOURCE_IRQ, }, };@@ -172,8 +172,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_MCI, - .end = AT91SAM9RL_ID_MCI, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, .flags = IORESOURCE_IRQ, }, };@@ -339,8 +339,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_TWI0, - .end = AT91SAM9RL_ID_TWI0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, .flags = IORESOURCE_IRQ, }, };@@ -383,8 +383,8 @@ static struct resource spi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_SPI, - .end = AT91SAM9RL_ID_SPI, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, .flags = IORESOURCE_IRQ, }, };@@ -452,8 +452,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_AC97C, - .end = AT91SAM9RL_ID_AC97C, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, .flags = IORESOURCE_IRQ, }, };@@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_LCDC, - .end = AT91SAM9RL_ID_LCDC, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, .flags = IORESOURCE_IRQ, }, };@@ -574,18 +574,18 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_TC0, - .end = AT91SAM9RL_ID_TC0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = AT91SAM9RL_ID_TC1, - .end = AT91SAM9RL_ID_TC1, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = AT91SAM9RL_ID_TC2, - .end = AT91SAM9RL_ID_TC2, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, .flags = IORESOURCE_IRQ, }, };@@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_TSC, - .end = AT91SAM9RL_ID_TSC, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, .flags = IORESOURCE_IRQ, } };@@ -768,8 +768,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_PWMC, - .end = AT91SAM9RL_ID_PWMC, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, .flags = IORESOURCE_IRQ, }, };@@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_SSC0, - .end = AT91SAM9RL_ID_SSC0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, .flags = IORESOURCE_IRQ, }, };@@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_SSC1, - .end = AT91SAM9RL_ID_SSC1, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, .flags = IORESOURCE_IRQ, }, };@@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_ID_SYS, - .end = AT91_ID_SYS, + .start = NR_IRQS_LEGACY + AT91_ID_SYS, + .end = NR_IRQS_LEGACY + AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, };@@ -981,8 +981,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US0, - .end = AT91SAM9RL_ID_US0, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, .flags = IORESOURCE_IRQ, }, };@@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US1, - .end = AT91SAM9RL_ID_US1, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, .flags = IORESOURCE_IRQ, }, };@@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US2, - .end = AT91SAM9RL_ID_US2, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, .flags = IORESOURCE_IRQ, }, };@@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91SAM9RL_ID_US3, - .end = AT91SAM9RL_ID_US3, + .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, + .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, .flags = IORESOURCE_IRQ, }, };arch/arm/mach-at91/at91x40.c +1
-0@@ -17,6 +17,7 @@#include <asm/system_misc.h> #include <asm/mach/arch.h> #include <mach/at91x40.h> +#include <mach/at91_aic.h> #include <mach/at91_st.h> #include <mach/timex.h> #include "generic.h" arch/arm/mach-at91/include/mach/at91_aic.h +3
-0@@ -28,6 +28,9 @@ extern void __iomem *at91_aic_base; .extern at91_aic_base#endif +/* Number of irq lines managed by AIC */ +#define NR_AIC_IRQS 32 +#define AT91_AIC_IRQ_MIN_PRIORITY 0#define AT91_AIC_IRQ_MAX_PRIORITY 7arch/arm/mach-at91/include/mach/irqs.h +0
-12@@ -22,18 +22,6 @@#define __ASM_ARCH_IRQS_H#include <linux/io.h> -#include <mach/at91_aic.h> - -#define NR_AIC_IRQS 32 - - -/* -* IRQ interrupt symbols are the AT91xxx_ID_* symbols -* for IRQs handled directly through the AIC, or else the AT91_PIN_* -* symbols in gpio.h for ones handled indirectly as GPIOs. -* We make provision for 5 banks of GPIO. -*/ -#define NR_IRQS (NR_AIC_IRQS + (5 * 32))/* FIQ is AIC source 0. */ #define FIQ_START AT91_ID_FIQarch/arm/mach-at91/irq.c +4
-2@@ -41,6 +41,8 @@#include <asm/mach/irq.h> #include <asm/mach/map.h> +#include <mach/at91_aic.h> +void __iomem *at91_aic_base;static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np;@@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])*/ for (i =0 ; i <NR_AIC_IRQS ; i++) {/* Put hardware irq number in Source Vector Register: */ -at91_aic_write (AT91_AIC_SVR (i), i); +at91_aic_write (AT91_AIC_SVR (i),NR_IRQS_LEGACY + i);/* Active Low interrupt, with the specified priority */ at91_aic_write (AT91_AIC_SMR (i),AT91_AIC_SRCTYPE_LOW | priority[i]); -irq_set_chip_and_handler (i, &at91_aic_chip, handle_fasteoi_irq); +irq_set_chip_and_handler (NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);set_irq_flags (i,IRQF_VALID |IRQF_PROBE ); }arch/arm/mach-at91/pm.c +1
-0@@ -25,6 +25,7 @@#include <asm/mach/time.h> #include <asm/mach/irq.h> +#include <mach/at91_aic.h> #include <mach/at91_pmc.h> #include <mach/cpu.h>
Signature · 1 line
Nicolas Ferre
PATCH v3 6/7 ARM: at91: remove mach/irqs.h
In reply to ludovic.desroches at atmel.comFrom: Ludovic Desroches <[email protected]>
mach/irqs only defines FIQ_START which doesn't appear to be used anywhere so remove it.
--- arch/arm/mach-at91/include/mach/irqs.h | 29 ----------------------------- 1 files changed, 0 insertions(+), 29 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/irqs.h
arch/arm/mach-at91/include/mach/irqs.h deleted +0 -29
@@ -1,29 +0,0 @@ -/* -* arch/arm/mach-at91/include/mach/irqs.h -* -* Copyright (C) 2004 SAN People -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License as published by -* the Free Software Foundation; either version 2 of the License, or -* (at your option) any later version. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -* -* You should have received a copy of the GNU General Public License -* along with this program; if not, write to the Free Software -* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include <linux/io.h> - -/* FIQ is AIC source 0. */ -#define FIQ_START AT91_ID_FIQ - -#endif
Signature · 1 line
1.7.5.4
PATCH v3 6/7 ARM: at91: remove mach/irqs.h
On 06/23/2012 06:11 PM, ludovic.desroches at atmel.com :
Quoted 6 lines
From: Ludovic Desroches <[email protected]>
mach/irqs only defines
FIQ_STARTwhich doesn't appear to be used anywhere so remove it.Signed-off-by Ludovic Desroches <[email protected]>
Quoted 41 lines
--- arch/arm/mach-at91/include/mach/irqs.h | 29 ----------------------------- 1 files changed, 0 insertions(+), 29 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/irqs.harch/arm/mach-at91/include/mach/irqs.h deleted +0
-29@@ -1,29 +0,0 @@ -/* -* arch/arm/mach-at91/include/mach/irqs.h -* -* Copyright (C) 2004 SAN People -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License as published by -* the Free Software Foundation; either version 2 of the License, or -* (at your option) any later version. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -* -* You should have received a copy of the GNU General Public License -* along with this program; if not, write to the Free Software -* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include <linux/io.h> - -/* FIQ is AIC source 0. */ -#define FIQ_START AT91_ID_FIQ - -#endif
Signature · 1 line
Nicolas Ferre
PATCH v3 7/7 ARM: at91: add AIC5 support
In reply to ludovic.desroches at atmel.comFrom: Ludovic Desroches <[email protected]>
The number of lines of AIC5 has increased from 32 to 128. Due to this increase, a source select register has been introduced for the interrupt line selection. Moreover, register mapping has been changed. For that reasons, we need some dedicated callbacks for AIC5.
Power management is also concerned by these changes. On suspend, we can't get the whole interrupt mask register as before, we have to read this register 128 times. To reduce this overhead, a snapshot of the whole IMR is maintained.
--- arch/arm/mach-at91/generic.h | 2 + arch/arm/mach-at91/include/mach/at91_aic.h | 26 ++ arch/arm/mach-at91/irq.c | 343 +++++++++++++++++++++++----- 3 files changed, 314 insertions(+), 57 deletions(-)
arch/arm/mach-at91/generic.h +2 -0
@@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]);extern void __init at91_aic_init (unsigned int priority[]);extern int __init at91_aic_of_init (struct device_node *node,struct device_node *parent); +extern int __init at91_aic5_of_init (struct device_node *node, +struct device_node *parent);/* Timer */
arch/arm/mach-at91/include/mach/at91_aic.h +26 -0
@@ -30,11 +30,16 @@ extern void __iomem *at91_aic_base;/* Number of irq lines managed by AIC */ #define NR_AIC_IRQS 32 +#define NR_AIC5_IRQS 128 + +#define AT91_AIC5_SSR 0x0/* Source Select Register [AIC5] */ +#define AT91_AIC5_INTSEL_MSK (0x7f << 0)/* Interrupt Line Selection Mask */ #define AT91_AIC_IRQ_MIN_PRIORITY 0#define AT91_AIC_IRQ_MAX_PRIORITY 7#define AT91_AIC_SMR (n) ((n) * 4)/* Source Mode Registers 0-31 */ +#define AT91_AIC5_SMR 0x4/* Source Mode Register [AIC5] */ #define AT91_AIC_PRIOR (7 << 0)/* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5)/* Interrupt Source Type */ #define AT91_AIC_SRCTYPE_LOW (0 << 5)
@@ -43,31 +48,52 @@ extern void __iomem *at91_aic_base;#define AT91_AIC_SRCTYPE_RISING (3 << 5)#define AT91_AIC_SVR (n) (0x80 + ((n) * 4))/* Source Vector Registers 0-31 */ +#define AT91_AIC5_SVR 0x8/* Source Vector Register [AIC5] */ #define AT91_AIC_IVR 0x100/* Interrupt Vector Register */ +#define AT91_AIC5_IVR 0x10/* Interrupt Vector Register [AIC5] */ #define AT91_AIC_FVR 0x104/* Fast Interrupt Vector Register */ +#define AT91_AIC5_FVR 0x14/* Fast Interrupt Vector Register [AIC5] */ #define AT91_AIC_ISR 0x108/* Interrupt Status Register */ +#define AT91_AIC5_ISR 0x18/* Interrupt Status Register [AIC5] */ #define AT91_AIC_IRQID (0x1f << 0)/* Current Interrupt Identifier */ #define AT91_AIC_IPR 0x10c/* Interrupt Pending Register */ +#define AT91_AIC5_IPR0 0x20/* Interrupt Pending Register 0 [AIC5] */ +#define AT91_AIC5_IPR1 0x24/* Interrupt Pending Register 1 [AIC5] */ +#define AT91_AIC5_IPR2 0x28/* Interrupt Pending Register 2 [AIC5] */ +#define AT91_AIC5_IPR3 0x2c/* Interrupt Pending Register 3 [AIC5] */ #define AT91_AIC_IMR 0x110/* Interrupt Mask Register */ +#define AT91_AIC5_IMR 0x30/* Interrupt Mask Register [AIC5] */ #define AT91_AIC_CISR 0x114/* Core Interrupt Status Register */ +#define AT91_AIC5_CISR 0x34/* Core Interrupt Status Register [AIC5] */ #define AT91_AIC_NFIQ (1 << 0)/* nFIQ Status */ #define AT91_AIC_NIRQ (1 << 1)/* nIRQ Status */ #define AT91_AIC_IECR 0x120/* Interrupt Enable Command Register */ +#define AT91_AIC5_IECR 0x40/* Interrupt Enable Command Register [AIC5] */ #define AT91_AIC_IDCR 0x124/* Interrupt Disable Command Register */ +#define AT91_AIC5_IDCR 0x44/* Interrupt Disable Command Register [AIC5] */ #define AT91_AIC_ICCR 0x128/* Interrupt Clear Command Register */ +#define AT91_AIC5_ICCR 0x48/* Interrupt Clear Command Register [AIC5] */ #define AT91_AIC_ISCR 0x12c/* Interrupt Set Command Register */ +#define AT91_AIC5_ISCR 0x4c/* Interrupt Set Command Register [AIC5] */ #define AT91_AIC_EOICR 0x130/* End of Interrupt Command Register */ +#define AT91_AIC5_EOICR 0x38/* End of Interrupt Command Register [AIC5] */ #define AT91_AIC_SPU 0x134/* Spurious Interrupt Vector Register */ +#define AT91_AIC5_SPU 0x3c/* Spurious Interrupt Vector Register [AIC5] */ #define AT91_AIC_DCR 0x138/* Debug Control Register */ +#define AT91_AIC5_DCR 0x6c/* Debug Control Register [AIC5] */ #define AT91_AIC_DCR_PROT (1 << 0)/* Protection Mode */ #define AT91_AIC_DCR_GMSK (1 << 1)/* General Mask */ #define AT91_AIC_FFER 0x140/* Fast Forcing Enable Register [SAM9 only] */ +#define AT91_AIC5_FFER 0x50/* Fast Forcing Enable Register [AIC5] */ #define AT91_AIC_FFDR 0x144/* Fast Forcing Disable Register [SAM9 only] */ +#define AT91_AIC5_FFDR 0x54/* Fast Forcing Disable Register [AIC5] */ #define AT91_AIC_FFSR 0x148/* Fast Forcing Status Register [SAM9 only] */ +#define AT91_AIC5_FFSR 0x58/* Fast Forcing Status Register [AIC5] */ void at91_aic_handle_irq (struct pt_regs *regs); +void at91_aic5_handle_irq (struct pt_regs *regs);#endif
arch/arm/mach-at91/irq.c +286 -57
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1.7.5.4
PATCH v3 7/7 ARM: at91: add AIC5 support
On 06/23/2012 06:12 PM, ludovic.desroches at atmel.com :
Quoted 11 lines
From: Ludovic Desroches <[email protected]>
The number of lines of AIC5 has increased from 32 to 128. Due to this increase, a source select register has been introduced for the interrupt line selection. Moreover, register mapping has been changed. For that reasons, we need some dedicated callbacks for AIC5.
Power management is also concerned by these changes. On suspend, we can't get the whole interrupt mask register as before, we have to read this register 128 times. To reduce this overhead, a snapshot of the whole IMR is maintained.Signed-off-by Ludovic Desroches <[email protected]>
Quoted 589 lines
--- arch/arm/mach-at91/generic.h | 2 + arch/arm/mach-at91/include/mach/at91_aic.h | 26 ++ arch/arm/mach-at91/irq.c | 343 +++++++++++++++++++++++----- 3 files changed, 314 insertions(+), 57 deletions(-)arch/arm/mach-at91/generic.h +2
-0@@ -29,6 +29,8 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]);extern void __init at91_aic_init (unsigned int priority[]);extern int __init at91_aic_of_init (struct device_node *node,struct device_node *parent); +extern int __init at91_aic5_of_init (struct device_node *node, +struct device_node *parent);/* Timer */ arch/arm/mach-at91/include/mach/at91_aic.h +26
-0@@ -30,11 +30,16 @@ extern void __iomem *at91_aic_base;/* Number of irq lines managed by AIC */ #define NR_AIC_IRQS 32 +#define NR_AIC5_IRQS 128 + +#define AT91_AIC5_SSR 0x0/* Source Select Register [AIC5] */ +#define AT91_AIC5_INTSEL_MSK (0x7f << 0)/* Interrupt Line Selection Mask */ #define AT91_AIC_IRQ_MIN_PRIORITY 0#define AT91_AIC_IRQ_MAX_PRIORITY 7#define AT91_AIC_SMR (n) ((n) * 4)/* Source Mode Registers 0-31 */ +#define AT91_AIC5_SMR 0x4/* Source Mode Register [AIC5] */ #define AT91_AIC_PRIOR (7 << 0)/* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5)/* Interrupt Source Type */ #define AT91_AIC_SRCTYPE_LOW (0 << 5)@@ -43,31 +48,52 @@ extern void __iomem *at91_aic_base;#define AT91_AIC_SRCTYPE_RISING (3 << 5)#define AT91_AIC_SVR (n) (0x80 + ((n) * 4))/* Source Vector Registers 0-31 */ +#define AT91_AIC5_SVR 0x8/* Source Vector Register [AIC5] */ #define AT91_AIC_IVR 0x100/* Interrupt Vector Register */ +#define AT91_AIC5_IVR 0x10/* Interrupt Vector Register [AIC5] */ #define AT91_AIC_FVR 0x104/* Fast Interrupt Vector Register */ +#define AT91_AIC5_FVR 0x14/* Fast Interrupt Vector Register [AIC5] */ #define AT91_AIC_ISR 0x108/* Interrupt Status Register */ +#define AT91_AIC5_ISR 0x18/* Interrupt Status Register [AIC5] */ #define AT91_AIC_IRQID (0x1f << 0)/* Current Interrupt Identifier */ #define AT91_AIC_IPR 0x10c/* Interrupt Pending Register */ +#define AT91_AIC5_IPR0 0x20/* Interrupt Pending Register 0 [AIC5] */ +#define AT91_AIC5_IPR1 0x24/* Interrupt Pending Register 1 [AIC5] */ +#define AT91_AIC5_IPR2 0x28/* Interrupt Pending Register 2 [AIC5] */ +#define AT91_AIC5_IPR3 0x2c/* Interrupt Pending Register 3 [AIC5] */ #define AT91_AIC_IMR 0x110/* Interrupt Mask Register */ +#define AT91_AIC5_IMR 0x30/* Interrupt Mask Register [AIC5] */ #define AT91_AIC_CISR 0x114/* Core Interrupt Status Register */ +#define AT91_AIC5_CISR 0x34/* Core Interrupt Status Register [AIC5] */ #define AT91_AIC_NFIQ (1 << 0)/* nFIQ Status */ #define AT91_AIC_NIRQ (1 << 1)/* nIRQ Status */ #define AT91_AIC_IECR 0x120/* Interrupt Enable Command Register */ +#define AT91_AIC5_IECR 0x40/* Interrupt Enable Command Register [AIC5] */ #define AT91_AIC_IDCR 0x124/* Interrupt Disable Command Register */ +#define AT91_AIC5_IDCR 0x44/* Interrupt Disable Command Register [AIC5] */ #define AT91_AIC_ICCR 0x128/* Interrupt Clear Command Register */ +#define AT91_AIC5_ICCR 0x48/* Interrupt Clear Command Register [AIC5] */ #define AT91_AIC_ISCR 0x12c/* Interrupt Set Command Register */ +#define AT91_AIC5_ISCR 0x4c/* Interrupt Set Command Register [AIC5] */ #define AT91_AIC_EOICR 0x130/* End of Interrupt Command Register */ +#define AT91_AIC5_EOICR 0x38/* End of Interrupt Command Register [AIC5] */ #define AT91_AIC_SPU 0x134/* Spurious Interrupt Vector Register */ +#define AT91_AIC5_SPU 0x3c/* Spurious Interrupt Vector Register [AIC5] */ #define AT91_AIC_DCR 0x138/* Debug Control Register */ +#define AT91_AIC5_DCR 0x6c/* Debug Control Register [AIC5] */ #define AT91_AIC_DCR_PROT (1 << 0)/* Protection Mode */ #define AT91_AIC_DCR_GMSK (1 << 1)/* General Mask */ #define AT91_AIC_FFER 0x140/* Fast Forcing Enable Register [SAM9 only] */ +#define AT91_AIC5_FFER 0x50/* Fast Forcing Enable Register [AIC5] */ #define AT91_AIC_FFDR 0x144/* Fast Forcing Disable Register [SAM9 only] */ +#define AT91_AIC5_FFDR 0x54/* Fast Forcing Disable Register [AIC5] */ #define AT91_AIC_FFSR 0x148/* Fast Forcing Status Register [SAM9 only] */ +#define AT91_AIC5_FFSR 0x58/* Fast Forcing Status Register [AIC5] */ void at91_aic_handle_irq (struct pt_regs *regs); +void at91_aic5_handle_irq (struct pt_regs *regs);#endif arch/arm/mach-at91/irq.c +286
-57@@ -23,6 +23,7 @@#include <linux/init.h> #include <linux/module.h> #include <linux/mm.h> +#include <linux/bitmap.h> #include <linux/types.h> #include <linux/irq.h> #include <linux/of.h> @@ -46,9 +47,116 @@void __iomem *at91_aic_base;static struct irq_domain *at91_aic_domain;static struct device_node *at91_aic_np; +static unsigned int n_irqs =NR_AIC_IRQS ; +static unsigned long at91_aic_caps =0 ;static unsigned int *at91_aic_irq_priorities; -asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs) +/* AIC5 introduces a Source Select Register */ +#define AT91_AIC_CAP_AIC5 (1 << 0) +#define has_aic5 () (at91_aic_caps & AT91_AIC_CAP_AIC5) + +#ifdef CONFIG_PM + +static unsigned long *wakeups; +static unsigned long *backups; + +#define set_backup (bit) set_bit(bit, backups) +#define clear_backup (bit) clear_bit(bit, backups) + +static int at91_aic_pm_init (void ) +{ + backups =kzalloc (BITS_TO_LONGS (n_irqs) *sizeof (*backups),GFP_KERNEL ); +if (!backups) +return -ENOMEM ; + + wakeups =kzalloc (BITS_TO_LONGS (n_irqs) *sizeof (*backups),GFP_KERNEL ); +if (!wakeups) { +kfree (backups); +return -ENOMEM ; + } + +return 0 ; +} + +static int at91_aic_set_wake (struct irq_data *d,unsigned value) +{ +if (unlikely (d->hwirq >= n_irqs)) +return -EINVAL ; + +if (value) +set_bit (d->hwirq, wakeups); +else +clear_bit (d->hwirq, wakeups); + +return 0 ; +} + +void at91_irq_suspend (void ) +{ +int i =0 , bit; + +if (has_aic5 ()) { +/* disable enabled irqs */ +while ((bit =find_next_bit (backups, n_irqs, i)) < n_irqs) { +at91_aic_write (AT91_AIC5_SSR , + bit &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IDCR ,1 ); + i = bit; + } +/* enable wakeup irqs */ + i =0 ; +while ((bit =find_next_bit (wakeups, n_irqs, i)) < n_irqs) { +at91_aic_write (AT91_AIC5_SSR , + bit &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IECR ,1 ); + i = bit; + } + }else { +at91_aic_write (AT91_AIC_IDCR , *backups); +at91_aic_write (AT91_AIC_IECR , *wakeups); + } +} + +void at91_irq_resume (void ) +{ +int i =0 , bit; + +if (has_aic5 ()) { +/* disable wakeup irqs */ +while ((bit =find_next_bit (wakeups, n_irqs, i)) < n_irqs) { +at91_aic_write (AT91_AIC5_SSR , + bit &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IDCR ,1 ); + i = bit; + } +/* enable irqs disabled for suspend */ + i =0 ; +while ((bit =find_next_bit (backups, n_irqs, i)) < n_irqs) { +at91_aic_write (AT91_AIC5_SSR , + bit &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IECR ,1 ); + i = bit; + } + }else { +at91_aic_write (AT91_AIC_IDCR , *wakeups); +at91_aic_write (AT91_AIC_IECR , *backups); + } +} + +#else +static inline int at91_aic_pm_init (void ) +{ +return 0 ; +} + +#define set_backup (bit) +#define clear_backup (bit) +#define at91_aic_set_wake NULL + +#endif /* CONFIG_PM */ + +asmlinkage void __exception_irq_entry +at91_aic_handle_irq (struct pt_regs *regs) {u32 irqnr;u32 irqstat;@@ -66,16 +174,53 @@ asmlinkage void __exception_irq_entry at91_aic_handle_irq(struct pt_regs *regs)handle_IRQ (irqnr, regs); } +asmlinkage void __exception_irq_entry +at91_aic5_handle_irq (struct pt_regs *regs) +{ +u32 irqnr; +u32 irqstat; + + irqnr =at91_aic_read (AT91_AIC5_IVR ); + irqstat =at91_aic_read (AT91_AIC5_ISR ); + +if (!irqstat) +at91_aic_write (AT91_AIC5_EOICR ,0 ); +else +handle_IRQ (irqnr, regs); +} +static void at91_aic_mask_irq (struct irq_data *d) {/* Disable interrupt on AIC */ at91_aic_write (AT91_AIC_IDCR ,1 << d->hwirq); +/* Update ISR cache */ +clear_backup (d->hwirq); +} + +static void __maybe_unused at91_aic5_mask_irq (struct irq_data *d) +{ +/* Disable interrupt on AIC5 */ +at91_aic_write (AT91_AIC5_SSR , d->hwirq &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IDCR ,1 ); +/* Update ISR cache */ +clear_backup (d->hwirq); }static void at91_aic_unmask_irq (struct irq_data *d) {/* Enable interrupt on AIC */ at91_aic_write (AT91_AIC_IECR ,1 << d->hwirq); +/* Update ISR cache */ +set_backup (d->hwirq); +} + +static void __maybe_unused at91_aic5_unmask_irq (struct irq_data *d) +{ +/* Enable interrupt on AIC5 */ +at91_aic_write (AT91_AIC5_SSR , d->hwirq &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IECR ,1 ); +/* Update ISR cache */ +set_backup (d->hwirq); }static void at91_aic_eoi (struct irq_data *d)@@ -87,13 +232,18 @@ static void at91_aic_eoi(struct irq_data *d)at91_aic_write (AT91_AIC_EOICR ,0 ); } -unsigned int at91_extern_irq; +static void __maybe_unused at91_aic5_eoi (struct irq_data *d) +{ +at91_aic_write (AT91_AIC5_EOICR ,0 ); +} -#define is_extern_irq (hwirq) ((1 << (hwirq)) & at91_extern_irq) +unsigned long *at91_extern_irq; -static int at91_aic_set_type (struct irq_data *d,unsigned type) +#define is_extern_irq (hwirq) test_bit(hwirq, at91_extern_irq) + +static int at91_aic_compute_srctype (struct irq_data *d,unsigned type) { -unsigned int smr, srctype; +int srctype;switch (type) {case IRQ_TYPE_LEVEL_HIGH :@@ -106,58 +256,44 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)if ((d->hwirq ==AT91_ID_FIQ ) ||is_extern_irq (d->hwirq))/* only supported on external interrupts */ srctype =AT91_AIC_SRCTYPE_LOW ;else -return -EINVAL ; + srctype = -EINVAL ;break ;case IRQ_TYPE_EDGE_FALLING :if ((d->hwirq ==AT91_ID_FIQ ) ||is_extern_irq (d->hwirq))/* only supported on external interrupts */ srctype =AT91_AIC_SRCTYPE_FALLING ;else -return -EINVAL ; + srctype = -EINVAL ;break ;default : -return -EINVAL ; + srctype = -EINVAL ; } - smr =at91_aic_read (AT91_AIC_SMR (d->hwirq)) & ~AT91_AIC_SRCTYPE ; -at91_aic_write (AT91_AIC_SMR (d->hwirq), smr | srctype); -return 0 ; +return srctype; } -#ifdef CONFIG_PM - -static u32 wakeups; -static u32 backups; - -static int at91_aic_set_wake (struct irq_data *d,unsigned value) +static int at91_aic_set_type (struct irq_data *d,unsigned type) { -if (unlikely (d->hwirq >=NR_AIC_IRQS )) -return -EINVAL ; - -if (value) - wakeups |= (1 << d->hwirq); -else - wakeups &= ~(1 << d->hwirq); +unsigned int smr; +int srctype; + + srctype =at91_aic_compute_srctype (d, type); +if (srctype <0 ) +return srctype; + +if (has_aic5 ()) { +at91_aic_write (AT91_AIC5_SSR , + d->hwirq &AT91_AIC5_INTSEL_MSK ); + smr =at91_aic_read (AT91_AIC5_SMR ) & ~AT91_AIC_SRCTYPE ; +at91_aic_write (AT91_AIC5_SMR , smr | srctype); + }else { + smr =at91_aic_read (AT91_AIC_SMR (d->hwirq)) + & ~AT91_AIC_SRCTYPE ; +at91_aic_write (AT91_AIC_SMR (d->hwirq), smr | srctype); + }return 0 ; } -void at91_irq_suspend (void ) -{ - backups =at91_aic_read (AT91_AIC_IMR ); -at91_aic_write (AT91_AIC_IDCR , backups); -at91_aic_write (AT91_AIC_IECR , wakeups); -} - -void at91_irq_resume (void ) -{ -at91_aic_write (AT91_AIC_IDCR , wakeups); -at91_aic_write (AT91_AIC_IECR , backups); -} - -#else -#define at91_aic_set_wake NULL -#endif -static struct irq_chip at91_aic_chip = { .name ="AIC" , .irq_mask = at91_aic_mask_irq,@@ -193,6 +329,35 @@ static void __init at91_aic_hw_init(unsigned int spu_vector)at91_aic_write (AT91_AIC_ICCR ,0xFFFFFFFF ); } +static void __init __maybe_unused at91_aic5_hw_init (unsigned int spu_vector) +{ +int i; + +/* +* Perform 8 End Of Interrupt Command to make sure AIC +* will not Lock out nIRQ +*/ +for (i =0 ; i <8 ; i++) +at91_aic_write (AT91_AIC5_EOICR ,0 ); + +/* +* Spurious Interrupt ID in Spurious Vector Register. +* When there is no current interrupt, the IRQ Vector Register +* reads the value stored in AIC_SPU +*/ +at91_aic_write (AT91_AIC5_SPU , spu_vector); + +/* No debugging in AIC: Debug (Protect) Control Register */ +at91_aic_write (AT91_AIC5_DCR ,0 ); + +/* Disable and clear all interrupts initially */ +for (i =0 ; i < n_irqs; i++) { +at91_aic_write (AT91_AIC5_SSR , i &AT91_AIC5_INTSEL_MSK ); +at91_aic_write (AT91_AIC5_IDCR ,1 ); +at91_aic_write (AT91_AIC5_ICCR ,1 ); + } +} +#if defined(CONFIG_OF )static int at91_aic_irq_map (struct irq_domain *h,unsigned int virq,irq_hw_number_t hw)@@ -210,13 +375,31 @@ static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,return 0 ; } +static int at91_aic5_irq_map (struct irq_domain *h,unsigned int virq, +irq_hw_number_t hw) +{ +at91_aic_write (AT91_AIC5_SSR , hw &AT91_AIC5_INTSEL_MSK ); + +/* Put virq number in Source Vector Register */ +at91_aic_write (AT91_AIC5_SVR , virq); + +/* Active Low interrupt, with priority */ +at91_aic_write (AT91_AIC5_SMR , +AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); + +irq_set_chip_and_handler (virq, &at91_aic_chip, handle_fasteoi_irq); +set_irq_flags (virq,IRQF_VALID |IRQF_PROBE ); + +return 0 ; +} +static int at91_aic_irq_domain_xlate (struct irq_domain *d,struct device_node *ctrlr,const u32 *intspec,unsigned int intsize,irq_hw_number_t *out_hwirq,unsigned int *out_type) {if (WARN_ON (intsize <3 ))return -EINVAL ; -if (WARN_ON (intspec[0 ] >=NR_AIC_IRQS )) +if (WARN_ON (intspec[0 ] >= n_irqs))return -EINVAL ;if (WARN_ON ((intspec[2 ] <AT91_AIC_IRQ_MIN_PRIORITY ) | (intspec[2 ] >AT91_AIC_IRQ_MAX_PRIORITY )))@@ -234,14 +417,24 @@ static struct irq_domain_ops at91_aic_irq_ops = { .xlate = at91_aic_irq_domain_xlate, }; -int __init at91_aic_of_init (struct device_node *node, -struct device_node *parent) +int __init at91_aic_of_common_init (struct device_node *node, +struct device_node *parent) {struct property *prop;const __be32 *p;u32 val; - at91_aic_irq_priorities =kzalloc (NR_AIC_IRQS + at91_extern_irq =kzalloc (BITS_TO_LONGS (n_irqs) + *sizeof (*at91_extern_irq),GFP_KERNEL ); +if (!at91_extern_irq) +return -ENOMEM ; + +if (at91_aic_pm_init ()) { +kfree (at91_extern_irq); +return -ENOMEM ; + } + + at91_aic_irq_priorities =kzalloc (n_irqs *sizeof (*at91_aic_irq_priorities),GFP_KERNEL );if (!at91_aic_irq_priorities)@@ -250,22 +443,56 @@ int __init at91_aic_of_init(struct device_node *node, at91_aic_base =of_iomap (node,0 ); at91_aic_np = node; - at91_aic_domain =irq_domain_add_linear (at91_aic_np,NR_AIC_IRQS , + at91_aic_domain =irq_domain_add_linear (at91_aic_np, n_irqs, &at91_aic_irq_ops,NULL );if (!at91_aic_domain)panic ("Unable to add AIC irq domain (DT)\n" ); - at91_extern_irq =0 ;of_property_for_each_u32 (node,"atmel,external-irqs" , prop, p, val) { -if (val >31 ) -pr_warn ("AIC: external irq %d > 31 skip it\n" , val); +if (val >= n_irqs) +pr_warn ("AIC: external irq %d >= %d skip it\n" , + val, n_irqs);else - at91_extern_irq |= (1 << val); +set_bit (val, at91_extern_irq); }irq_set_default_host (at91_aic_domain); -at91_aic_hw_init (NR_AIC_IRQS ); +return 0 ; +} + +int __init at91_aic_of_init (struct device_node *node, +struct device_node *parent) +{ +int err; + + err =at91_aic_of_common_init (node, parent); +if (err) +return err; + +at91_aic_hw_init (n_irqs); + +return 0 ; +} + +int __init at91_aic5_of_init (struct device_node *node, +struct device_node *parent) +{ +int err; + + at91_aic_caps |=AT91_AIC_CAP_AIC5 ; + n_irqs =NR_AIC5_IRQS ; + at91_aic_chip.irq_ack = at91_aic5_mask_irq; + at91_aic_chip.irq_mask = at91_aic5_mask_irq; + at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; + at91_aic_chip.irq_eoi = at91_aic5_eoi; + at91_aic_irq_ops.map = at91_aic5_irq_map; + + err =at91_aic_of_common_init (node, parent); +if (err) +return err; + +at91_aic5_hw_init (n_irqs);return 0 ; }@@ -274,22 +501,25 @@ int __init at91_aic_of_init(struct device_node *node,/* * Initialize the AIC interrupt controller. */ -void __init at91_aic_init (unsigned int priority[NR_AIC_IRQS ]) +void __init at91_aic_init (unsigned int *priority) {unsigned int i;int irq_base; +if (at91_aic_pm_init ()) +panic ("Unable to allocate bit maps\n" ); + at91_aic_base =ioremap (AT91_AIC ,512 );if (!at91_aic_base)panic ("Unable to ioremap AIC registers\n" );/* Add irq domain for AIC */ - irq_base =irq_alloc_descs (-1 ,0 ,NR_AIC_IRQS ,0 ); + irq_base =irq_alloc_descs (-1 ,0 , n_irqs,0 );if (irq_base <0 ) {WARN (1 ,"Cannot allocate irq_descs, assuming pre-allocated\n" ); irq_base =0 ; } - at91_aic_domain =irq_domain_add_legacy (at91_aic_np,NR_AIC_IRQS , + at91_aic_domain =irq_domain_add_legacy (at91_aic_np, n_irqs, irq_base,0 , &irq_domain_simple_ops,NULL );@@ -302,15 +532,14 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])* The IVR is used by macro get_irqnr_and_base to read and verify. * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. */ -for (i =0 ; i <NR_AIC_IRQS ; i++) { +for (i =0 ; i < n_irqs; i++) {/* Put hardware irq number in Source Vector Register: */ at91_aic_write (AT91_AIC_SVR (i),NR_IRQS_LEGACY + i);/* Active Low interrupt, with the specified priority */ at91_aic_write (AT91_AIC_SMR (i),AT91_AIC_SRCTYPE_LOW | priority[i]); -irq_set_chip_and_handler (NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq);set_irq_flags (i,IRQF_VALID |IRQF_PROBE ); } -at91_aic_hw_init (NR_AIC_IRQS ); +at91_aic_hw_init (n_irqs); }
Signature · 1 line
Nicolas Ferre
v3 cover ARM: at91: add sparse irq support and introduce aic5
In reply to ludovic.desroches at atmel.comOn 06/23/2012 06:05 PM, ludovic.desroches at atmel.com :
Quoted 6 lines
From: Ludovic Desroches <[email protected]>
This set of patches introduces AIC5 support with the goal to have only one kernel image for all SOCs. That's why sparse irq support was added. AIC5 can manage up to 128 irq lines. It introduces a new register map and a source select register to select the IRQ line we want to configure.
Thanks for this nice series.
I will queue it up in a at91-3.6-cleanup branch soon.
Bye,
Quoted 93 lines
v3 changes:
- of irq priorities support patch reworked: add a cell for priority value.
- sparse irq support patch reworked: no more usingnr_irqs, so have to shift static irq number byNR_IRQS_LEGACY.v2 changes:
- add Jean-Christophe patches since my patches are based on abd there have not been submitted yet
- I missed some machine descriptors in the first version, it is corrected with this new one.
- correct sparse irq support and removemach/irqs.h.
- correct issue on AIC5 support (missing allocation).Jean-Christophe PLAGNIOL-VILLARD (1):
ARM: at91: aic add dt support for external irqsLudovic Desroches (6):
ARM: at91: add of irq priorities support
ARM: at91: remove static irq priorities for sam9x5
ARM: at91: at91 based machines specify their own irq handler at run
time
ARM: at91: sparse irq support
ARM: at91: removemach/irqs.h
ARM: at91: add AIC5 support.../devicetree/bindings/arm/atmel-aic.txt | 9 +- arch/arm/boot/dts/at91sam9260.dtsi | 37 +- arch/arm/boot/dts/at91sam9263.dtsi | 31 +- arch/arm/boot/dts/at91sam9g45.dtsi | 39 +- arch/arm/boot/dts/at91sam9n12.dtsi | 30 +- arch/arm/boot/dts/at91sam9x5.dtsi | 39 +- arch/arm/mach-at91/Kconfig | 2 + arch/arm/mach-at91/at91rm9200.c | 1 + arch/arm/mach-at91/at91rm9200_devices.c | 84 ++-- arch/arm/mach-at91/at91sam9260.c | 1 + arch/arm/mach-at91/at91sam9260_devices.c | 92 +++--- arch/arm/mach-at91/at91sam9261.c | 1 + arch/arm/mach-at91/at91sam9261_devices.c | 68 ++-- arch/arm/mach-at91/at91sam9263.c | 1 + arch/arm/mach-at91/at91sam9263_devices.c | 80 ++-- arch/arm/mach-at91/at91sam926x_time.c | 2 +- arch/arm/mach-at91/at91sam9g45.c | 1 + arch/arm/mach-at91/at91sam9g45_devices.c | 108 +++--- arch/arm/mach-at91/at91sam9rl.c | 1 + arch/arm/mach-at91/at91sam9rl_devices.c | 76 ++-- arch/arm/mach-at91/at91sam9x5.c | 40 -- arch/arm/mach-at91/at91x40.c | 1 + arch/arm/mach-at91/board-1arm.c | 2 + arch/arm/mach-at91/board-afeb-9260v1.c | 2 + arch/arm/mach-at91/board-cam60.c | 2 + arch/arm/mach-at91/board-carmeva.c | 2 + arch/arm/mach-at91/board-cpu9krea.c | 2 + arch/arm/mach-at91/board-cpuat91.c | 2 + arch/arm/mach-at91/board-csb337.c | 2 + arch/arm/mach-at91/board-csb637.c | 2 + arch/arm/mach-at91/board-dt.c | 2 + arch/arm/mach-at91/board-eb01.c | 2 + arch/arm/mach-at91/board-eb9200.c | 2 + arch/arm/mach-at91/board-ecbat91.c | 2 + arch/arm/mach-at91/board-eco920.c | 2 + arch/arm/mach-at91/board-flexibity.c | 2 + arch/arm/mach-at91/board-foxg20.c | 2 + arch/arm/mach-at91/board-gsia18s.c | 2 + arch/arm/mach-at91/board-kafa.c | 2 + arch/arm/mach-at91/board-kb9202.c | 2 + arch/arm/mach-at91/board-neocore926.c | 2 + arch/arm/mach-at91/board-pcontrol-g20.c | 2 + arch/arm/mach-at91/board-picotux200.c | 2 + arch/arm/mach-at91/board-qil-a9260.c | 2 + arch/arm/mach-at91/board-rm9200dk.c | 2 + arch/arm/mach-at91/board-rm9200ek.c | 2 + arch/arm/mach-at91/board-rsi-ews.c | 2 + arch/arm/mach-at91/board-sam9-l9260.c | 2 + arch/arm/mach-at91/board-sam9260ek.c | 2 + arch/arm/mach-at91/board-sam9261ek.c | 2 + arch/arm/mach-at91/board-sam9263ek.c | 2 + arch/arm/mach-at91/board-sam9g20ek.c | 3 + arch/arm/mach-at91/board-sam9m10g45ek.c | 2 + arch/arm/mach-at91/board-sam9rlek.c | 2 + arch/arm/mach-at91/board-snapper9260.c | 2 + arch/arm/mach-at91/board-stamp9g20.c | 3 + arch/arm/mach-at91/board-usb-a926x.c | 4 + arch/arm/mach-at91/board-yl-9200.c | 2 + arch/arm/mach-at91/generic.h | 2 + arch/arm/mach-at91/include/mach/at91_aic.h | 34 ++ arch/arm/mach-at91/include/mach/entry-macro.S | 27 -- arch/arm/mach-at91/include/mach/irqs.h | 41 -- arch/arm/mach-at91/irq.c | 400 +++++++++++++++++--- arch/arm/mach-at91/pm.c | 1 + 64 files changed, 818 insertions(+), 507 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-at91/include/mach/irqs.h
Signature · 1 line
Nicolas Ferre