ARM: davinci: add support for the am1808 based enbw_cmc board
Subsystems (10)
v5 cover ARM: davinci: add support for the am1808 based enbw_cmc board
this patchserie add support for the davinci am1808 based enbw_cmc board.
changes for v2:
Post this patchserie now as v2, as reworked in the comments I got for the RFC serie.
changes for v3:
- Interrupt Controller:
- comment from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case the name of the init function (it calls the "new" __cp_intc_init() function, which was the "old" cp_intc_init()). Through this rework the changes for OF is better visible. As the OF case uses the irq_domain rework from Grant Likely, maybe the none OF case can use this also, but this should be tested on a hw ...
changes for v4:
- Interrupt Controller:
- split in two patches as Nori Sekhar suggested one for the irq_domain change
one for DT support
- add comment from Grant Likely for the DT part:
remove if/else clause, not needed. Make use of DT runtime configurable The non OF case is not tested!
changes for v5:
- Interrupt Controller:
add comments from Sergei Shtylyov:
- s/intc/cp_intc in commit subject
- Codingstyle fixes
add comment from Grant Likely:
- rename compatible" prop to "ti,cp-intc"
- call irq_domain_add also in the non DT case (was fixed in v4)
- switched from using d->irq to d->hwirq for the hardware irq number in irq_chip hooks
- I2C DT support:
add comments from Grant Likely:
- do not change value of dev->dev->platform_data, instead hold a copy in davinci_i2c_dev.
Got no comments to the following points, I noted in the RFC series, so posting this patchseries with them:
- ARM: davinci: configure davinci aemif chipselects through OF not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board support not really need to setup this bus timings, as they are setup in U-Boot ... but I want to post this, as I think, it is a nice to have, and I am not really sure, if this has to be a MFD device (If so, all bus interfaces for other SoCs should be converted also to MFD devices) ... as an example how this can be used I add this to the davinci nand controller OF support patch, in this patchserie.
- ARM: davinci: mux: add OF support
I want to get rid of the pin setup code in board code ... This patch introduces a davinci_cfg_reg_of() function, which davinci drivers can call, if they found a "pinmux-handle", so used in the following drivers in this patchserie:
drivers/net/ethernet/ti/davinci_emac
drivers/i2c/busses/i2c-davinci.c
drivers/mtd/nand/davinci_nand.c
This is removed for v4 serie, as Nori Sekhar suggested.
- post this board support with USB support, even though USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
change for v4:
The 10 ms delay is no longer needed, see discussion here:
http://www.spinics.net/lists/linux-usb/msg64232.html
shows the way to go ...
- MMC and USB are not using OF support yet, ideas how to port this are welcome. I need for USB and MMC board specific callbacks, how to solve this with OF support?
Heiko Schocher (7):
ARM: davinci, cp_intc: Add irq domain support
ARM: davinci, cp_intc: Add OF support for TI interrupt controller
ARM: davinci: configure davinci aemif chipselects through OF
ARM: davinci: net: davinci_emac: add OF support
ARM: davinci: i2c: add OF support
ARM: mtd: nand: davinci: add OF support for davinci nand controller
ARM: davinci: add support for the am1808 based enbw_cmc board
.../devicetree/bindings/arm/davinci/aemif.txt | 119 +++++++ .../devicetree/bindings/arm/davinci/i2c.txt | 31 ++ .../devicetree/bindings/arm/davinci/intc.txt | 27 ++ .../devicetree/bindings/arm/davinci/nand.txt | 72 ++++ .../devicetree/bindings/net/davinci_emac.txt | 41 +++ arch/arm/boot/dts/enbw_cmc.dts | 172 +++++++++ arch/arm/configs/enbw_cmc_defconfig | 123 +++++++ arch/arm/mach-davinci/Kconfig | 9 + arch/arm/mach-davinci/Makefile | 1 + arch/arm/mach-davinci/aemif.c | 86 +++++- arch/arm/mach-davinci/board-enbw-cmc.c | 374 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 83 ++++- arch/arm/mach-davinci/include/mach/aemif.h | 1 + arch/arm/mach-davinci/include/mach/uncompress.h | 1 + drivers/i2c/busses/i2c-davinci.c | 49 +++- drivers/mtd/nand/davinci_nand.c | 80 ++++- drivers/net/ethernet/ti/davinci_emac.c | 87 +++++- 17 files changed, 1335 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt create mode 100644 Documentation/devicetree/bindings/net/davinci_emac.txt create mode 100644 arch/arm/boot/dts/enbw_cmc.dts create mode 100644 arch/arm/configs/enbw_cmc_defconfig create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
Signature · 1 line
1.7.7.6
PATCH v5 1/7 ARM: davinci, cp_intc: Add irq domain support
---
- changes for v2:
- add comment from Grant Likely:
- migrate the whole interrupt controller to natively use an irq_domain. Rebased complete patchserie to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
Author: Grant Likely <[email protected]>
Date: Fri Jan 27 06:44:34 2012 -0700
irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init() is now also for the of case the name of the init function (it calls the "new" __cp_intc_init() function, which was the "old" cp_intc_init()). Throught this rework the changes for OF is better visible. As the OF case uses the irq_domain rework from Grant Likely, maybe the none OF case can use this also, but this should be tested on a hw ...
- rebased to:
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
Author: Grant Likely <[email protected]>
Date: Fri Feb 24 14:58:54 2012 -0700
mfd: twl-core: Add IRQ_DOMAIN dependency
- changes for v4
- split patch in 2 patches, one for irq_domain adaption one for DT enhancement, as Nori Sekhar suggested
- add comment from Grant Likely for the DT part:
remove if/else clause, not needed.
Make use of DT runtime configurable
- changes for v5:
add comments from Sergei Shtylyov:
- s/intc/cp_intc in commit subject
- Codingstyle fixes
add comment from Grant Likely:
- call irq_domain_add also in the non DT case (was fixed in v4)
- switched from using d->irq to d->hwirq for the hardware irq number in irq_chip hooks
arch/arm/mach-davinci/cp_intc.c | 63 ++++++++++++++++++++++++++++++-------- 1 files changed, 49 insertions(+), 14 deletions(-)
arch/arm/mach-davinci/cp_intc.c +49 -14
@@ -9,8 +9,10 @@* kind, whether express or implied. */ +#include <linux/export.h> #include <linux/init.h> #include <linux/irq.h> +#include <linux/irqdomain.h> #include <linux/io.h> #include <mach/common.h>
@@ -28,7 +30,7 @@ static inline void cp_intc_write(unsigned long value, unsigned offset)static void cp_intc_ack_irq (struct irq_data *d) { -cp_intc_write (d->irq,CP_INTC_SYS_STAT_IDX_CLR ); +cp_intc_write (d->hwirq,CP_INTC_SYS_STAT_IDX_CLR ); }/* Disable interrupt */
@@ -36,20 +38,20 @@ static void cp_intc_mask_irq(struct irq_data *d) {/* XXX don't know why we need to disable nIRQ here... */ cp_intc_write (1 ,CP_INTC_HOST_ENABLE_IDX_CLR ); -cp_intc_write (d->irq,CP_INTC_SYS_ENABLE_IDX_CLR ); +cp_intc_write (d->hwirq,CP_INTC_SYS_ENABLE_IDX_CLR );cp_intc_write (1 ,CP_INTC_HOST_ENABLE_IDX_SET ); }/* Enable interrupt */ static void cp_intc_unmask_irq (struct irq_data *d) { -cp_intc_write (d->irq,CP_INTC_SYS_ENABLE_IDX_SET ); +cp_intc_write (d->hwirq,CP_INTC_SYS_ENABLE_IDX_SET ); }static int cp_intc_set_irq_type (struct irq_data *d,unsigned int flow_type) { -unsigned reg =BIT_WORD (d->irq); -unsigned mask =BIT_MASK (d->irq); +unsigned reg =BIT_WORD (d->hwirq); +unsigned mask =BIT_MASK (d->hwirq);unsigned polarity =cp_intc_read (CP_INTC_SYS_POLARITY (reg));unsigned type =cp_intc_read (CP_INTC_SYS_TYPE (reg));
@@ -99,18 +101,36 @@ static struct irq_chip cp_intc_irq_chip = { .irq_set_wake = cp_intc_set_wake, }; -void __init cp_intc_init (void ) +static struct irq_domain *cp_intc_domain; + +static int cp_intc_host_map (struct irq_domain *h,unsigned int virq, +irq_hw_number_t hw) +{ +pr_debug ("cp_intc_host_map(%d, 0x%lx)\n" , virq, hw); + +irq_set_chip (virq, &cp_intc_irq_chip); +set_irq_flags (virq,IRQF_VALID |IRQF_PROBE ); +irq_set_handler (virq, handle_edge_irq); +return 0 ; +} + +static const struct irq_domain_ops cp_intc_host_ops = { + .map = cp_intc_host_map, + .xlate = irq_domain_xlate_onetwocell, +}; + +int __init __cp_intc_init (struct device_node *node) { -unsigned long num_irq = davinci_soc_info.intc_irq_num; +u32 num_irq = davinci_soc_info.intc_irq_num;u8 *irq_prio = davinci_soc_info.intc_irq_prios;u32 *host_map = davinci_soc_info.intc_host_map;unsigned num_reg =BITS_TO_LONGS (num_irq); -int i; +int i, irq_base; davinci_intc_type =DAVINCI_INTC_TYPE_CP_INTC ; davinci_intc_base =ioremap (davinci_soc_info.intc_base,SZ_8K );if (WARN_ON (!davinci_intc_base)) -return ; +return -EINVAL ;cp_intc_write (0 ,CP_INTC_GLOBAL_ENABLE );
@@ -165,13 +185,28 @@ void __init cp_intc_init(void)for (i =0 ; host_map[i] !=-1 ; i++)cp_intc_write (host_map[i],CP_INTC_HOST_MAP (i)); -/* Set up genirq dispatching for cp_intc */ -for (i =0 ; i < num_irq; i++) { -irq_set_chip (i, &cp_intc_irq_chip); -set_irq_flags (i,IRQF_VALID |IRQF_PROBE ); -irq_set_handler (i, handle_edge_irq); + irq_base =irq_alloc_descs (-1 ,0 , num_irq,0 ); +if (irq_base <0 ) { +pr_warn ("Couldn't allocate IRQ numbers\n" ); + irq_base =0 ; + } + +/* create a legacy host */ + cp_intc_domain =irq_domain_add_legacy (node, num_irq, + irq_base,0 , &cp_intc_host_ops,NULL ); + +if (!cp_intc_domain) { +pr_err ("cp_intc: failed to allocate irq host!\n" ); +return -EINVAL ; }/* Enable global interrupt */ cp_intc_write (1 ,CP_INTC_GLOBAL_ENABLE ); + +return 0 ; +} + +void __init cp_intc_init (void ) +{ +__cp_intc_init (NULL ); }
Signature · 1 line
1.7.7.6
PATCH v5 1/7 ARM: davinci, cp_intc: Add irq domain support
Hi Heiko,
Quoted 10 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Sergei Shtylyov <[email protected]>---
On AM18x EVM, with this patch applied and CONFIG_KEYBOARD_GPIO_POLLED=y, I get warnings of type:
irq 0, desc: c0372950, depth: 1, count: 0, unhandled: 0
->handle_irq(): c00552f8, handle_bad_irq+0x0/0x23c
->irq_data.chip(): c03794e8, 0xc03794e8
->action(): (null)
IRQ_NOPROBE set
IRQ_NOREQUEST set
They do not come when CONFIG_KEYBOARD_GPIO_POLLED=n. I am yet to debug this, but wanted to point out now in case there is anything obvious.
# cat /proc/interrupts
CPU00: 32 none
11: 0 cp_intc edma
12: 0 cp_intc edma_error
15: 1048613 cp_intc i2c_davinci
21: 50992 cp_intc clockevent
22: 17 cp_intc free-run counter
33: 0 cp_intc eth0
34: 13747 cp_intc eth0
35: 5032 cp_intc eth0
36: 0 cp_intc eth0
52: 162759 cp_intc da8xx_lcdc
61: 270 cp_intc serial
93: 0 cp_intc edma
94: 0 cp_intc edma_error
Err: 32
The interrupt number 0 shows up which seems to be causing these warnings.
I also had to select IRQ_DOMAIN for CP_INTC in arch/arm/mach-davinci/Kconfig to make the kernel builds after applying this patch.
Thanks,
Sekhar
PATCH v5 1/7 ARM: davinci, cp_intc: Add irq domain support
Hi Heiko,
Quoted 25 lines · Sekhar Nori
Hi Heiko,
Quoted 10 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Sergei Shtylyov <[email protected]>---
On AM18x EVM, with this patch applied and
CONFIG_KEYBOARD_GPIO_POLLED=y, I get warnings of type:irq 0, desc:
c0372950, depth: 1, count: 0, unhandled: 0->handle_irq():
c00552f8,handle_bad_irq+0x0/0x23c->irq_data.chip():
c03794e8,0xc03794e8->action(): (null)
Quoted 7 lines
IRQ_NOPROBEset
IRQ_NOREQUESTsetThey do not come when
CONFIG_KEYBOARD_GPIO_POLLED=n. I am yet to debug this, but wanted to point out now in case there is anything obvious.
I debugged this a bit more and the good news for you is that spurious IRQ messages have got nothing to do with your patch. Looks like the spurious interrupts on interrupt line 0 were always there - just that they were getting silently ignored earlier. I am still debugging what is causing these spurious interrupts.
Thanks,
Sekhar
PATCH v5 1/7 ARM: davinci, cp_intc: Add irq domain support
Hello Nori,
Quoted 35 lines · Sekhar Nori
Hi Heiko,
Quoted 32 lines · Sekhar Nori
Hi Heiko,
Quoted 10 lines · Heiko Schocher
Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sergei Shtylyov<[email protected]>---
On AM18x EVM, with this patch applied and
CONFIG_KEYBOARD_GPIO_POLLED=y, I get warnings of type:irq 0, desc:
c0372950, depth: 1, count: 0, unhandled: 0->handle_irq():
c00552f8,handle_bad_irq+0x0/0x23c->irq_data.chip():
c03794e8,0xc03794e8->action(): (null)
IRQ_NOPROBEset
IRQ_NOREQUESTsetThey do not come when
CONFIG_KEYBOARD_GPIO_POLLED=n. I am yet to debug this, but wanted to point out now in case there is anything obvious.
Hups, seems I missed your EMail :-(
Quoted 2 lines
I debugged this a bit more and the good news for you is that spurious IRQ messages have got nothing to do with your patch. Looks like the
Good :-)
Quoted 3 lines
spurious interrupts on interrupt line 0 were always there - just that they were getting silently ignored earlier. I am still debugging what is causing these spurious interrupts.
Hmm.. I did not see this on the enbw_cmc board. Maybe I can try it on the TMDXEXP1808L board, but I must admit, that I am currently lacking time, because of an accident ...
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v5 1/7 ARM: davinci, cp_intc: Add irq domain support
In reply to Heiko SchocherHi Heiko,
Quoted 10 lines · Heiko Schocher
Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Sergei Shtylyov <[email protected]>---
Applying this patch with two changes:
1) select IRQ_DOMAIN for CP_INTC arch/arm/mach-davinci/Kconfig. Without this build breaks.
2) Add some commit description. For future, please have some commit description on all patches.
I boot tested this on AM18x EVM. Also tested that GPIO interrupts are not broken.
Thanks,
Sekhar
PATCH v5 1/7 ARM: davinci, cp_intc: Add irq domain support
Hello Sekhar,
Quoted 14 lines · Sekhar Nori
Hi Heiko,
Quoted 10 lines · Heiko Schocher
Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sergei Shtylyov<[email protected]>---
Quoted 7 lines
Applying this patch with two changes:
1) select
IRQ_DOMAINforCP_INTCarch/arm/mach-davinci/Kconfig. Without this build breaks.2) Add some commit description. For future, please have some commit description on all patches.
Ok.
Quoted 2 lines
I boot tested this on AM18x EVM. Also tested that GPIO interrupts are not broken.
Thanks!
BTW: What is with the "rest" of the patches in this patchset? I got no
more comments for them.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v5 2/7 ARM: davinci, cp_intc: Add OF support for TI interrupt controller
In reply to Heiko SchocherAdd a function to initialize the Common Platform Interrupt Controller (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
---
- changes for v4
- split patch in 2 patches, one for irq_domain adaption one for DT enhancement, as Nori Sekhar suggested.
- add comment from Grant Likely for the DT part:
remove if/else clause, not needed.
Make use of DT runtime configurable
- changes for v5:
add comments from Sergei Shtylyov:
- s/intc/cp_intc in commit subject
add comments from Grant Likely:
- rename compatible" prop to "ti,cp-intc"
.../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 24 ++++++++++++++++- 2 files changed, 49 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txt
Documentation/devicetree/bindings/arm/davinci/intc.txt new file +27 -0
@@ -0,0 +1,27 @@ +* TI Common Platform Interrupt Controller + +Common Platform Interrupt Controller (cp_intc) is used on +OMAP-L1x SoCs and can support several configurable number +of interrupts. + +Main node required properties: + +- compatible : should be: + "ti,cp-intc" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a <u32> and the value shall be 1. + + The cell contains the interrupt number in the range [0-128]. +- ti,intc-size: Number of interrupts handled by the interrupt controller. +- reg: physical base address and size of the intc registers map. + +Example: + + intc: interrupt-controller at 1 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0xfffee000 0x2000>; + };
arch/arm/mach-davinci/cp_intc.c +22 -2
@@ -14,6 +14,9 @@#include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <mach/common.h> #include <mach/cp_intc.h>
@@ -119,7 +122,7 @@ static const struct irq_domain_ops cp_intc_host_ops = { .xlate = irq_domain_xlate_onetwocell, }; -int __init __cp_intc_init (struct device_node *node) +int __init __cp_intc_init (struct device_node *node,struct device_node *parent) {u32 num_irq = davinci_soc_info.intc_irq_num;u8 *irq_prio = davinci_soc_info.intc_irq_prios;
@@ -129,6 +132,15 @@ int __init __cp_intc_init(struct device_node *node) davinci_intc_type =DAVINCI_INTC_TYPE_CP_INTC ; davinci_intc_base =ioremap (davinci_soc_info.intc_base,SZ_8K ); +if (node) { + davinci_intc_base =of_iomap (node,0 ); +if (of_property_read_u32 (node,"ti,intc-size" , &num_irq)) +pr_warn ("unable to get intc-size, default to %d\n" , + num_irq); + }else { + davinci_intc_base =ioremap (davinci_soc_info.intc_base, +SZ_8K ); + }if (WARN_ON (!davinci_intc_base))return -EINVAL ;
@@ -206,7 +218,15 @@ int __init __cp_intc_init(struct device_node *node)return 0 ; } +static struct of_device_id irq_match[]__initdata = { + { .compatible ="ti,cp-intc" , .data = __cp_intc_init, }, + { } +}; +void __init cp_intc_init (void ) { -__cp_intc_init (NULL ); +if (!of_find_compatible_node (NULL ,NULL ,"ti,cp-intc" )) +__cp_intc_init (NULL ,NULL ); +else +of_irq_init (irq_match); }
Signature · 1 line
1.7.7.6
PATCH v5 2/7 ARM: davinci, cp_intc: Add OF support for TI interrupt controller
Hi Heiko,
Documentation/devicetree/bindings/arm/davinci/intc.txt
Quoted 36 lines · Heiko Schocher
Add a function to initialize the Common Platform Interrupt Controller (
cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Sergei Shtylyov <[email protected]>---
- changes for v4
- split patch in 2 patches, one forirq_domainadaption one for DT enhancement, as Nori Sekhar suggested.
- add comment from Grant Likely for the DT part:
remove if/else clause, not needed.
Make use of DT runtime configurable- changes for v5:
add comments from Sergei Shtylyov:
- s/intc/cp_intc in commit subject
add comments from Grant Likely:
- rename compatible" prop to "ti,cp-intc".../devicetree/bindings/arm/davinci/intc.txt | 27 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 24 ++++++++++++++++- 2 files changed, 49 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/intc.txtDocumentation/devicetree/bindings/arm/davinci/intc.txt new file +0
-0
I think this file is better named cp-intc.txt since there is also an intc (a different IP) used on DaVinci platforms.
Quoted 52 lines
Documentation/devicetree/bindings/arm/davinci/intc.txt new file +27
-0@@ -0,0 +1,27 @@ +* TI Common Platform Interrupt Controller + +Common Platform Interrupt Controller (cp_intc) is used on +OMAP-L1x SoCs and can support several configurable number +of interrupts. + +Main node required properties: + +- compatible : should be: + "ti,cp-intc" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a <u32> and the value shall be 1. + + The cell contains the interrupt number in the range [0-128]. +- ti,intc-size: Number of interrupts handled by the interrupt controller. +- reg: physical base address and size of the intc registers map. + +Example: + + intc: interrupt-controller at 1 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0xfffee000 0x2000>; + };arch/arm/mach-davinci/cp_intc.c +4
-1@@ -14,6 +14,9 @@#include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <mach/common.h> #include <mach/cp_intc.h> @@ -119,7 +122,7 @@ static const struct irq_domain_ops cp_intc_host_ops = { .xlate = irq_domain_xlate_onetwocell, }; -int __init __cp_intc_init (struct device_node *node) +int __init __cp_intc_init (struct device_node *node,struct device_node *parent) {u32 num_irq = davinci_soc_info.intc_irq_num;u8 *irq_prio = davinci_soc_info.intc_irq_prios;
arch/arm/mach-davinci/cp_intc.c int __init __cp_intc_init(struct device_node *node) · line 135
Quoted 4 lines
arch/arm/mach-davinci/cp_intc.c +0
-0@@ -129,6 +132,15 @@ int __init __cp_intc_init(struct device_node *node) davinci_intc_type =DAVINCI_INTC_TYPE_CP_INTC ; davinci_intc_base =ioremap (davinci_soc_info.intc_base,SZ_8K );
This line needs to be dropped because you are doing an ioremap again down below.
Quoted 18 lines
arch/arm/mach-davinci/cp_intc.c +11
-0+if (node) { + davinci_intc_base =of_iomap (node,0 ); +if (of_property_read_u32 (node,"ti,intc-size" , &num_irq)) +pr_warn ("unable to get intc-size, default to %d\n" , + num_irq); + }else { + davinci_intc_base =ioremap (davinci_soc_info.intc_base, +SZ_8K ); + }if (WARN_ON (!davinci_intc_base))return -EINVAL ;@@ -206,7 +218,15 @@ int __init __cp_intc_init(struct device_node *node)return 0 ; } +static struct of_device_id irq_match[]__initdata = { + { .compatible ="ti,cp-intc" , .data = __cp_intc_init, },
arch/arm/mach-davinci/cp_intc.c int __init __cp_intc_init(struct device_node *node) · line 231
Quoted 10 lines
arch/arm/mach-davinci/cp_intc.c +7
-1+ { } +}; +void __init cp_intc_init (void ) { -__cp_intc_init (NULL ); +if (!of_find_compatible_node (NULL ,NULL ,"ti,cp-intc" )) +__cp_intc_init (NULL ,NULL ); +else +of_irq_init (irq_match);
It turns out of_irq_init() does not exist on non-DT builds so this cause build breakage when DT is not being used. Looking around, other platforms are calling of_irq_init() in the generic DT board file and not in the interrupt controller code. See arch/arm/mach-at91/board-dt.c or arch/arm/mach-omap2/board-generic.c for examples. We need to adopt a similar strategy for DaVinci.
To save time, I implemented these fixes and created a new patch which I will send across shortly. Please have a look at that and let me know if it works for you. I tested the patch on AM18x EVM.
Thanks,
Sekhar
A message that is not in the archive (sent off-list or not yet received): [email protected]
PATCH 1/1 ARM: davinci: cp_intc: Add OF support for TI interrupt controller
From: Heiko Schocher <[email protected]>
Add a function to initialize the Common Platform Interrupt Controller (cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.
--- .../devicetree/bindings/arm/davinci/cp-intc.txt | 27 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 16 +++++++++--- arch/arm/mach-davinci/include/mach/cp_intc.h | 1 + 3 files changed, 41 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/cp-intc.txt
Documentation/devicetree/bindings/arm/davinci/cp-intc.txt new file +27 -0
@@ -0,0 +1,27 @@ +* TI Common Platform Interrupt Controller + +Common Platform Interrupt Controller (cp_intc) is used on +OMAP-L1x SoCs and can support several configurable number +of interrupts. + +Main node required properties: + +- compatible : should be: + "ti,cp-intc" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a <u32> and the value shall be 1. + + The cell contains the interrupt number in the range [0-128]. +- ti,intc-size: Number of interrupts handled by the interrupt controller. +- reg: physical base address and size of the intc registers map. + +Example: + + intc: interrupt-controller@1 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0xfffee000 0x2000>; + };
arch/arm/mach-davinci/cp_intc.c +13 -3
@@ -14,6 +14,9 @@#include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <mach/common.h> #include <mach/cp_intc.h>
@@ -119,7 +122,7 @@ static const struct irq_domain_ops cp_intc_host_ops = { .xlate = irq_domain_xlate_onetwocell, }; -int __init __cp_intc_init (struct device_node *node) +int __init cp_intc_of_init (struct device_node *node,struct device_node *parent) {u32 num_irq = davinci_soc_info.intc_irq_num;u8 *irq_prio = davinci_soc_info.intc_irq_prios;
@@ -128,7 +131,14 @@ int __init __cp_intc_init(struct device_node *node)int i, irq_base; davinci_intc_type =DAVINCI_INTC_TYPE_CP_INTC ; - davinci_intc_base =ioremap (davinci_soc_info.intc_base,SZ_8K ); +if (node) { + davinci_intc_base =of_iomap (node,0 ); +if (of_property_read_u32 (node,"ti,intc-size" , &num_irq)) +pr_warn ("unable to get intc-size, default to %d\n" , + num_irq); + }else { + davinci_intc_base =ioremap (davinci_soc_info.intc_base,SZ_8K ); + }if (WARN_ON (!davinci_intc_base))return -EINVAL ;
@@ -208,5 +218,5 @@ int __init __cp_intc_init(struct device_node *node)void __init cp_intc_init (void ) { -__cp_intc_init (NULL ); +cp_intc_of_init (NULL ,NULL ); }
arch/arm/mach-davinci/include/mach/cp_intc.h +1 -0
@@ -52,5 +52,6 @@#define CP_INTC_VECTOR_ADDR (n) (0x2000 + (n << 2))void __init cp_intc_init (void ); +int __init cp_intc_of_init (struct device_node *,struct device_node *);#endif /* __ASM_HARDWARE_CP_INTC_H */
Signature · 1 line
1.7.10.1
PATCH 1/1 ARM: davinci: cp_intc: Add OF support for TI interrupt controller
Hello Sekhar,
Quoted 14 lines · Sekhar Nori
From: Heiko Schocher<[email protected]>
Add a function to initialize the Common Platform Interrupt Controller (
cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sergei Shtylyov<[email protected]>Signed-off-by Sekhar Nori<[email protected]>
Quoted 6 lines
--- .../devicetree/bindings/arm/davinci/cp-intc.txt | 27 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 16 +++++++++--- arch/arm/mach-davinci/include/mach/cp_intc.h | 1 + 3 files changed, 41 insertions(+), 3 deletions(-)create mode 100644
Documentation/devicetree/bindings/arm/davinci/cp-intc.txt
Thanks!
Tested on the enbw_cmc board.
Sent the updated "ARM: davinci: add support for the am1808 based enbw_cmc" based on this patch soon.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH 1/1 ARM: davinci: cp_intc: Add OF support for TI interrupt controller
Hi Grant,
Quoted 26 lines · Heiko Schocher
Hello Sekhar,
Quoted 14 lines · Sekhar Nori
From: Heiko Schocher<[email protected]>
Add a function to initialize the Common Platform Interrupt Controller (
cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sergei Shtylyov<[email protected]>Signed-off-by Sekhar Nori<[email protected]>Quoted 8 lines
--- .../devicetree/bindings/arm/davinci/cp-intc.txt | 27 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 16 +++++++++--- arch/arm/mach-davinci/include/mach/cp_intc.h | 1 + 3 files changed, 41 insertions(+), 3 deletions(-)create mode 100644
Documentation/devicetree/bindings/arm/davinci/cp-intc.txt
Quoted 3 lines
Thanks!
Tested on the
enbw_cmcboard.
Any further feedback on this? If you are OK, I would like to queue this for v3.6 through DaVinci tree.
Thanks,
Sekhar
PATCH 1/1 ARM: davinci: cp_intc: Add OF support for TI interrupt controller
Hi Rob,
Quoted 29 lines · Sekhar Nori
Hi Grant,
Quoted 26 lines · Heiko Schocher
Hello Sekhar,
Quoted 22 lines · Sekhar Nori
From: Heiko Schocher<[email protected]>
Add a function to initialize the Common Platform Interrupt Controller (
cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sergei Shtylyov<[email protected]>Signed-off-by Sekhar Nori<[email protected]>--- .../devicetree/bindings/arm/davinci/cp-intc.txt | 27 ++++++++++++++++++++ arch/arm/mach-davinci/cp_intc.c | 16 +++++++++--- arch/arm/mach-davinci/include/mach/cp_intc.h | 1 + 3 files changed, 41 insertions(+), 3 deletions(-)create mode 100644
Documentation/devicetree/bindings/arm/davinci/cp-intc.txt
Quoted 6 lines
Quoted 3 lines
Thanks!
Tested on the
enbw_cmcboard.Any further feedback on this? If you are OK, I would like to queue this for v3.6 through DaVinci tree.
Do you have any feedback on this patch? Looks like Grant is going to be busy for a while. If you do not have the original patch I can forward it to you.
Thanks,
Sekhar
PATCH v5 3/7 ARM: davinci: configure davinci aemif chipselects through OF
In reply to Heiko SchocherAdd support for configuring the aemif timing registers through device tree. Introduce new compatible property "ti,davinci-cs", see full description in Documentation/devicetree/bindings/arm/davinci/aemif.txt
---
- changes for v2
- add comment from Sergei Shtylyov:
- use of_property_read_u32()
- Conding Style changes
- add comment from Sekhar Nori:
- add patch description
- use davinci_aemif_setup_timing
- change compatible node to "ti,davinci-aemif"
- not moved to mfd, as mentioned in this discussion:
http://davinci-linux-open-source.1494791.n2.nabble.com/PATCH-arm-davinci-configure-davinci-aemif-chipselects-through-OF-td7059739.html
instead use a phandle in the DTS, so drivers which uses the davinci aemif, can call davinci_aemif_setup_timing_of()
This is just thought as an RFC ... The enbw_cmc board support not really need to setup this bus timings, as they are setup in U-Boot ... but I want to post this, as I think, it is a nice to have ... as an example used in the davinci nand controller OF support patch, in this patchserie.
- no changes for v3
- no changes for v4
- no changes for v5
.../devicetree/bindings/arm/davinci/aemif.txt | 119 ++++++++++++++++++++ arch/arm/mach-davinci/aemif.c | 86 ++++++++++++++- arch/arm/mach-davinci/include/mach/aemif.h | 1 + 3 files changed, 205 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/aemif.txt
Documentation/devicetree/bindings/arm/davinci/aemif.txt new file +119 -0
@@ -0,0 +1,119 @@ +* Texas Instruments Davinci AEMIF + +This file provides information, what the device node for the +davinci aemif interface contain. + +Required properties: +- compatible: "ti,davinci-aemif"; +- #address-cells : Should be either two or three. The first cell is the + chipselect number, and the remaining cells are the + offset into the chipselect. +- #size-cells : Either one or two, depending on how large each chipselect + can be. +- ranges : Each range corresponds to a single chipselect, and cover + the entire access window as configured. + +Optional properties: +- none + +Optional subnodes: +- Chipselect setup: + - compatible: "ti,davinci-cs"; + - #address-cells = <1>; + - #size-cells = <1>; + + Timing setup, all timings in nanoseconds + - cs: chipselect (value 2,3,4 or 5) + - asize: Asynchronous Data Bus Width. + value: + 0: 8 bit + 1: 16 bit + - ta: Minimum Turn-Around time. + - rhold: Read hold width + - rstrobe: Read strobe width + - rsetup: Read setup width + - whold: Write hold width + - wstrobe: Write strobe width + - wsetup: Write setup width + - ew: Extend Wait bit + value: + 0: Extended wait cycles disabled. + 1: Extended wait cycles enabled. + - ss: Select Strobe bit. + value: + 0: Normal Mode enabled. + 1: Select Strobe Mode enabled. +- CFI driver: + see: Documentation/devicetree/bindings/mtd/mtd-physmap.txt + +Example (enbw_cmc board): + aemif at 60000000 { + compatible = "ti,davinci-aemif"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0x68000000 0x80000>; + ranges = <2 0 0x60000000 0x02000000 + 3 0 0x62000000 0x02000000 + 4 0 0x64000000 0x02000000 + 5 0 0x66000000 0x02000000 + 6 0 0x68000000 0x02000000>; + cs2 at 68000000 { + compatible = "ti,davinci-cs"; + #address-cells = <1>; + #size-cells = <1>; + /* all timings in nanoseconds */ + cs = <2>; + asize = <1>; + ta = <0>; + rhold = <7>; + rstrobe = <42>; + rsetup = <14>; + whold = <7>; + wstrobe = <42>; + wsetup = <14>; + ew = <0>; + ss = <0>; + }; + flash at 2,0 { + compatible = "cfi-flash"; + reg = <2 0x0 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + device-width = <2>; + }; + nand_cs: cs3 at 68000000 { + compatible = "ti,davinci-cs"; + #address-cells = <1>; + #size-cells = <1>; + /* all timings in nanoseconds */ + cs = <3>; + asize = <0>; + ta = <0>; + rhold = <7>; + rstrobe = <42>; + rsetup = <7>; + whold = <7>; + wstrobe = <14>; + wsetup = <7>; + ew = <0>; + ss = <0>; + }; + nandflash at 3,0 { + compatible = "ti,davinci-nand"; + reg = <3 0x0 0x807ff + 6 0x0 0x8000>; + #address-cells = <1>; + #size-cells = <1>; + mask_ale = <0>; + mask_cle = <0>; + mask_chipsel = <0>; + ecc_mode = <2>; + ecc_bits = <4>; + options = <0>; + bbt_options = <0x20000>; + pinmux-handle = <&nand_pins>; + timing-handle = <&nand_cs>; + }; + + };
arch/arm/mach-davinci/aemif.c +85 -1
113 lines not on this page · raw message
arch/arm/mach-davinci/include/mach/aemif.h +1 -0
@@ -33,4 +33,5 @@ struct davinci_aemif_timing {int davinci_aemif_setup_timing (struct davinci_aemif_timing *t,void __iomem *base,unsigned cs); +int davinci_aemif_setup_timing_of (struct device_node *np);#endif
Signature · 1 line
1.7.7.6
PATCH v5 4/7 ARM: davinci: net: davinci_emac: add OF support
In reply to Heiko Schocheradd of support for the davinci_emac driver.
---
- changes for v2:
- add comment from Anatoly Sivov
- fix typo in davinci_emac.txt
- add comment from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- use devm_kzalloc()
- use of_match_ptr()
- document all new properties
- remove of_address_to_resource() and do not overwrite resource table
- whitespace fixes
- remove hw_ram_addr as it is not used in current board code
- no changes for v3
- changes for v4:
add comments from Nori Sekhar:
- move devictree documentation to:
Documentation/devicetree/bindings/net/davinci_emac.txt
- fix typo in it
- rename compatible property to "ti,davinci-dm6467-emac"
- remove pinmux-handle
- set version directly in pdata->version
- no changes for v5
.../devicetree/bindings/net/davinci_emac.txt | 41 +++++++++ drivers/net/ethernet/ti/davinci_emac.c | 87 +++++++++++++++++++- 2 files changed, 127 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/davinci_emac.txt
Documentation/devicetree/bindings/net/davinci_emac.txt new file +41 -0
@@ -0,0 +1,41 @@ +* Texas Instruments Davinci EMAC + +This file provides information, what the device node +for the davinci_emac interface contains. + +Required properties: +- compatible: "ti,davinci-dm6467-emac"; +- reg: Offset and length of the register set for the device +- ti,davinci-ctrl-reg-offset: offset to control register +- ti,davinci-ctrl-mod-reg-offset: offset to control module register +- ti,davinci-ctrl-ram-offset: offset to control module ram +- ti,davinci-ctrl-ram-size: size of control module ram +- ti,davinci-rmii-en: use RMII +- ti,davinci-no-bd-ram: has the emac controller BD RAM +- phy-handle: Contains a phandle to an Ethernet PHY. + if not, davinci_emac driver defaults to 100/FULL +- interrupts: interrupt mapping for the davinci emac interrupts sources: + 4 sources: <Receive Threshold Interrupt + Receive Interrupt + Transmit Interrupt + Miscellaneous Interrupt> + +Optional properties: +- local-mac-address : 6 bytes, mac address + +Example (enbw_cmc board): + eth0: emac at 1e20000 { + compatible = "ti,davinci-dm6467-emac"; + reg = <0x220000 0x4000>; + ti,davinci-ctrl-reg-offset = <0x3000>; + ti,davinci-ctrl-mod-reg-offset = <0x2000>; + ti,davinci-ctrl-ram-offset = <0>; + ti,davinci-ctrl-ram-size = <0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <33 + 34 + 35 + 36 + >; + interrupt-parent = <&intc>; + };
drivers/net/ethernet/ti/davinci_emac.c +86 -1
123 lines not on this page · raw message
Signature · 1 line
1.7.7.6
A message that is not in the archive (sent off-list or not yet received): [email protected]
Sekhar Nori
Acked-byRe: [PATCH v5 4/7] ARM: davinci: net: davinci_emac: add OF support
Hi Heiko,
Quoted 31 lines · Heiko Schocher
add of support for the
davinci_emacdriver.Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc netdev at vger.kernel.orgCc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Anatoly Sivov <[email protected]>---
(quoted diff) +17
-0+#ifdef CONFIG_OF +static struct emac_platform_data + *davinci_emac_of_get_pdata(struct platform_device *pdev, + struct emac_priv *priv) +{ + struct device_node *np; + struct emac_platform_data *pdata = NULL; + const u8 *mac_addr; + u32 data; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + goto nodata; + }
Review
Quoted 10 lines
(quoted diff) +10
-0+ + np = pdev->dev.of_node; + if (!np) + goto nodata; + else + pdata->version = EMAC_VERSION_2; + + mac_addr = of_get_mac_address(np); + if (mac_addr) + memcpy(pdata->mac_addr, mac_addr, ETH_ALEN);
I suspect that even in the DT case, many boards will continue to read mac address from on-board EEPROMs or from an on-chip eFUSE. To take care of such cases, I propose use mac address in DT data only if no valid address is passed through platform data. The attached patch does this change.
If you are OK with this modification, can you please merge it and repost just this patch for review? Please CC David Miller (davem at davemloft.net) on your next post as he is the netdev maintainer and this patch needs to be merged through him or at least needs his ack.
With this modification, you can add my:
Thanks,
Sekhar
---8<----
drivers/net/ethernet/ti/davinci_emac.c +5 -3
@@ -1795,9 +1795,11 @@ static struct emac_platform_dataelse pdata->version =EMAC_VERSION_2 ; - mac_addr =of_get_mac_address (np); -if (mac_addr) -memcpy (pdata->mac_addr, mac_addr,ETH_ALEN ); +if (!is_valid_ether_addr (pdata->mac_addr)) { + mac_addr =of_get_mac_address (np); +if (mac_addr) +memcpy (pdata->mac_addr, mac_addr,ETH_ALEN ); + } ret =of_property_read_u32 (np,"ti,davinci-ctrl-reg-offset" , &data);if (!ret)
A message that is not in the archive (sent off-list or not yet received): [email protected]
Re: [PATCH v5 4/7] ARM: davinci: net: davinci_emac: add OF support
Hello Sekhar,
On 08.07.2012 16:26, Sekhar Nori wrote:
[...]
Quoted 40 lines · Heiko Schocher
Quoted 39 lines
add of support for the
davinci_emacdriver.Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc netdev at vger.kernel.orgCc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Anatoly Sivov<[email protected]>---
(quoted diff) +25
-0+#ifdef CONFIG_OF +static struct emac_platform_data + *davinci_emac_of_get_pdata(struct platform_device *pdev, + struct emac_priv *priv) +{ + struct device_node *np; + struct emac_platform_data *pdata = NULL; + const u8 *mac_addr; + u32 data; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + goto nodata; + } + + np = pdev->dev.of_node; + if (!np) + goto nodata; + else + pdata->version = EMAC_VERSION_2; + + mac_addr = of_get_mac_address(np);
Quoted 8 lines
drivers/net/ethernet/ti/davinci_emac.c static struct emac_platform_data · line 1801
Quoted 2 lines
drivers/net/ethernet/ti/davinci_emac.c +2
-0+if (mac_addr) +memcpy (pdata->mac_addr, mac_addr,ETH_ALEN );I suspect that even in the DT case, many boards will continue to read mac address from on-board EEPROMs or from an on-chip eFUSE. To take care of such cases, I propose use mac address in DT data only if no valid address is passed through platform data. The attached patch does this change.
Ok, understand. I am fine with this.
Quoted 4 lines
If you are OK with this modification, can you please merge it and repost just this patch for review? Please CC David Miller (davem at davemloft.net) on your next post as he is the netdev maintainer and this patch needs to be merged through him or at least needs his ack.
Merged, done.
Quoted 3 lines
With this modification, you can add my:
Acked-by Sekhar Nori<[email protected]>
Ok, thanks. Post this patch soon, if I am finished with testing this change.
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v5 5/7 ARM: davinci: i2c: add OF support
In reply to Heiko Schocheradd of support for the davinci i2c driver.
---
- changes for v2:
- add comments from Sylwester Nawrocki <[email protected]>:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define platform device name
- add comment from Grant Likely:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- no changes for v3
- changes for v4
remove "pinmux-handle" property as discussed here:
http://www.spinics.net/lists/arm-kernel/msg175701.html
with Nori Sekhar
- changes for v5
add comments from Grant Likely:
- do not change value of dev->dev->platform_data, instead hold a copy in davinci_i2c_dev.
.../devicetree/bindings/arm/davinci/i2c.txt | 31 ++++++++++++ drivers/i2c/busses/i2c-davinci.c | 49 ++++++++++++++++++-- 2 files changed, 76 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txt
Documentation/devicetree/bindings/arm/davinci/i2c.txt new file +31 -0
@@ -0,0 +1,31 @@ +* Texas Instruments Davinci I2C + +This file provides information, what the device node for the +davinci i2c interface contain. + +Required properties: +- compatible: "ti,davinci-i2c"; +- reg : Offset and length of the register set for the device + +Recommended properties : +- interrupts : <a> standard interrupt property. +- clock-frequency : desired I2C bus clock frequency in Hz. + +Optional properties: +- bus-delay: bus delay in usec + +Example (enbw_cmc board): + i2c at 1c22000 { + compatible = "ti,davinci-i2c"; + reg = <0x22000 0x1000>; + clock-frequency = <100000>; + interrupts = <15>; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + + dtt at 48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + };
drivers/i2c/busses/i2c-davinci.c +45 -4
124 lines not on this page · raw message
Signature · 1 line
1.7.7.6
PATCH v5 5/7 ARM: davinci: i2c: add OF support
Hi Heiko,
Quoted 84 lines · Heiko Schocher
add of support for the davinci i2c driver.
Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc linux-i2c at vger.kernel.orgCc Ben Dooks <[email protected]>Cc Wolfram Sang <[email protected]>Cc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Sylwester Nawrocki <[email protected]>---
- changes for v2:
- add comments from Sylwester Nawrocki <[email protected]>:
- use "cell-index" instead "id"
-OF_DEV_AUXDATAin the machine code, instead pre-define platform device name
- add comment from Grant Likely:
- removed "id" resp. "cell-index" completely
- fixed documentation
- useof_match_ptr()
- usedevm_kzalloc()for allocating plattform data mem
- fixed a whitespace issue
- no changes for v3
- changes for v4
remove "pinmux-handle" property as discussed here:
http://www.spinics.net/lists/arm-kernel/msg175701.html
with Nori Sekhar- changes for v5
add comments from Grant Likely:
- do not change value ofdev->dev->platform_data, instead hold a copy indavinci_i2c_dev..../devicetree/bindings/arm/davinci/i2c.txt | 31 ++++++++++++ drivers/i2c/busses/i2c-davinci.c | 49 ++++++++++++++++++-- 2 files changed, 76 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/i2c.txtDocumentation/devicetree/bindings/arm/davinci/i2c.txt new file +31
-0@@ -0,0 +1,31 @@ +* Texas Instruments Davinci I2C + +This file provides information, what the device node for the +davinci i2c interface contain. + +Required properties: +- compatible: "ti,davinci-i2c"; +- reg : Offset and length of the register set for the device + +Recommended properties : +- interrupts : <a> standard interrupt property. +- clock-frequency : desired I2C bus clock frequency in Hz. + +Optional properties: +- bus-delay: bus delay in usec + +Example (enbw_cmc board): + i2c at 1c22000 { + compatible = "ti,davinci-i2c"; + reg = <0x22000 0x1000>; + clock-frequency = <100000>; + interrupts = <15>; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + + dtt at 48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + };drivers/i2c/busses/i2c-davinci.c +0
-0
drivers/i2c/busses/i2c-davinci.c line 46
Quoted 9 lines
drivers/i2c/busses/i2c-davinci.c +3
-0@@ -38,9 +38,12 @@#include <linux/slab.h> #include <linux/cpufreq.h> #include <linux/gpio.h> +#include <linux/of_i2c.h> +#include <linux/of_device.h> #include <mach/hardware.h> #include <mach/i2c.h> +#include <mach/mux.h>
Seems like a stray change. I was able to build and use just fine without this include.
Quoted 13 lines
drivers/i2c/busses/i2c-davinci.c +1
-0/* ----- global defines ----------------------------------------------- */ @@ -114,6 +117,7 @@ struct davinci_i2c_dev {struct completion xfr_complete;struct notifier_block freq_transition;#endif +struct davinci_i2c_platform_data *pdata; };/* default platform data to use if not supplied in the platform_device */ @@ -149,13 +153,22 @@ static void generic_i2c_clock_pulse(unsigned int scl_pin) }
drivers/i2c/busses/i2c-davinci.c static void generic_i2c_clock_pulse(unsigned int scl_pin) · line 163
Quoted 10 lines
drivers/i2c/busses/i2c-davinci.c +8
-0} +static struct davinci_i2c_platform_data + *i2c_get_plattformdata (struct davinci_i2c_dev *dev) +{ +if (dev->dev->platform_data ==NULL ) +return dev->pdata; + +return dev->dev->platform_data; +}
It seems to me that if we setup the newly introduced dev->pdata member correctly once in probe, there should not be a need for this function. We can also eliminate multiple checks for pdata in code. See below for more.
Quoted 64 lines
drivers/i2c/busses/i2c-davinci.c +19
-4+/* This routine does i2c bus recovery as specified in the * i2c protocol Rev. 03 section 3.16 titled "Bus clear" */ static void i2c_recover_bus (struct davinci_i2c_dev *dev) {u32 flag =0 ; -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);dev_err (dev->dev,"initiating i2c bus recovery\n" );/* Send NACK to the slave */ @@ -187,7 +200,7 @@ static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,static void i2c_davinci_calc_clk_dividers (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);u16 psc;u32 clk;u32 d;@@ -235,7 +248,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)*/ static int i2c_davinci_init (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);if (!pdata) pdata = &davinci_i2c_platform_data_default;@@ -308,7 +321,7 @@ static int i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) { struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);u32 flag;u16 w;int r;@@ -635,6 +648,12 @@ static struct i2c_algorithm i2c_davinci_algo = { .functionality = i2c_davinci_func, }; +static const struct of_device_id davinci_i2c_of_match[] = { + {.compatible ="ti,davinci-i2c" , }, + {}, +}; +MODULE_DEVICE_TABLE (of, davinci_i2c_of_match); +static int davinci_i2c_probe (struct platform_device *pdev) {struct davinci_i2c_dev *dev;@@ -676,6 +695,25 @@ static int davinci_i2c_probe(struct platform_device *pdev) dev->irq = irq->start;platform_set_drvdata (pdev, dev); +if ((dev->dev->platform_data ==NULL ) && + (pdev->dev.of_node)) { +u32 prop; + + dev->pdata =devm_kzalloc (&pdev->dev, +sizeof (struct davinci_i2c_platform_data ),GFP_KERNEL ); +if (!dev->pdata) { + r = -ENOMEM ;
drivers/i2c/busses/i2c-davinci.c static int davinci_i2c_probe(struct platform_device *pdev) · line 715
Quoted 10 lines
drivers/i2c/busses/i2c-davinci.c +10
-0+ goto err_free_mem; + } +memcpy (dev->pdata, &davinci_i2c_platform_data_default, +sizeof (struct davinci_i2c_platform_data )); +if (!of_property_read_u32 (pdev->dev.of_node,"clock-frequency" , + &prop)) + dev->pdata->bus_freq = prop /1000 ; +if (!of_property_read_u32 (pdev->dev.of_node,"bus-delay" , + &prop)) + dev->pdata->bus_delay = prop;
You are leaving out two other platform data members (the gpio pins corresponding to data and clock) from DT data. We should be able to get that information from DT too, right?
So, I took this patch and tried to see if pdata maintenance can be simplified and came with the diff below. Can you have a look and see if this makes sense? I tested this using i2cdetect both with and without DT.
Thanks,
Sekhar
---8<---
drivers/i2c/busses/i2c-davinci.c +10 -22
@@ -153,22 +153,13 @@ static void generic_i2c_clock_pulse(unsigned int scl_pin) } } -static struct davinci_i2c_platform_data - *i2c_get_plattformdata (struct davinci_i2c_dev *dev) -{ -if (dev->dev->platform_data ==NULL ) -return dev->pdata; - -return dev->dev->platform_data; -} -/* This routine does i2c bus recovery as specified in the * i2c protocol Rev. 03 section 3.16 titled "Bus clear" */ static void i2c_recover_bus (struct davinci_i2c_dev *dev) {u32 flag =0 ; -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); +struct davinci_i2c_platform_data *pdata = dev->pdata;dev_err (dev->dev,"initiating i2c bus recovery\n" );/* Send NACK to the slave */
@@ -176,8 +167,7 @@ static void i2c_recover_bus(struct davinci_i2c_dev *dev) flag |=DAVINCI_I2C_MDR_NACK ;/* write the data into mode register */ davinci_i2c_write_reg (dev,DAVINCI_I2C_MDR_REG , flag); -if (pdata) -generic_i2c_clock_pulse (pdata->scl_pin); +generic_i2c_clock_pulse (pdata->scl_pin);/* Send STOP */ flag =davinci_i2c_read_reg (dev,DAVINCI_I2C_MDR_REG ); flag |=DAVINCI_I2C_MDR_STP ;
@@ -200,7 +190,7 @@ static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,static void i2c_davinci_calc_clk_dividers (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); +struct davinci_i2c_platform_data *pdata = dev->pdata;u16 psc;u32 clk;u32 d;
@@ -248,10 +238,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)*/ static int i2c_davinci_init (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); - -if (!pdata) - pdata = &davinci_i2c_platform_data_default; +struct davinci_i2c_platform_data *pdata = dev->pdata;/* put I2C into reset */ davinci_i2c_reset_ctrl (dev,0 );
@@ -321,13 +308,11 @@ static int i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) { struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); +struct davinci_i2c_platform_data *pdata = dev->pdata;u32 flag;u16 w;int r; -if (!pdata) - pdata = &davinci_i2c_platform_data_default;/* Introduce a delay, required for some boards (e.g Davinci EVM) */ if (pdata->bus_delay)udelay (pdata->bus_delay);
@@ -693,10 +678,10 @@ static int davinci_i2c_probe(struct platform_device *pdev)#endif dev->dev =get_device (&pdev->dev); dev->irq = irq->start; + dev->pdata = dev->dev->platform_data;platform_set_drvdata (pdev, dev); -if ((dev->dev->platform_data ==NULL ) && - (pdev->dev.of_node)) { +if (!dev->pdata && pdev->dev.of_node) {u32 prop; dev->pdata = devm_kzalloc(&pdev->dev,
@@ -713,7 +698,10 @@ static int davinci_i2c_probe(struct platform_device *pdev)if (!of_property_read_u32 (pdev->dev.of_node,"bus-delay" , &prop)) dev->pdata->bus_delay = prop; + }else if (!dev->pdata) { + dev->pdata = &davinci_i2c_platform_data_default; } + dev->clk =clk_get (&pdev->dev,NULL );if (IS_ERR (dev->clk)) { r = -ENODEV ;
PATCH v5 5/7 ARM: davinci: i2c: add OF support
Hello Sekhar,
Quoted 16 lines · Sekhar Nori
Hi Heiko,
Quoted 13 lines · Heiko Schocher
add of support for the davinci i2c driver.
Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc linux-i2c at vger.kernel.orgCc Ben Dooks<[email protected]>Cc Wolfram Sang<[email protected]>Cc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sylwester Nawrocki<[email protected]>
[...]
Quoted 5 lines
Quoted 5 lines
Documentation/devicetree/bindings/arm/davinci/i2c.txt new file +0
-0
[...]
Quoted 11 lines
Quoted 11 lines
drivers/i2c/busses/i2c-davinci.c +2
-0@@ -38,9 +38,12 @@#include <linux/slab.h> #include <linux/cpufreq.h> #include <linux/gpio.h> +#include <linux/of_i2c.h> +#include <linux/of_device.h>
Quoted 6 lines
drivers/i2c/busses/i2c-davinci.c line 46
Quoted 3 lines
drivers/i2c/busses/i2c-davinci.c +1
-0#include <mach/hardware.h> #include <mach/i2c.h> +#include <mach/mux.h> Seems like a stray change. I was able to build and use just fine without this include.
Hups. Good catch! Removed.
Quoted 15 lines
Quoted 15 lines
drivers/i2c/busses/i2c-davinci.c +1
-0/* ----- global defines ----------------------------------------------- */ @@ -114,6 +117,7 @@ struct davinci_i2c_dev {struct completion xfr_complete;struct notifier_block freq_transition;#endif +struct davinci_i2c_platform_data *pdata; };/* default platform data to use if not supplied in the platform_device */ @@ -149,13 +153,22 @@ static void generic_i2c_clock_pulse(unsigned int scl_pin) } }
Quoted 13 lines
drivers/i2c/busses/i2c-davinci.c static void generic_i2c_clock_pulse(unsigned int scl_pin) · line 163
Quoted 8 lines
drivers/i2c/busses/i2c-davinci.c +8
-0+static struct davinci_i2c_platform_data + *i2c_get_plattformdata (struct davinci_i2c_dev *dev) +{ +if (dev->dev->platform_data ==NULL ) +return dev->pdata; + +return dev->dev->platform_data; +}It seems to me that if we setup the newly introduced
dev->pdatamember correctly once in probe, there should not be a need for this function. We can also eliminate multiple checks for pdata in code. See below for more.
Ok.
Quoted 70 lines
Quoted 70 lines
drivers/i2c/busses/i2c-davinci.c +25
-4+/* This routine does i2c bus recovery as specified in the * i2c protocol Rev. 03 section 3.16 titled "Bus clear" */ static void i2c_recover_bus (struct davinci_i2c_dev *dev) {u32 flag =0 ; -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);dev_err (dev->dev,"initiating i2c bus recovery\n" );/* Send NACK to the slave */ @@ -187,7 +200,7 @@ static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,static void i2c_davinci_calc_clk_dividers (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);u16 psc;u32 clk;u32 d;@@ -235,7 +248,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)*/ static int i2c_davinci_init (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);if (!pdata) pdata =&davinci_i2c_platform_data_default;@@ -308,7 +321,7 @@ static int i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) { struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); -struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; +struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev);u32 flag;u16 w;int r;@@ -635,6 +648,12 @@ static struct i2c_algorithm i2c_davinci_algo = { .functionality = i2c_davinci_func, }; +static const struct of_device_id davinci_i2c_of_match[] = { + {.compatible ="ti,davinci-i2c" , }, + {}, +}; +MODULE_DEVICE_TABLE (of, davinci_i2c_of_match); +static int davinci_i2c_probe (struct platform_device *pdev) {struct davinci_i2c_dev *dev;@@ -676,6 +695,25 @@ static int davinci_i2c_probe(struct platform_device *pdev) dev->irq = irq->start;platform_set_drvdata (pdev, dev); +if ((dev->dev->platform_data ==NULL )&& + (pdev->dev.of_node)) { +u32 prop; + + dev->pdata =devm_kzalloc (&pdev->dev, +sizeof (struct davinci_i2c_platform_data ),GFP_KERNEL ); +if (!dev->pdata) { + r = -ENOMEM ; + goto err_free_mem; + } +memcpy (dev->pdata,&davinci_i2c_platform_data_default, +sizeof (struct davinci_i2c_platform_data )); +if (!of_property_read_u32 (pdev->dev.of_node,"clock-frequency" , + &prop))
Quoted 8 lines
drivers/i2c/busses/i2c-davinci.c static int davinci_i2c_probe(struct platform_device *pdev) · line 715
Quoted 4 lines
drivers/i2c/busses/i2c-davinci.c +4
-0+ dev->pdata->bus_freq = prop /1000 ; +if (!of_property_read_u32 (pdev->dev.of_node,"bus-delay" , + &prop)) + dev->pdata->bus_delay = prop;You are leaving out two other platform data members (the gpio pins corresponding to data and clock) from DT data. We should be able to get that information from DT too, right?
Yes, but I had not ported the GPIO driver to OF ...
Quoted 4 lines
So, I took this patch and tried to see if pdata maintenance can be simplified and came with the diff below. Can you have a look and see if this makes sense? I tested this using i2cdetect both with and without DT.
Tested your patch on the enbw_cmc board with a LM75 on the enbw_cmc board, works fine. Can I post a "v6" of my patch, merged with your patch below and your Signed-off?
Quoted 91 lines
---8<---
drivers/i2c/busses/i2c-davinci.c +7
-22@@ -153,22 +153,13 @@ static void generic_i2c_clock_pulse(unsigned int scl_pin) } } -static struct davinci_i2c_platform_data - *i2c_get_plattformdata (struct davinci_i2c_dev *dev) -{ -if (dev->dev->platform_data ==NULL ) -return dev->pdata; - -return dev->dev->platform_data; -} -/* This routine does i2c bus recovery as specified in the * i2c protocol Rev. 03 section 3.16 titled "Bus clear" */ static void i2c_recover_bus (struct davinci_i2c_dev *dev) {u32 flag =0 ; -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); +struct davinci_i2c_platform_data *pdata = dev->pdata;dev_err (dev->dev,"initiating i2c bus recovery\n" );/* Send NACK to the slave */ @@ -176,8 +167,7 @@ static void i2c_recover_bus(struct davinci_i2c_dev *dev) flag |=DAVINCI_I2C_MDR_NACK ;/* write the data into mode register */ davinci_i2c_write_reg (dev,DAVINCI_I2C_MDR_REG , flag); -if (pdata) -generic_i2c_clock_pulse (pdata->scl_pin); +generic_i2c_clock_pulse (pdata->scl_pin);/* Send STOP */ flag =davinci_i2c_read_reg (dev,DAVINCI_I2C_MDR_REG ); flag |=DAVINCI_I2C_MDR_STP ;@@ -200,7 +190,7 @@ static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev,static void i2c_davinci_calc_clk_dividers (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); +struct davinci_i2c_platform_data *pdata = dev->pdata;u16 psc;u32 clk;u32 d;@@ -248,10 +238,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev)*/ static int i2c_davinci_init (struct davinci_i2c_dev *dev) { -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); - -if (!pdata) - pdata =&davinci_i2c_platform_data_default; +struct davinci_i2c_platform_data *pdata = dev->pdata;/* put I2C into reset */ davinci_i2c_reset_ctrl (dev,0 );@@ -321,13 +308,11 @@ static int i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) { struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); -struct davinci_i2c_platform_data *pdata =i2c_get_plattformdata (dev); +struct davinci_i2c_platform_data *pdata = dev->pdata;u32 flag;u16 w;int r; -if (!pdata) - pdata =&davinci_i2c_platform_data_default;/* Introduce a delay, required for some boards (e.g Davinci EVM) */ if (pdata->bus_delay)udelay (pdata->bus_delay);@@ -693,10 +678,10 @@ static int davinci_i2c_probe(struct platform_device *pdev)#endif dev->dev =get_device (&pdev->dev); dev->irq = irq->start; + dev->pdata = dev->dev->platform_data;platform_set_drvdata (pdev, dev); -if ((dev->dev->platform_data ==NULL )&& - (pdev->dev.of_node)) { +if (!dev->pdata&& pdev->dev.of_node) {u32 prop; dev->pdata = devm_kzalloc(&pdev->dev,
drivers/i2c/busses/i2c-davinci.c static int davinci_i2c_probe(struct platform_device *pdev) · line 707
Quoted 10 lines
drivers/i2c/busses/i2c-davinci.c +3
-0@@ -713,7 +698,10 @@ static int davinci_i2c_probe(struct platform_device *pdev)if (!of_property_read_u32 (pdev->dev.of_node,"bus-delay" , &prop)) dev->pdata->bus_delay = prop; + }else if (!dev->pdata) { + dev->pdata =&davinci_i2c_platform_data_default; } + dev->clk =clk_get (&pdev->dev,NULL );if (IS_ERR (dev->clk)) { r = -ENODEV ;
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH v5 5/7 ARM: davinci: i2c: add OF support
Quoted 20 lines · Heiko Schocher
Hello Sekhar,
Quoted 16 lines · Sekhar Nori
Hi Heiko,
Quoted 13 lines · Heiko Schocher
add of support for the davinci i2c driver.
Signed-off-by Heiko Schocher<[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc linux-i2c at vger.kernel.orgCc Ben Dooks<[email protected]>Cc Wolfram Sang<[email protected]>Cc Grant Likely<[email protected]>Cc Sekhar Nori<[email protected]>Cc Wolfgang Denk<[email protected]>Cc Sylwester Nawrocki<[email protected]>[...]
[...]
Quoted 5 lines
Quoted 5 lines
Quoted 5 lines
drivers/i2c/busses/i2c-davinci.c +0
-0
[...]
Quoted 31 lines
Quoted 22 lines
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static int davinci_i2c_probe(struct platform_device *pdev) { struct davinci_i2c_dev *dev;drivers/i2c/busses/i2c-davinci.c +14
-0@@ -676,6 +695,25 @@ static int davinci_i2c_probe(struct platform_device *pdev) dev->irq = irq->start;platform_set_drvdata (pdev, dev); +if ((dev->dev->platform_data ==NULL )&& + (pdev->dev.of_node)) { +u32 prop; + + dev->pdata =devm_kzalloc (&pdev->dev, +sizeof (struct davinci_i2c_platform_data ),GFP_KERNEL ); +if (!dev->pdata) { + r = -ENOMEM ; + goto err_free_mem; + } +memcpy (dev->pdata,&davinci_i2c_platform_data_default, +sizeof (struct davinci_i2c_platform_data )); +if (!of_property_read_u32 (pdev->dev.of_node,"clock-frequency" , + &prop))Quoted 8 lines
drivers/i2c/busses/i2c-davinci.c static int davinci_i2c_probe(struct · line 716
Quoted 4 lines
drivers/i2c/busses/i2c-davinci.c +4
-0+ dev->pdata->bus_freq = prop /1000 ; +if (!of_property_read_u32 (pdev->dev.of_node,"bus-delay" , + &prop)) + dev->pdata->bus_delay = prop;You are leaving out two other platform data members (the gpio pins corresponding to data and clock) from DT data. We should be able to get that information from DT too, right?
Quoted 1 line
Yes, but I had not ported the GPIO driver to OF ...
Okay. Understood. They can added once GPIO has been ported too and this part is tested.
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So, I took this patch and tried to see if pdata maintenance can be simplified and came with the diff below. Can you have a look and see if this makes sense? I tested this using i2cdetect both with and without DT.
Tested your patch on the
enbw_cmcboard with a LM75 on theenbw_cmcboard, works fine. Can I post a "v6" of my patch, merged with your patch below and your Signed-off?
Yes, please do. You can post it as in independent patch (not as part of a series) since the patch does not have any dependencies.
Thanks,
Sekhar
PATCH v5 6/7 ARM: mtd: nand: davinci: add OF support for davinci nand controller
In reply to Heiko Schocheradd OF support for the davinci nand controller.
---
- changes for v2:
- add comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting up ecc_mode, ecc_bits, options and bbt options, instead using linux defines
- readme fixes
- no changes for v3
- changes for v4
remove "pinmux-handle" property as discussed here:
http://www.spinics.net/lists/arm-kernel/msg175701.html
with Nori Sekhar
- no changes for v5
.../devicetree/bindings/arm/davinci/nand.txt | 72 ++++++++++++++++++ drivers/mtd/nand/davinci_nand.c | 80 +++++++++++++++++++- 2 files changed, 151 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txt
Documentation/devicetree/bindings/arm/davinci/nand.txt new file +72 -0
@@ -0,0 +1,72 @@ +* Texas Instruments Davinci NAND + +This file provides information, what the device node for the +davinci nand interface contain. + +Required properties: +- compatible: "ti,davinci-nand"; +- reg : contain 2 offset/length values: + - offset and length for the access window + - offset and length for accessing the aemif control registers +- ti,davinci-chipselect: Indicates on the davinci_nand driver which + chipselect is used for accessing the nand. + +Recommended properties : +- ti,davinci-mask-ale: mask for ale +- ti,davinci-mask-cle: mask for cle +- ti,davinci-mask-chipsel: mask for chipselect +- ti,davinci-ecc-mode: ECC mode valid values for davinci driver: + - "none" + - "soft" + - "hw" +- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4. +- ti,davinci-nand-buswidth: buswidth 8 or 16 +- ti,davinci-nand-use-bbt: use flash based bad block table support. + +Optional properties: +- timing-handle: contains a handle to setup aemif timing. + +Example (enbw_cmc board): +aemif at 60000000 { + compatible = "ti,davinci-aemif"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0x68000000 0x80000>; + ranges = <2 0 0x60000000 0x02000000 + 3 0 0x62000000 0x02000000 + 4 0 0x64000000 0x02000000 + 5 0 0x66000000 0x02000000 + 6 0 0x68000000 0x02000000>; + nand_cs: cs3 at 68000000 { + compatible = "ti,davinci-cs"; + #address-cells = <1>; + #size-cells = <1>; + /* all timings in nanoseconds */ + cs = <3>; + asize = <0>; + ta = <0>; + rhold = <7>; + rstrobe = <42>; + rsetup = <7>; + whold = <7>; + wstrobe = <14>; + wsetup = <7>; + ew = <0>; + ss = <0>; + }; + nand at 3,0 { + compatible = "ti,davinci-nand"; + reg = <3 0x0 0x807ff + 6 0x0 0x8000>; + #address-cells = <1>; + #size-cells = <1>; + ti,davinci-chipselect = <1>; + ti,davinci-mask-ale = <0>; + ti,davinci-mask-cle = <0>; + ti,davinci-mask-chipsel = <0>; + ti,davinci-ecc-mode = "hw"; + ti,davinci-ecc-bits = <4>; + ti,davinci-nand-use-bbt; + timing-handle = <&nand_cs>; + }; +};
drivers/mtd/nand/davinci_nand.c +79 -1
109 lines not on this page · raw message
Signature · 1 line
1.7.7.6
PATCH v5 6/7 ARM: mtd: nand: davinci: add OF support for davinci nand controller
Hi Heiko,
Quoted 118 lines · Heiko Schocher
add OF support for the davinci nand controller.
Signed-off-by Heiko Schocher <[email protected]>Cc davinci-linux-open-source at linux.davincidsp.comCc linux-arm-kernel at lists.infradead.orgCc devicetree-discuss at lists.ozlabs.orgCc linux-mtd at lists.infradead.orgCc David Woodhouse <[email protected]>Cc Grant Likely <[email protected]>Cc Sekhar Nori <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Scott Wood <[email protected]>---
- changes for v2:
- add comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting upecc_mode,ecc_bits, options and bbt options, instead using linux defines
- readme fixes
- no changes for v3
- changes for v4
remove "pinmux-handle" property as discussed here:
http://www.spinics.net/lists/arm-kernel/msg175701.html
with Nori Sekhar
- no changes for v5.../devicetree/bindings/arm/davinci/nand.txt | 72 ++++++++++++++++++ drivers/mtd/nand/davinci_nand.c | 80 +++++++++++++++++++- 2 files changed, 151 insertions(+), 1 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/davinci/nand.txtDocumentation/devicetree/bindings/arm/davinci/nand.txt new file +72
-0@@ -0,0 +1,72 @@ +* Texas Instruments Davinci NAND + +This file provides information, what the device node for the +davinci nand interface contain. + +Required properties: +- compatible: "ti,davinci-nand"; +- reg : contain 2 offset/length values: + - offset and length for the access window + - offset and length for accessing the aemif control registers +- ti,davinci-chipselect: Indicates on the davinci_nand driver which + chipselect is used for accessing the nand. + +Recommended properties : +- ti,davinci-mask-ale: mask for ale +- ti,davinci-mask-cle: mask for cle +- ti,davinci-mask-chipsel: mask for chipselect +- ti,davinci-ecc-mode: ECC mode valid values for davinci driver: + - "none" + - "soft" + - "hw" +- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4. +- ti,davinci-nand-buswidth: buswidth 8 or 16 +- ti,davinci-nand-use-bbt: use flash based bad block table support. + +Optional properties: +- timing-handle: contains a handle to setup aemif timing. + +Example (enbw_cmc board): +aemif at 60000000 { + compatible = "ti,davinci-aemif"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0x68000000 0x80000>; + ranges = <2 0 0x60000000 0x02000000 + 3 0 0x62000000 0x02000000 + 4 0 0x64000000 0x02000000 + 5 0 0x66000000 0x02000000 + 6 0 0x68000000 0x02000000>; + nand_cs: cs3 at 68000000 { + compatible = "ti,davinci-cs"; + #address-cells = <1>; + #size-cells = <1>; + /* all timings in nanoseconds */ + cs = <3>; + asize = <0>; + ta = <0>; + rhold = <7>; + rstrobe = <42>; + rsetup = <7>; + whold = <7>; + wstrobe = <14>; + wsetup = <7>; + ew = <0>; + ss = <0>; + }; + nand at 3,0 { + compatible = "ti,davinci-nand"; + reg = <3 0x0 0x807ff + 6 0x0 0x8000>; + #address-cells = <1>; + #size-cells = <1>; + ti,davinci-chipselect = <1>; + ti,davinci-mask-ale = <0>; + ti,davinci-mask-cle = <0>; + ti,davinci-mask-chipsel = <0>; + ti,davinci-ecc-mode = "hw"; + ti,davinci-ecc-bits = <4>; + ti,davinci-nand-use-bbt; + timing-handle = <&nand_cs>; + }; +};drivers/mtd/nand/davinci_nand.c +0
-0
drivers/mtd/nand/davinci_nand.c line 36
Quoted 4 lines
drivers/mtd/nand/davinci_nand.c +1
-0@@ -33,9 +33,12 @@#include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/slab.h> +#include <linux/of_i2c.h>
This include is not required.
drivers/mtd/nand/davinci_nand.c line 41
Quoted 5 lines
drivers/mtd/nand/davinci_nand.c +2
-0+#include <linux/of_device.h> #include <mach/nand.h> #include <mach/aemif.h> +#include <mach/mux.h>
This too.
Quoted 9 lines
drivers/mtd/nand/davinci_nand.c +2
-0/* * This is a device driver for the NAND flash controller found on the @@ -518,9 +521,81 @@ static struct nand_ecclayout hwecc4_2048 __initconst = { }, }; +#if defined(CONFIG_OF ) +static const struct of_device_id davinci_nand_of_match[] = {
drivers/mtd/nand/davinci_nand.c static struct nand_ecclayout hwecc4_2048 __initconst = { · line 535
Quoted 10 lines
drivers/mtd/nand/davinci_nand.c +10
-0+ {.compatible = "ti,davinci-nand", }, + {}, +} +MODULE_DEVICE_TABLE (of, davinci_nand_of_match); + +static struct davinci_nand_pdata + *nand_davinci_get_pdata (struct platform_device *pdev) +{ +if ((pdev->dev.platform_data ==NULL ) && + (pdev->dev.of_node)) {
You can simplify this and also avoid breaking the statement.
if (!pdev->dev.platform_data && pdev->dev.of_node) {drivers/mtd/nand/davinci_nand.c static struct nand_ecclayout hwecc4_2048 __initconst = { · line 543
Quoted 8 lines
drivers/mtd/nand/davinci_nand.c +8
-0+struct device_node *tmp_np; +struct davinci_nand_pdata *pdata; +const char *mode; +u32 prop; +int len; + + pdata =kzalloc (sizeof (struct davinci_nand_pdata ), +GFP_KERNEL );
I don't see this getting freed anywhere. You wanted to use devm_kzalloc()?
Quoted 30 lines
drivers/mtd/nand/davinci_nand.c +30
-0+ pdev->dev.platform_data = pdata; +if (!pdata) +return NULL ; +if (!of_property_read_u32 (pdev->dev.of_node, +"ti,davinci-chipselect" , &prop)) + pdev->id = prop; +if (!of_property_read_u32 (pdev->dev.of_node, +"ti,davinci-mask-ale" , &prop)) + pdata->mask_ale = prop; +if (!of_property_read_u32 (pdev->dev.of_node, +"ti,davinci-mask-cle" , &prop)) + pdata->mask_cle = prop; +if (!of_property_read_u32 (pdev->dev.of_node, +"ti,davinci-mask-chipsel" , &prop)) + pdata->mask_chipsel = prop; +if (!of_property_read_string (pdev->dev.of_node, +"ti,davinci-ecc-mode" , &mode)) { +if (!strncmp ("none" , mode,4 )) + pdata->ecc_mode =NAND_ECC_NONE ; +if (!strncmp ("soft" , mode,4 )) + pdata->ecc_mode =NAND_ECC_SOFT ; +if (!strncmp ("hw" , mode,2 )) + pdata->ecc_mode =NAND_ECC_HW ; + } +if (!of_property_read_u32 (pdev->dev.of_node, +"ti,davinci-ecc-bits" , &prop)) + pdata->ecc_bits = prop; +if (!of_property_read_u32 (pdev->dev.of_node, +"ti,davinci-nand-buswidth" , &prop)) +if (prop ==16 )
drivers/mtd/nand/davinci_nand.c static struct nand_ecclayout hwecc4_2048 __initconst = { · line 582
Quoted 10 lines
drivers/mtd/nand/davinci_nand.c +9
-0+ pdata->options |=NAND_BUSWIDTH_16 ; +if (of_find_property (pdev->dev.of_node, +"ti,davinci-nand-use-bbt" , &len)) + pdata->bbt_options =NAND_BBT_USE_FLASH ; + + tmp_np =of_parse_phandle (pdev->dev.of_node, +"timing-handle" ,0 ); +if (tmp_np) +davinci_aemif_setup_timing_of (tmp_np);
Since the aemif driver conversion to DT needs to be looked at along with its movement to drivers/ folder, is it possible to drop the AEMIF timing specific bindings from the patch and only keep the NAND specific ones?
Thanks,
Sekhar
A message that is not in the archive (sent off-list or not yet received): [email protected]
PATCH v5 7/7 ARM: davinci: add support for the am1808 based enbw_cmc board
- AM1808 based board
- 64 MiB DDR ram
- 2 MiB Nor flash
- 128 MiB NAND flash
- use internal RTC
- I2C support
- hwmon lm75 support
- UBI/UBIFS support
- MMC support
- USB OTG support
---
- post this board support with USB support, even though USB is only working with the 10 ms "workaround", posted here:
http://comments.gmane.org/gmane.linux.usb.general/54505
I see this issue also on the AM1808 TMDXEXP1808L evalboard.
- MMC and USB are not using OF support yet, ideas how to port this are welcome. I need for USB and MMC boards board specific callbacks, how to solve this with OF support?
- changes for v2:
- changes in the nand node due to comments from Scott Wood:
- add "ti,davinci-" prefix
- Dashes are preferred to underscores
- rename "nandflash" to "nand"
- introduce new "ti,davinci" specific properties for setting up ecc_mode, ecc_bits, options and bbt options, instead using linux defines
- changes for i2c due to comments from Sylwester Nawrocki:
- use "cell-index" instead "id"
- OF_DEV_AUXDATA in the machine code, instead pre-define platform device name
- add comment from Grant Likely for i2c:
- removed "id" resp. "cell-index" completely
- fixed documentation
- use of_match_ptr()
- use devm_kzalloc() for allocating plattform data mem
- fixed a whitespace issue
- add net comments from Grant Likely:
- add prefix "ti,davinci-" to davinci specific property names
- remove version property
- use compatible name "ti,davinci-dm6460-emac"
- add comment from Grant Likely:
- rename compatible node
- do not use cell-index
- CONFIG_OF required for this board
TODO:
- create a generic board support file, as I got no answer to my ping to grant, maybe this could be done in a second step?
- changes for v3:
- add comments from Sergei Shtylyov:
- rename compatible" prop to "ti,cp_intc"
- cp_intc_init now used for Interrupt controller init
- changes for v4:
add comment from Nori Sekhar:
- rename davinci emac compatible property to "ti,davinci-dm6467-emac"
- remove "pinmux-handle" property as discussed here:
http://www.spinics.net/lists/arm-kernel/msg175701.html
with Nori Sekhar
- changes for v5:
add comments from Grant Likely:
- rename compatible" prop to "ti,cp-intc"
arch/arm/boot/dts/enbw_cmc.dts | 172 +++++++++++ arch/arm/configs/enbw_cmc_defconfig | 123 ++++++++ arch/arm/mach-davinci/Kconfig | 9 + arch/arm/mach-davinci/Makefile | 1 + arch/arm/mach-davinci/board-enbw-cmc.c | 374 +++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/uncompress.h | 1 + 6 files changed, 680 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/enbw_cmc.dts create mode 100644 arch/arm/configs/enbw_cmc_defconfig create mode 100644 arch/arm/mach-davinci/board-enbw-cmc.c
arch/arm/boot/dts/enbw_cmc.dts new file +172 -0
@@ -0,0 +1,172 @@ +/* + * Device Tree for the EnBW CMC plattform + * + * Copyright 2011 DENX Software Engineering GmbH + * Heiko Schocher <[email protected]> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +/dts-v1/; +/include/ "skeleton.dtsi" + +/ { + model = "EnBW CMC"; + compatible = "enbw,cmc"; + + aliases { + ethernet0 = ð0; + }; + + arm { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffee000 0x00020000>; + intc: interrupt-controller at 1 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0x0 0x2000>; + }; + }; + soc at 1c00000 { + compatible = "ti,da850"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x01c00000 0x400000>; + + serial0: serial at 1c42000 { + compatible = "ti,da850", "ns16550a"; + reg = <0x42000 0x100>; + clock-frequency = <150000000>; + reg-shift = <2>; + interrupts = <25>; + interrupt-parent = <&intc>; + }; + serial1: serial at 1d0c000 { + compatible = "ti,da850", "ns16550a"; + reg = <0x10c000 0x100>; + clock-frequency = <150000000>; + reg-shift = <2>; + interrupts = <53>; + interrupt-parent = <&intc>; + }; + serial2: serial at 1d0d000 { + compatible = "ti,da850", "ns16550a"; + reg = <0x10d000 0x100>; + clock-frequency = <150000000>; + reg-shift = <2>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + + eth0: emac at 1e20000 { + compatible = "ti,davinci-dm6467-emac"; + reg = <0x220000 0x4000>; + ti,davinci-ctrl-reg-offset = <0x3000>; + ti,davinci-ctrl-mod-reg-offset = <0x2000>; + ti,davinci-ctrl-ram-offset = <0>; + ti,davinci-ctrl-ram-size = <0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <33 + 34 + 35 + 36 + >; + interrupt-parent = <&intc>; + }; + + i2c at 1c22000 { + compatible = "ti,davinci-i2c"; + reg = <0x22000 0x1000>; + clock-frequency = <100000>; + interrupts = <15>; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + + dtt at 48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + }; + }; + onchipram at 8000000 { + compatible = "ti,davinci-onchipram"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x80000000 0x20000>; + }; + aemif at 60000000 { + compatible = "ti,davinci-aemif"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0x68000000 0x80000>; + ranges = <2 0 0x60000000 0x02000000 + 3 0 0x62000000 0x02000000 + 4 0 0x64000000 0x02000000 + 5 0 0x66000000 0x02000000 + 6 0 0x68000000 0x02000000>; + cs2 at 68000000 { + compatible = "ti,davinci-cs"; + #address-cells = <1>; + #size-cells = <1>; + /* all timings in nanoseconds */ + cs = <2>; + asize = <1>; + ta = <0>; + rhold = <7>; + rstrobe = <42>; + rsetup = <14>; + whold = <7>; + wstrobe = <42>; + wsetup = <14>; + ew = <0>; + ss = <0>; + }; + flash at 2,0 { + compatible = "cfi-flash"; + reg = <2 0x0 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + device-width = <2>; + }; + nand_cs: cs3 at 68000000 { + compatible = "ti,davinci-cs"; + #address-cells = <1>; + #size-cells = <1>; + /* all timings in nanoseconds */ + cs = <3>; + asize = <0>; + ta = <0>; + rhold = <7>; + rstrobe = <42>; + rsetup = <7>; + whold = <7>; + wstrobe = <14>; + wsetup = <7>; + ew = <0>; + ss = <0>; + }; + nand at 3,0 { + compatible = "ti,davinci-nand"; + reg = <3 0x0 0x807ff + 6 0x0 0x8000>; + #address-cells = <1>; + #size-cells = <1>; + ti,davinci-chipselect = <1>; + ti,davinci-mask-ale = <0>; + ti,davinci-mask-cle = <0>; + ti,davinci-mask-chipsel = <0>; + ti,davinci-ecc-mode = "hw"; + ti,davinci-ecc-bits = <4>; + ti,davinci-nand-use-bbt; + timing-handle = <&nand_cs>; + }; + + }; +};
arch/arm/configs/enbw_cmc_defconfig new file +123 -0
123 lines not on this page · raw message
arch/arm/mach-davinci/Kconfig +9 -0
@@ -202,6 +202,15 @@ config DA850_WL12XX Say Y if you want to use a wl1271 expansion card connected to the AM18x EVM. +config MACH_ENBW_CMC + bool "EnBW Communication Module Compact" + default ARCH_DAVINCI_DA850 + depends on ARCH_DAVINCI_DA850 + select OF + help + Say Y here to select the EnBW Communication Module Compact + board. + config GPIO_PCA953X default MACH_DAVINCI_DA850_EVM
arch/arm/mach-davinci/Makefile +1 -0
@@ -34,6 +34,7 @@ obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o +obj-$(CONFIG_MACH_ENBW_CMC) += board-enbw-cmc.o # Power Management obj-$(CONFIG_CPU_FREQ) += cpufreq.o
arch/arm/mach-davinci/board-enbw-cmc.c new file +374 -0
374 lines not on this page · raw message
arch/arm/mach-davinci/include/mach/uncompress.h +1 -0
@@ -98,6 +98,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)DEBUG_LL_DA8XX (davinci_da850_evm,2 );DEBUG_LL_DA8XX (mityomapl138,1 );DEBUG_LL_DA8XX (omapl138_hawkboard,2 ); +DEBUG_LL_DA8XX (enbw_cmc,2 );/* TNETV107x boards */ DEBUG_LL_TNETV107X (tnetv107x,1 );
Signature · 1 line
1.7.7.6