EXYNOS5: support display port phy control function
Subsystems (2)
PATCH 3/8 EXYNOS5: support display port phy control function
This patch support display port phy control function.
Signed-off-by Donghwa Lee <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
--- arch/arm/cpu/armv7/exynos/power.c | 21 +++++++++++++++++++++ arch/arm/include/asm/arch-exynos/power.h | 5 +++++ 2 files changed, 26 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/power.c +21 -0
@@ -74,3 +74,24 @@ void set_usbhost_phy_ctrl(unsigned int enable)if (cpu_is_exynos5 ())exynos5_set_usbhost_phy_ctrl (enable); } + +static void exynos5_dp_phy_control (unsigned int enable) +{ +unsigned int cfg; +struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power (); + + cfg =readl (&power->dptx_phy_control); +if (enable) + cfg |=EXYNOS_DP_PHY_ENABLE ; +else + cfg &= ~EXYNOS_DP_PHY_ENABLE ; + +writel (cfg, &power->dptx_phy_control); +} + +void set_dp_phy_ctrl (unsigned int enable) +{ +if (cpu_is_exynos5 ()) +exynos5_dp_phy_control (enable); +}
arch/arm/include/asm/arch-exynos/power.h +5 -0
@@ -859,4 +859,9 @@ void set_usbhost_phy_ctrl(unsigned int enable);#define POWER_USB_HOST_PHY_CTRL_EN (1 << 0)#define POWER_USB_HOST_PHY_CTRL_DISABLE (0 << 0) + +void set_dp_phy_ctrl (unsigned int enable); + +#define EXYNOS_DP_PHY_ENABLE (1 << 0) +#endif
Signature · 1 line
1.7.4.1