cm-t35: fix incorrect NAND_ECC layout selection
PATCH 1/1 cm-t35: fix incorrect NAND_ECC layout selection
The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout.
--- include/configs/cm_t35.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
include/configs/cm_t35.h +1 -1
@@ -174,7 +174,7 @@#define CONFIG_SYS_NAND_BASE NAND_BASE/* physical address */ /* to access nand at */ /* CS0 */ -#define GPMC_NAND_ECC_LP_x16_LAYOUT +#define GPMC_NAND_ECC_LP_x8_LAYOUT#define CONFIG_SYS_MAX_NAND_DEVICE 1/* Max number of NAND */ /* devices */
Signature · 1 line
1.7.1
PATCH 1/1 cm-t35: fix incorrect NAND_ECC layout selection
Quoted 5 lines · Nikita Kiryanov
The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout.
Signed-off-by Nikita Kiryanov <[email protected]>
This change is correct on all boards and not due to a change in NAND parts used in newer revisions or anything, correct?
Signature · 8 lines
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PATCH 1/1 cm-t35: fix incorrect NAND_ECC layout selection
Quoted 11 lines · Tom Rini
Quoted 5 lines · Nikita Kiryanov
The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout.
Signed-off-by Nikita Kiryanov <[email protected]>This change is correct on all boards and not due to a change in NAND parts used in newer revisions or anything, correct?
Yes. All our boards have 8 bit NAND chips.