mvsas: change SL mode0 register value

PATCH New [email protected] 1 participant 1 message Sep 28, 2011 SCSI

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2011-09-28 16:35 UTC #0 lore raw

PATCH 5/8 mvsas: change SL mode0 register value

From: Xiangliang Yu <[email protected]>

-- change connection behavior
-- set bit8 to 1 for performance tuning
-- set bit0 to 0 to enable retry for no_dest reject case.

Signed-off-by Xiangliang Yu <[email protected]>

---
 drivers/scsi/mvsas/mv_94xx.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

drivers/scsi/mvsas/mv_94xx.c +8 -0

index ca2b9d9..4d1a8c7 100644
@@ -511,6 +511,14 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
 	tmp |= CINT_PHY_MASK;
 	mw32(MVS_INT_MASK, tmp);
 
+	/* change the connection open-close behavior (bit 9) 
+	 * set bit8 to 1 for performance tuning */
+	tmp = mvs_cr32(mvi, CMD_SL_MODE0);
+	tmp |= 0x00000300;
+	/* set bit0 to 0 to enable retry for no_dest reject case */
+	tmp &= 0xFFFFFFFE;
+	mvs_cw32(mvi, CMD_SL_MODE0, tmp);
+
 	/* Enable SRS interrupt */
 	mw32(MVS_INT_MASK_SRS_0, 0xFFFF);

Signature · 1 line

1.7.4.4