OMAP3: igep00x0: Add config option to choose flash storage memory
PATCH 1/2 OMAP3: igep00x0: Add config option to choose flash storage memory
IGEP-based boards can have two different flash memories, a OneNAND or a NAND device. Add a configuration option for to choose which memory to use.
--- board/isee/igep0020/igep0020.h | 4 ++++ board/isee/igep0030/igep0030.h | 4 ++++ boards.cfg | 6 ++++-- include/configs/igep00x0.h | 19 +++++++++++++++++++ 4 files changed, 31 insertions(+), 2 deletions(-)
board/isee/igep0020/igep0020.h +4 -0
@@ -26,7 +26,11 @@const omap3_sysinfo sysinfo = {DDR_STACKED ,"IGEP v2 board" , +#if defined(CONFIG_ENV_IS_IN_ONENAND)"ONENAND" , +#else +"NAND" , +#endif };static void setup_net_chip (void );
board/isee/igep0030/igep0030.h +4 -0
@@ -26,7 +26,11 @@const omap3_sysinfo sysinfo = {DDR_STACKED ,"OMAP3 IGEP module" , +#if defined(CONFIG_ENV_IS_IN_ONENAND)"ONENAND" , +#else +"NAND" , +#endif };/*
boards.cfg +4 -2
@@ -224,8 +224,10 @@ cm_t35 arm armv7 cm_t35 - omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3 dig297 arm armv7 dig297 comelit omap3 -igep0020 arm armv7 igep0020 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020 -igep0030 arm armv7 igep0030 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030 +igep0020 arm armv7 igep0020 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_ONENAND +igep0020_nand arm armv7 igep0020 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND +igep0030 arm armv7 igep0030 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND +igep0030_nand arm armv7 igep0030 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND am3517_evm arm armv7 am3517evm logicpd omap3 mt_ventoux arm armv7 mt_ventoux teejet omap3 omap3_zoom1 arm armv7 zoom1 logicpd omap3
include/configs/igep00x0.h +19 -0
@@ -105,7 +105,12 @@#define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_I2C /* I2C serial bus support */ #define CONFIG_CMD_MMC /* MMC support */ +#ifdef CONFIG_BOOT_ONENAND #define CONFIG_CMD_ONENAND /* ONENAND support */ +#endif +#ifdef CONFIG_BOOT_NAND +#define CONFIG_CMD_NAND +#endif #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING
@@ -244,6 +249,7 @@* FLASH and environment organization */ +#ifdef CONFIG_BOOT_ONENAND #define PISMO1_ONEN_SIZE GPMC_SIZE_128M/* Configure the PISMO */ #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
@@ -253,6 +259,19 @@#define CONFIG_ENV_IS_IN_ONENAND 1#define CONFIG_ENV_SIZE (512 << 10)/* Total Size Environment */ #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET +#endif + +#ifdef CONFIG_BOOT_NAND +#define PISMO1_NAND_SIZE GPMC_SIZE_128M/* Configure the PISMO */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_BASE NAND_BASE +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define CONFIG_ENV_OFFSET 0x260000/* environment starts here */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SIZE (512 << 10)/* Total Size Environment */ +#define CONFIG_ENV_ADDR NAND_ENV_OFFSET +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#endif /* * Size of malloc() pool
Signature · 1 line
1.7.7.6
PATCH 2/2 OMAP3: igep00x0: add SPL support for IGEP-based boards
This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
--- board/isee/igep0020/config.mk | 33 -------------------- board/isee/igep0020/igep0020.c | 34 ++++++++++++++++++++- board/isee/igep0030/config.mk | 33 -------------------- board/isee/igep0030/igep0030.c | 34 ++++++++++++++++++++- include/configs/igep00x0.h | 65 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 131 insertions(+), 68 deletions(-) delete mode 100644 board/isee/igep0020/config.mk delete mode 100644 board/isee/igep0030/config.mk
board/isee/igep0020/config.mk deleted +0 -33
@@ -1,33 +0,0 @@ -# -# (C) Copyright 2009 -# ISEE 2007 SL, <www.iseebcn.com> -# -# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000
board/isee/igep0020/igep0020.c +33 -1
@@ -58,6 +58,38 @@ int board_init(void)return 0 ; } +#ifdef CONFIG_SPL_BUILD +/* +* Routine: omap_rev_string +* Description: For SPL builds output board rev +*/ +void omap_rev_string (void ) +{ +} + +/* +* Routine: get_board_mem_timings +* Description: If we use SPL then there is no x-loader nor config header +* so we have to setup the DDR timings ourself on both banks. +*/ +void get_board_mem_timings (u32 *mcfg,u32 *ctrla,u32 *ctrlb,u32 *rfr_ctrl, +u32 *mr) +{ + *mr =MICRON_V_MR_165 ; +#ifdef CONFIG_BOOT_NAND + *mcfg =MICRON_V_MCFG_165 (512 <<20 ); + *ctrla =MICRON_V_ACTIMA_165 ; + *ctrlb =MICRON_V_ACTIMB_165 ; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; +#else + *mcfg =NUMONYX_V_MCFG_165 (512 <<20 ); + *ctrla =NUMONYX_V_ACTIMA_165 ; + *ctrlb =NUMONYX_V_ACTIMB_165 ; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; +#endif +} +#endif +/* * Routine: setup_net_chip * Description: Setting up the configuration GPMC registers specific to the
@@ -91,7 +123,7 @@ static void setup_net_chip(void) }#endif -#ifdef CONFIG_GENERIC_MMC +#if defined(CONFIG_GENERIC_MMC ) && !defined(CONFIG_SPL_BUILD )int board_mmc_init (bd_t *bis) {omap_mmc_init (0 ,0 ,0 );
board/isee/igep0030/config.mk deleted +0 -33
@@ -1,33 +0,0 @@ -# -# (C) Copyright 2009 -# ISEE 2007 SL, <www.iseebcn.com> -# -# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# Physical Address: -# 8000'0000 (bank0) -# A000/0000 (bank1) -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000
board/isee/igep0030/igep0030.c +33 -1
@@ -45,7 +45,39 @@ int board_init(void)return 0 ; } -#ifdef CONFIG_GENERIC_MMC +#ifdef CONFIG_SPL_BUILD +/* +* Routine: omap_rev_string +* Description: For SPL builds output board rev +*/ +void omap_rev_string (void ) +{ +} + +/* +* Routine: get_board_mem_timings +* Description: If we use SPL then there is no x-loader nor config header +* so we have to setup the DDR timings ourself on both banks. +*/ +void get_board_mem_timings (u32 *mcfg,u32 *ctrla,u32 *ctrlb,u32 *rfr_ctrl, +u32 *mr) +{ + *mr =MICRON_V_MR_165 ; +#ifdef CONFIG_BOOT_NAND + *mcfg =MICRON_V_MCFG_165 (512 <<20 ); + *ctrla =MICRON_V_ACTIMA_165 ; + *ctrlb =MICRON_V_ACTIMB_165 ; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; +#else + *mcfg =NUMONYX_V_MCFG_165 (512 <<20 ); + *ctrla =NUMONYX_V_ACTIMA_165 ; + *ctrlb =NUMONYX_V_ACTIMB_165 ; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; +#endif +} +#endif + +#if defined(CONFIG_GENERIC_MMC ) && !defined(CONFIG_SPL_BUILD )int board_mmc_init (bd_t *bis) {omap_mmc_init (0 ,0 ,0 );
include/configs/igep00x0.h +65 -0
75 lines not on this page · raw message
Signature · 1 line
1.7.7.6
PATCH 2/2 OMAP3: igep00x0: add SPL support for IGEP-based boards
Quoted 3 lines · Javier Martinez Canillas
This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
[snip]
Quoted 1 line
+#define
CONFIG_SPL_MAX_SIZE(45 * 1024)
This should be 54 * 1024. Thanks!
Signature · 1 line
Tom
PATCH 2/2 OMAP3: igep00x0: add SPL support for IGEP-based boards
Quoted 4 lines · Tom Rini
Quoted 2 lines · Javier Martinez Canillas
This patch adds SPL support for IGEP-based boards.
Quoted 8 lines
Quoted 1 line
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
[snip]
Quoted 1 line
+#define
CONFIG_SPL_MAX_SIZE(45 * 1024)This should be 54 * 1024. Thanks!
--
Tom
Hi Tom,
Ok thanks a lot for your feedback. I'll fix it and send a v2 of the patch.
Best regards,
Javier
A message that is not in the archive (sent off-list or not yet received): CAFqH_52cEAXaVoBDsPORJcoRTMBeTL8gjnEGGDiJ=aSpwCQ5+w@mail.gmail.com
PATCH 1/2 OMAP3: igep00x0: Add config option to choose flash storage memory
On 07/16/2012 12:43 AM, Enric Balletb? i Serra wrote:
[snip]
Quoted 4 lines
I would like to investigateif we can do this using runtime detection instead of a separate config option. Give me some days. The runtime detection can be done reading the sysboot configuration for example. I think it's possible, do you think would be possible ?
Until we have the device model and the ability to see at run-time if we have say NAND or OneNAND (or neither!) we can't because we have to build-time define where the environment will be found.
Signature · 1 line
Tom
PATCH 1/2 OMAP3: igep00x0: Add config option to choose flash storage memory
Quoted 8 lines · Tom Rini
On 07/16/2012 12:43 AM, Enric Balletb? i Serra wrote:
[snip]
Quoted 4 lines
I would like to investigateif we can do this using runtime detection instead of a separate config option. Give me some days. The runtime detection can be done reading the sysboot configuration for example. I think it's possible, do you think would be possible ?
Quoted 6 lines
Until we have the device model and the ability to see at run-time if we have say NAND or OneNAND (or neither!) we can't because we have to build-time define where the environment will be found.
--
Tom
Hi Enric,
Runtime detection is possible reading the sysboot as you said (in fact this is how we do it in the kernel) but as Tom said I didn't find a common way to do this. I guess you can manually detect the NAND type and configure the GPMC registers on the board code but I didn't see other OMAP boards doing this. Instead I found other examples of boards using compile options to choose between memory types.
Of course I will be more than glad if you have a better approach to solve this :-)
Thanks a lot and best regards,
Javier
PATCH 1/2 OMAP3: igep00x0: Add config option to choose flash storage memory
On 07/16/2012 04:41 PM, Javier Martinez Canillas wrote:
[snip]
Quoted 9 lines
Runtime detection is possible reading the sysboot as you said (in fact this is how we do it in the kernel) but as Tom said I didn't find a common way to do this. I guess you can manually detect the NAND type and configure the GPMC registers on the board code but I didn't see other OMAP boards doing this. Instead I found other examples of boards using compile options to choose between memory types.
Of course I will be more than glad if you have a better approach to solve this :-)
The biggest problem is that today we don't have a way to read/write environment to a dynamically detected backing store. I had an idea on how to do this, but given the device model will also allow for this, easier, that's the way to go.
Signature · 1 line
Tom
PATCH 1/2 OMAP3: igep00x0: Add config option to choose flash storage memory
Hi,
2012/7/17 Tom Rini <[email protected]>:
Quoted 13 lines · Javier Martinez Canillas
[snip]
Quoted 9 lines
Runtime detection is possible reading the sysboot as you said (in fact this is how we do it in the kernel) but as Tom said I didn't find a common way to do this. I guess you can manually detect the NAND type and configure the GPMC registers on the board code but I didn't see other OMAP boards doing this. Instead I found other examples of boards using compile options to choose between memory types.
Of course I will be more than glad if you have a better approach to solve this :-)
Quoted 7 lines
The biggest problem is that today we don't have a way to read/write environment to a dynamically detected backing store. I had an idea on how to do this, but given the device model will also allow for this, easier, that's the way to go.
--
Tom
Cool, thanks for the explanations Tom.
Javier, of course you have my :-)
Cheers,
Enric