mx6: Allow mx6 to access the IPUv3 registers
Subsystems (4)
PATCH 1/9 mx6: Allow mx6 to access the IPUv3 registers
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.
---
This patch series apply against Anatolij's tree.
arch/arm/include/asm/arch-mx5/imx-regs.h | 2 -- arch/arm/include/asm/arch-mx6/imx-regs.h | 3 +++ drivers/video/ipu_regs.h | 12 +++++++++++- 3 files changed, 14 insertions(+), 3 deletions(-)
arch/arm/include/asm/arch-mx5/imx-regs.h +0 -2
@@ -50,8 +50,6 @@#error "CPU_TYPE not defined"#endif -#define IPU_CTRL_BASE_ADDR IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET -#define IRAM_SIZE 0x00020000/* 128 KB */ /*
arch/arm/include/asm/arch-mx6/imx-regs.h +3 -0
@@ -73,6 +73,9 @@#define MMDC1_ARB_BASE_ADDR 0x80000000#define MMDC1_ARB_END_ADDR 0xFFFFFFFF +#define IPU_SOC_BASE_ADDR IPU1_ARB_BASE_ADDR +#define IPU_SOC_OFFSET 0x00200000 +/* Defines for Blocks connected via AIPS (SkyBlue) */ #define ATZ1_BASE_ADDR AIPS1_ARB_BASE_ADDR#define ATZ2_BASE_ADDR AIPS2_ARB_BASE_ADDR
drivers/video/ipu_regs.h +11 -1
@@ -47,14 +47,24 @@#define IPU_SMFC_REG_BASE 0x00050000#define IPU_DC_REG_BASE 0x00058000#define IPU_DMFC_REG_BASE 0x00060000 +#define IPU_VDI_REG_BASE 0x00680000 +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 )#define IPU_CPMEM_REG_BASE 0x01000000#define IPU_LUT_REG_BASE 0x01020000#define IPU_SRM_REG_BASE 0x01040000#define IPU_TPM_REG_BASE 0x01060000#define IPU_DC_TMPL_REG_BASE 0x01080000#define IPU_ISP_TBPR_REG_BASE 0x010C0000 -#define IPU_VDI_REG_BASE 0x00680000 +#elif defined(CONFIG_MX6Q ) +#define IPU_CPMEM_REG_BASE 0x00100000 +#define IPU_LUT_REG_BASE 0x00120000 +#define IPU_SRM_REG_BASE 0x00140000 +#define IPU_TPM_REG_BASE 0x00160000 +#define IPU_DC_TMPL_REG_BASE 0x00180000 +#define IPU_ISP_TBPR_REG_BASE 0x001C0000 +#endif +#define IPU_CTRL_BASE_ADDR (IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET)extern u32 *ipu_dc_tmpl_reg;
Signature · 1 line
1.7.1
PATCH 2/9 video: Rename CONFIG_VIDEO_MX5
Rename CONFIG_VIDEO_MX5 as this driver can also be used on mx6.
--- drivers/video/Makefile | 2 +- drivers/video/cfb_console.c | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/vision2.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-)
drivers/video/Makefile +1 -1
@@ -41,7 +41,7 @@ COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o -COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o +COBJS-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
drivers/video/cfb_console.c +1 -1
@@ -164,7 +164,7 @@/* * Defines for the i.MX31 driver (mx3fb.c) */ -#if defined(CONFIG_VIDEO_MX3 ) || defined(CONFIG_VIDEO_MX5 ) +#if defined(CONFIG_VIDEO_MX3 ) || defined(CONFIG_VIDEO_IPUV3 )#define VIDEO_FB_16BPP_WORD_SWAP #endif
include/configs/mx51evk.h +1 -1
@@ -126,7 +126,7 @@/* Framebuffer and LCD */ #define CONFIG_PREBOOT #define CONFIG_VIDEO -#define CONFIG_VIDEO_MX5 +#define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_BMP_RLE8
include/configs/mx53loco.h +1 -1
@@ -223,7 +223,7 @@/* Framebuffer and LCD */ #define CONFIG_PREBOOT #define CONFIG_VIDEO -#define CONFIG_VIDEO_MX5 +#define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_BMP_RLE8
include/configs/vision2.h +1 -1
@@ -214,7 +214,7 @@*/ #define CONFIG_PREBOOT #define CONFIG_VIDEO -#define CONFIG_VIDEO_MX5 +#define CONFIG_VIDEO_IPUV3 #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_BMP_RLE8
Signature · 1 line
1.7.1
PATCH 2/9 video: Rename CONFIG_VIDEO_MX5
Hi,
Quoted 10 lines · On Thu, 31 May 2012 14:23:56 -0300 Fabio Estevam <[email protected]>…
Rename
CONFIG_VIDEO_MX5as this driver can also be used on mx6.Signed-off-by Fabio Estevam <[email protected]>--- drivers/video/Makefile | 2 +- drivers/video/cfb_console.c | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/vision2.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij
PATCH 3/9 ipu_common: Only apply the erratum to MX51
In reply to Fabio EstevamThe following erratum :
"ENGcm08316
IPU: Clarification regarding the bypass mode registers setup for display and camera interfaces"
,only applies to mx51, so restrict its usage for this SoC only.
--- drivers/video/ipu_common.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
drivers/video/ipu_common.c +2 -0
@@ -401,6 +401,7 @@ void ipu_reset(void)int ipu_probe (void ) {unsigned long ipu_base; +#if definedCONFIG_MX51 u32 temp;u32 *reg_hsc_mcd = (u32 *)MIPI_HSC_BASE_ADDR ;
@@ -414,6 +415,7 @@ int ipu_probe(void) temp =__raw_readl (reg_hsc_mxt_conf);__raw_writel (temp |0x10000 , reg_hsc_mxt_conf); +#endif ipu_base =IPU_CTRL_BASE_ADDR ; ipu_cpmem_base = (u32 *)(ipu_base +IPU_CPMEM_REG_BASE );
Signature · 1 line
1.7.1
PATCH 3/9 ipu_common: Only apply the erratum to MX51
Hi,
Quoted 6 lines · On Thu, 31 May 2012 14:23:57 -0300 Fabio Estevam <[email protected]>…
The following erratum :
"ENGcm08316
IPU: Clarification regarding the bypass mode registers setup for display and camera interfaces"
Quoted 6 lines
,only applies to mx51, so restrict its usage for this SoC only.
Signed-off-by Fabio Estevam <[email protected]>--- drivers/video/ipu_common.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij
PATCH 4/9 ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53
In reply to Fabio EstevamThe registers accessed inside clk_ipu_enable/disable are not present on MX6, so make sure they only run on MX51 and MX53.
--- drivers/video/ipu_common.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
drivers/video/ipu_common.c +4 -1
@@ -163,6 +163,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)static int clk_ipu_enable (struct clk *clk) { +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 )u32 reg; reg =__raw_readl (clk->enable_reg);
@@ -178,12 +179,13 @@ static int clk_ipu_enable(struct clk *clk) reg =__raw_readl (&mxc_ccm->clpcr); reg &= ~MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS ;__raw_writel (reg, &mxc_ccm->clpcr); - +#endif return 0 ; }static void clk_ipu_disable (struct clk *clk) { +#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 )u32 reg; reg =__raw_readl (clk->enable_reg);
@@ -202,6 +204,7 @@ static void clk_ipu_disable(struct clk *clk) reg =__raw_readl (&mxc_ccm->clpcr); reg |=MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS ;__raw_writel (reg, &mxc_ccm->clpcr); +#endif }
Signature · 1 line
1.7.1
PATCH 4/9 ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53
Hi,
Quoted 7 lines · On Thu, 31 May 2012 14:23:58 -0300 Fabio Estevam <[email protected]>…
The registers accessed inside clk_ipu_enable/disable are not present on MX6, so make sure they only run on MX51 and MX53.
Signed-off-by Fabio Estevam <[email protected]>--- drivers/video/ipu_common.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij
PATCH 5/9 ipu_common: Rename MXC_CCM_BASE
In reply to Fabio EstevamRename MXC_CCM_BASE to CCM_BASE_ADDR as this is already defined for MX6.
--- drivers/video/ipu_common.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/video/ipu_common.c +1 -1
@@ -211,7 +211,7 @@ static void clk_ipu_disable(struct clk *clk)static struct clk ipu_clk = { .name ="ipu_clk" , .rate =133000000 , - .enable_reg = (u32 *)(MXC_CCM_BASE + + .enable_reg = (u32 *)(CCM_BASE_ADDR + offsetof(struct mxc_ccm_reg , CCGR5)), .enable_shift =MXC_CCM_CCGR5_CG5_OFFSET , .enable = clk_ipu_enable,
Signature · 1 line
1.7.1
PATCH 5/9 ipu_common: Rename MXC_CCM_BASE
Hi,
Quoted 6 lines · On Thu, 31 May 2012 14:23:59 -0300 Fabio Estevam <[email protected]>…
Rename
MXC_CCM_BASEtoCCM_BASE_ADDRas this is already defined for MX6.Signed-off-by Fabio Estevam <[email protected]>--- drivers/video/ipu_common.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij
PATCH 6/9 ipu_common: Do not hardcode the ipu_clk frequency
In reply to Fabio EstevamDo not hardcode the ipu_clk frequency and let the board file pass this value.
--- drivers/video/ipu_common.c | 2 +- include/configs/mx51evk.h | 1 + include/configs/mx53loco.h | 1 + include/configs/vision2.h | 1 + 4 files changed, 4 insertions(+), 1 deletions(-)
drivers/video/ipu_common.c +1 -1
@@ -210,7 +210,7 @@ static void clk_ipu_disable(struct clk *clk)static struct clk ipu_clk = { .name ="ipu_clk" , - .rate =133000000 , + .rate =CONFIG_IPUV3_CLK , .enable_reg = (u32 *)(CCM_BASE_ADDR + offsetof(struct mxc_ccm_reg , CCGR5)), .enable_shift =MXC_CCM_CCGR5_CG5_OFFSET ,
include/configs/mx51evk.h +1 -0
@@ -133,6 +133,7 @@#define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 133000000/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE
include/configs/mx53loco.h +1 -0
@@ -230,5 +230,6 @@#define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 133000000#endif /* __CONFIG_H */
include/configs/vision2.h +1 -0
@@ -221,5 +221,6 @@#define CONFIG_SPLASH_SCREEN #define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 133000000#endif /* __CONFIG_H */
Signature · 1 line
1.7.1
PATCH 6/9 ipu_common: Do not hardcode the ipu_clk frequency
Hi,
Quoted 9 lines · On Thu, 31 May 2012 14:24:00 -0300 Fabio Estevam <[email protected]>…
Do not hardcode the
ipu_clkfrequency and let the board file pass this value.Signed-off-by Fabio Estevam <[email protected]>--- drivers/video/ipu_common.c | 2 +- include/configs/mx51evk.h | 1 + include/configs/mx53loco.h | 1 + include/configs/vision2.h | 1 + 4 files changed, 4 insertions(+), 1 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij
PATCH 7/9 mxc_i2c: Allow MX6Q I2C3 to work
In reply to Fabio EstevamAllow MX6Q I2C3 to work.
--- drivers/i2c/mxc_i2c.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
drivers/i2c/mxc_i2c.c +2 -0
@@ -78,6 +78,8 @@ struct mxc_i2c_regs {#define I2C_BASE I2C2_BASE_ADDR#elif defined(CONFIG_SYS_I2C_MX35_PORT3 )#define I2C_BASE I2C3_BASE_ADDR +#elif defined(CONFIG_SYS_I2C_MX6Q_PORT3 ) +#define I2C_BASE I2C3_BASE_ADDR#else #error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"#endif
Signature · 1 line
1.7.1
PATCH 7/9 mxc_i2c: Allow MX6Q I2C3 to work
Quoted 13 lines · Fabio Estevam
Allow MX6Q I2C3 to work.
Cc Heiko Schocher<[email protected]>Signed-off-by Fabio Estevam<[email protected]>--- drivers/i2c/mxc_i2c.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)drivers/i2c/mxc_i2c.c +0
-0
drivers/i2c/mxc_i2c.c struct mxc_i2c_regs { · line 85
Quoted 8 lines
drivers/i2c/mxc_i2c.c +2
-0@@ -78,6 +78,8 @@ struct mxc_i2c_regs {#define I2C_BASE I2C2_BASE_ADDR#elif defined(CONFIG_SYS_I2C_MX35_PORT3 )#define I2C_BASE I2C3_BASE_ADDR +#elif defined(CONFIG_SYS_I2C_MX6Q_PORT3 ) +#define I2C_BASE I2C3_BASE_ADDR#else #error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"#endif
This conflicts with the patch that Stefano acked on May 6.
[PATCH 1/3] mxc_i2c: specify i2c base address in config file
The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
--- arch/arm/include/asm/arch-mx31/imx-regs.h | 7 +++++++ arch/arm/include/asm/arch-mx35/imx-regs.h | 2 +- drivers/i2c/mxc_i2c.c | 25 ++++--------------------- include/configs/flea3.h | 2 +- include/configs/imx31_phycore.h | 3 ++- include/configs/mx35pdk.h | 2 +- include/configs/mx53ard.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/mx53smd.h | 2 +- 9 files changed, 19 insertions(+), 28 deletions(-)
arch/arm/include/asm/arch-mx31/imx-regs.h +7 -0
@@ -606,6 +606,13 @@ struct esdc_regs {#define UART4_BASE 0x43FB0000#define UART5_BASE 0x43FB4000 +#define I2C1_BASE_ADDR 0x43f80000 +#define I2C1_CLK_OFFSET 26 +#define I2C2_BASE_ADDR 0x43F98000 +#define I2C2_CLK_OFFSET 28 +#define I2C3_BASE_ADDR 0x43f84000 +#define I2C3_CLK_OFFSET 30 +#define ESDCTL_SDE (1<< 31)#define ESDCTL_CMD_RW (0<< 28)#define ESDCTL_CMD_PRECHARGE (1<< 28)
arch/arm/include/asm/arch-mx35/imx-regs.h +1 -1
@@ -39,7 +39,7 @@#define MAX_BASE_ADDR 0x43F04000#define EVTMON_BASE_ADDR 0x43F08000#define CLKCTL_BASE_ADDR 0x43F0C000 -#define I2C_BASE_ADDR 0x43F80000 +#define I2C1_BASE_ADDR 0x43F80000#define I2C3_BASE_ADDR 0x43F84000#define ATA_BASE_ADDR 0x43F8C000#define UART1_BASE 0x43F90000
drivers/i2c/mxc_i2c.c +4 -21
@@ -59,27 +59,10 @@ struct mxc_i2c_regs {#define I2SR_IIF (1<< 1)#define I2SR_RX_NO_AK (1<< 0) -#if defined(CONFIG_SYS_I2C_MX31_PORT1 ) -#define I2C_BASE 0x43f80000 -#define I2C_CLK_OFFSET 26 -#elif defined (CONFIG_SYS_I2C_MX31_PORT2 ) -#define I2C_BASE 0x43f98000 -#define I2C_CLK_OFFSET 28 -#elif defined (CONFIG_SYS_I2C_MX31_PORT3 ) -#define I2C_BASE 0x43f84000 -#define I2C_CLK_OFFSET 30 -#elif defined(CONFIG_SYS_I2C_MX53_PORT1 ) -#define I2C_BASE I2C1_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX53_PORT2 ) -#define I2C_BASE I2C2_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX35_PORT1 ) -#define I2C_BASE I2C_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX35_PORT2 ) -#define I2C_BASE I2C2_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX35_PORT3 ) -#define I2C_BASE I2C3_BASE_ADDR +#ifdef CONFIG_SYS_I2C_BASE +#define I2C_BASE CONFIG_SYS_I2C_BASE#else -#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver" +#error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"#endif #define I2C_MAX_TIMEOUT 10000
@@ -114,7 +97,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate) (struct clock_control_regs *)CCM_BASE ;/* start the required I2C clock */ -writel (readl (&sc_regs->cgr0) | (3 <<I2C_CLK_OFFSET ), +writel (readl (&sc_regs->cgr0) | (3 <<CONFIG_SYS_I2C_CLK_OFFSET ), &sc_regs->cgr0);#endif
include/configs/flea3.h +1 -1
@@ -68,7 +68,7 @@*/ #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX35_PORT3 +#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0xfe#define CONFIG_MXC_SPI
include/configs/imx31_phycore.h +2 -1
@@ -54,7 +54,8 @@#define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX31_PORT2 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR +#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0xfe
include/configs/mx35pdk.h +1 -1
@@ -59,7 +59,7 @@*/ #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX35_PORT1 +#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0xfe#define CONFIG_MXC_SPI
include/configs/mx53ard.h +1 -1
@@ -50,7 +50,7 @@#define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT2 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0xfe
include/configs/mx53evk.h +1 -1
@@ -53,7 +53,7 @@#define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT2 1 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0xfe
include/configs/mx53smd.h +1 -1
@@ -50,7 +50,7 @@#define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT2 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR#define CONFIG_SYS_I2C_SPEED 100000#define CONFIG_SYS_I2C_SLAVE 0xfe
-- 1.7.5.4
Fabio Estevam
reviewerPATCH 7/9 mxc_i2c: Allow MX6Q I2C3 to work
Hi Troy,
Quoted 9 lines · Troy Kisky
This conflicts with the patch that Stefano acked on May 6.
[PATCH 1/3]
mxc_i2c: specify i2c base address in config fileThe following platforms had their config files changed flea3,
imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smdSigned-off-by Troy Kisky<[email protected]>
Ok, I can rework this patch after your commit gets in.
Thanks,
Fabio Estevam
PATCH 7/9 mxc_i2c: Allow MX6Q I2C3 to work
Quoted 8 lines · Fabio Estevam
Hi Troy,
Quoted 3 lines · Troy Kisky
This conflicts with the patch that Stefano acked on May 6.
Quoted 8 lines
Quoted 6 lines
[PATCH 1/3]
mxc_i2c: specify i2c base address in config fileThe following platforms had their config files changed flea3,
imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smdSigned-off-by Troy Kisky<[email protected]>Ok, I can rework this patch after your commit gets in.
It seems this patch can be dropped completely and instead rework patch 9 like
https://github.com/dirkbehme/u-boot-imx6/commit/451422a40532a9d4f86c50c57190a91f954fb795
Best regards
Dirk
PATCH 8/9 ipu_common: Add ldb_clk for use in parenting the pixel clock
In reply to Fabio EstevamFrom: Eric Nelson <[email protected]>
Add ldb_clk for use in parenting the pixel clock.
--- drivers/video/ipu_common.c | 12 ++++++++++-- drivers/video/ipu_disp.c | 3 ++- 2 files changed, 12 insertions(+), 3 deletions(-)
drivers/video/ipu_common.c +10 -2
@@ -219,8 +219,15 @@ static struct clk ipu_clk = { .usecount = 0, }; +static struct clk ldb_clk = { + .name ="ldb_clk" , + .rate =65000000 , + .usecount =0 , +}; +/* Globals */ struct clk *g_ipu_clk; +struct clk *g_ldb_clk;unsigned char g_ipu_clk_enabled;struct clk *g_di_clk[2 ];struct clk *g_pixel_clk[2 ];
@@ -343,7 +350,7 @@ static int ipu_pixel_clk_set_parent(struct clk *clk, struct clk *parent)if (parent == g_ipu_clk) di_gen &= ~DI_GEN_DI_CLK_EXT ; -else if (!IS_ERR (g_di_clk[clk->id]) && parent == g_di_clk[clk->id]) +else if (!IS_ERR (g_di_clk[clk->id]) && parent == g_ldb_clk) di_gen |=DI_GEN_DI_CLK_EXT ;else return -EINVAL ;
@@ -429,7 +436,8 @@ int ipu_probe(void) g_ipu_clk = &ipu_clk;debug ("ipu_clk = %u\n" ,clk_get_rate (g_ipu_clk)); - + g_ldb_clk = &ldb_clk; +debug ("ldb_clk = %u\n" ,clk_get_rate (g_ldb_clk));ipu_reset ();clk_set_parent (g_pixel_clk[0 ], g_ipu_clk);
drivers/video/ipu_disp.c +2 -1
@@ -64,6 +64,7 @@ static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23;int g_di1_tvout;extern struct clk *g_ipu_clk; +extern struct clk *g_ldb_clk;extern struct clk *g_di_clk[2 ];extern struct clk *g_pixel_clk[2 ];
@@ -941,7 +942,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,udelay (10000 ); } } -clk_set_parent (g_pixel_clk[disp], g_di_clk[disp]); +clk_set_parent (g_pixel_clk[disp], g_ldb_clk); }else {if (clk_get_usecount (g_pixel_clk[disp]) !=0 )clk_set_parent (g_pixel_clk[disp], g_ipu_clk);
Signature · 1 line
1.7.1
PATCH 8/9 ipu_common: Add ldb_clk for use in parenting the pixel clock
Hi,
Quoted 10 lines · On Thu, 31 May 2012 14:24:02 -0300 Fabio Estevam <[email protected]>…
From: Eric Nelson <[email protected]>
Add
ldb_clkfor use in parenting the pixel clock.Signed-off-by Eric Nelson <[email protected]>Signed-off-by Fabio Estevam <[email protected]>--- drivers/video/ipu_common.c | 12 ++++++++++-- drivers/video/ipu_disp.c | 3 ++- 2 files changed, 12 insertions(+), 3 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij
PATCH 9/9 mx6qsabrelite: Add splaschscreen support
In reply to Fabio EstevamAdd splaschscreen support.
It was used a Hannstar 1024 x 768 LVDS panel that can be connected to the mx6qsabrelite board.
---
I understand this patch will need to be improved, but I am posting it now, so that others can possibly test it.
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 112 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 21 +++++- 2 files changed, 132 insertions(+), 1 deletions(-)
board/freescale/mx6qsabrelite/mx6qsabrelite.c +112 -0
@@ -33,6 +33,9 @@#include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> +#include <i2c.h> DECLARE_GLOBAL_DATA_PTR ;#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
@@ -55,6 +58,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) +int dram_init (void ) { gd->ram_size =get_ram_size ((void *)PHYS_SDRAM ,PHYS_SDRAM_SIZE );
@@ -143,6 +151,25 @@ static iomux_v3_cfg_t button_pads[] = { MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), }; +iomux_v3_cfg_t lcd_gpio[] = { +MX6Q_PAD_SD1_CMD__GPIO_1_18 |MUX_PAD_CTRL (NO_PAD_CTRL ), +}; + +static iomux_v3_cfg_t i2c3_pads[] = { +MX6Q_PAD_GPIO_5__I2C3_SCL |MUX_PAD_CTRL (I2C_PAD_CTRL ), +MX6Q_PAD_GPIO_16__I2C3_SDA |MUX_PAD_CTRL (I2C_PAD_CTRL ), +}; + +static void setup_iomux_i2c3 (void ) +{ +#define CLKCTL_CCGR2 0x70 +imx_iomux_v3_setup_multiple_pads (i2c3_pads,ARRAY_SIZE (i2c3_pads)); +/* Enable i2c clock */ +int reg =readl (CCM_BASE_ADDR +CLKCTL_CCGR2 ); + reg |=0xC00 ; +writel (reg,CCM_BASE_ADDR +CLKCTL_CCGR2 ); +} +static void setup_iomux_enet (void ) {gpio_direction_output (87 ,0 );/* GPIO 3-23 */
@@ -320,10 +347,85 @@ int setup_sata(void) }#endif +static struct fb_videomode lvds_xga = { + .name ="Hannstar-XGA" , + .refresh =60 , + .xres =1024 , + .yres =768 , + .pixclock =15385 , + .left_margin =220 , + .right_margin =40 , + .upper_margin =21 , + .lower_margin =7 , + .hsync_len =60 , + .vsync_len =10 , + .sync =FB_SYNC_EXT , + .vmode =FB_VMODE_NONINTERLACED +}; + +void lcd_iomux (void ) +{ +int reg; +/* Turn on GPIO backlight */ +imx_iomux_v3_setup_multiple_pads (lcd_gpio,ARRAY_SIZE (lcd_gpio)); +gpio_direction_output (18 ,1 ); + +#define CLKCTL_CGR3 0x38 +#define CLKCTL_CS2CDR 0x2C +#define CLKCTL_CSCMR2 0x20 +#define CLKCTL_CHSCCDR 0x34 +#define CLKCTL_CCGR3 0x74 +/* Turn on IPU clock */ + reg =readl (CCM_BASE_ADDR +CLKCTL_CCGR3 ); + reg |=0x300F ; +writel (reg,CCM_BASE_ADDR +CLKCTL_CCGR3 ); + + reg =readl (ANATOP_BASE_ADDR +0xF0 ); + reg &= ~0x00003F00 ; + reg |=0x00001300 ; +writel (reg,ANATOP_BASE_ADDR +0xF4 ); + + reg =readl (CCM_BASE_ADDR +CLKCTL_CS2CDR ); + reg &= ~0x00007E00 ; + reg |=0x00003600 ; +writel (reg,CCM_BASE_ADDR +CLKCTL_CS2CDR ); + + reg =readl (CCM_BASE_ADDR +CLKCTL_CSCMR2 ); + reg |=0x00000C00 ; +writel (reg,CCM_BASE_ADDR +CLKCTL_CSCMR2 ); + + reg =0x0002A953 ; +writel (reg,CCM_BASE_ADDR +CLKCTL_CHSCCDR ); + +writel (0x201 ,IOMUXC_BASE_ADDR +0x8 ); +} + +void lcd_enable (void ) +{ + +int ret =ipuv3_fb_init (&lvds_xga,0 ,IPU_PIX_FMT_RGB666 ); +if (ret) +printf ("LCD cannot be configured: %d\n" , ret); +} + +void setup_lvds_poweron (void ) +{ +uchar value; + +i2c_read (0x1f ,3 ,1 , &value,1 ); + value &= ~0x2 ; +i2c_write (0x1f ,3 ,1 , &value,1 ); +i2c_read (0x1f ,1 ,1 , &value,1 ); + value |=0x2 ; +i2c_write (0x1f ,1 ,1 , &value,1 ); +} +int board_early_init_f (void ) {setup_iomux_uart ();setup_buttons (); +lcd_iomux (); +setup_iomux_i2c3 ();return 0 ; }
@@ -341,9 +443,19 @@ int board_init(void)setup_sata ();#endif +#ifdef CONFIG_VIDEO +lcd_enable (); +#endif return 0 ; } +int board_late_init (void ) +{ +setup_lvds_poweron (); +setenv ("stdout" ,"serial" ); +return 0 ; +} +int checkboard (void ) {puts ("Board: MX6Q-Sabre Lite\n" );
include/configs/mx6qsabrelite.h +20 -1
@@ -38,10 +38,11 @@#define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)#define CONFIG_ARCH_CPU_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO
@@ -111,6 +112,24 @@#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)#define CONFIG_MXC_USB_FLAGS 0 +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 + +/* I2C Configs */ +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_MX6Q_PORT3 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0x1f +/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1
Signature · 1 line
1.7.1
PATCH 9/9 mx6qsabrelite: Add splaschscreen support
Quoted 1 line · Fabio Estevam
Add splaschscreen support.
Here and in the subject a typo? splaschscreen -> splashscreen?
Best regards
Dirk
Fabio Estevam
reviewerPATCH 9/9 mx6qsabrelite: Add splaschscreen support
Hi Dirk,
Quoted 6 lines · Dirk Behme
Quoted 2 lines · Fabio Estevam
Add splaschscreen support.
Here and in the subject a typo? splaschscreen -> splashscreen?
Thanks, I will fix this and rework this patch according to your I2C suggestion.
Regards,
Fabio Estevam
PATCH 9/9 mx6qsabrelite: Add splaschscreen support
Quoted 11 lines · Fabio Estevam
Hi Dirk,
Quoted 6 lines · Dirk Behme
Quoted 2 lines · Fabio Estevam
Add splaschscreen support.
Here and in the subject a typo? splaschscreen -> splashscreen?
Thanks, I will fix this and rework this patch according to your I2C suggestion.
Maybe you could check [1]
-#define CONFIG_SYS_I2C_SLAVE 0xfe
+#define CONFIG_SYS_I2C_SLAVE 0x1f
then? I'm no I2C expert and I wasn't sure what to use for CONFIG_SYS_I2C_SLAVE.
Best regards
Dirk
[1]
https://github.com/dirkbehme/u-boot-imx6/commit/451422a40532a9d4f86c50c57190a91f954fb795#L1L68
Fabio Estevam
reviewerPATCH 9/9 mx6qsabrelite: Add splaschscreen support
Hi Dirk,
Quoted 7 lines · Dirk Behme
Maybe you could check [1]
(quoted diff) +1
-1-#define CONFIG_SYS_I2C_SLAVE ? ? ? ? ? ?0xfe +#define CONFIG_SYS_I2C_SLAVE ? ?0x1fthen? I'm no I2C expert and I wasn't sure what to use for
CONFIG_SYS_I2C_SLAVE.
Yes, 0x1f is the correct address for the Hannstar LVDS I2C slave address.
I was doing:
i2c_read(0x1f, 3, 1, &value, 1);
,which was actually using the 0x1f value and discarded the CONFIG_SYS_I2C_SLAVE definition.
I can use CONFIG_SYS_I2C_SLAVE instead, which makes the code cleaner.
Thanks,
Fabio Estevam
PATCH 9/9 mx6qsabrelite: Add splaschscreen support
Quoted 4 lines · Fabio Estevam
Hi Dirk,
On Sat, Jun 2, 2012 at 3:52 PM, Dirk Behme<[email protected]> wrote:
Quoted 8 lines
Quoted 7 lines
Maybe you could check [1]
(quoted diff) +1
-1-#define CONFIG_SYS_I2C_SLAVE 0xfe +#define CONFIG_SYS_I2C_SLAVE 0x1fthen? I'm no I2C expert and I wasn't sure what to use for
CONFIG_SYS_I2C_SLAVE.Yes,
0x1fis the correct address for the Hannstar LVDS I2C slave address.
If 0x1f is the Hannstar LVDS address, then you definitely should NOT use 0x1f for the
CONFIG_SYS_I2C_SLAVE value.
CONFIG_SYS_I2C_SLAVE is meant to define which address the processor will respond to in a multi-master bus environment. However, as mxc_i2c does not support slave mode the entire discussion is moot.
Troy
Fabio Estevam
reviewerPATCH 9/9 mx6qsabrelite: Add splaschscreen support
Quoted 11 lines · Troy Kisky
If
0x1fis the Hannstar LVDS address, then you definitely should NOT use0x1ffor the
CONFIG_SYS_I2C_SLAVEvalue.
CONFIG_SYS_I2C_SLAVEis meant to define which address the processor will respond to
in a multi-master bus environment. However, asmxc_i2cdoes not support slave mode
the entire discussion is moot.
Thanks for the clarification, Troy.
So it means I can safely drop the CONFIG_SYS_I2C_SLAVE definition in the board config file.
According to include/i2c.h:
"/*
* Many boards/controllers/drivers don't support an I2C slave interface so
* provide a default slave address for them for use in common code. A real
* value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
* support a slave interface.
*/
#ifndef CONFIG_SYS_I2C_SLAVE
#define CONFIG_SYS_I2C_SLAVE 0xfe
#endif
"
Will submit a patch removing CONFIG_SYS_I2C_SLAVE from imx boards.
Thanks,
Fabio Estevam
PATCH 9/9 mx6qsabrelite: Add splaschscreen support
In reply to Fabio EstevamHi Fabio,
Quoted 8 lines · Fabio Estevam
Add splaschscreen support.
It was used a Hannstar 1024 x 768 LVDS panel that can be connected to the mx6qsabrelite board.
Signed-off-by Fabio Estevam <[email protected]>---
I understand this patch will need to be improved, but I am posting it now, so that others can possibly test it.
Just fyi: On the ALKML there are IPU patches from Sascha Hauer for the kernel. Applying Sascha's patches to the kernel and this patch to U-Boot makes the kernel crash with a NULL pointer [1].
I haven't looked into the details, wild guessing is that the U-Boot patch enables some interrupts the IPU driver isn't ready to handle before he's done his own initialization.
Note that this is only fyi.
Best regards
Dirk
[1]
...
imx-ipuv3 2800000.ipu: DI1 base: 0x02a48000 remapped to c08ee000
Unable to handle kernel NULL pointer dereference at virtual address 0000000c pgd = 80004000 [0000000c] *pgd=00000000 Internal error: Oops: 5 [#1] SMP ARM Modules linked in: CPU: 0 Not tainted PC is at imx_drm_handle_vblank+0xc/0x20 LR is at ipu_irq_handler+0x1c/0xdc
...
cover i.MX6: mx6qsabrelite: Add splash screen support
In reply to Fabio EstevamSeries includes one patch to fix a register name in imx6/crm_regs.h and a second that's a re-base of Fabio's patch from 5/31.
http://patchwork.ozlabs.org/patch/162206/
Note that I'm not sure whether this should have been based on u-boot-video because it's video-related or u-boot imx because the bulk of the patch set is board-specific.
arch/arm/include/asm/arch-mx6/crm_regs.h | 6 ++- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 14 ++++- 3 files changed, 108 insertions(+), 2 deletions(-)
PATCH 1/2 i.MX6: change register name for CCM_CHSCCDR to match ref. manual
Register CCM_CHSCCDR (offset 0x34 in CCM) is named CCM_CHSCCDR in reference manual, but was named chscdr in struct mxc_ccm_reg.
--- arch/arm/include/asm/arch-mx6/crm_regs.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/include/asm/arch-mx6/crm_regs.h +1 -1
@@ -34,7 +34,7 @@ struct mxc_ccm_reg {u32 cs1cdr;u32 cs2cdr;u32 cdcdr;/* 0x0030 */ -u32 chscdr; +u32 chsccdr;u32 cscdr2;u32 cscdr3;u32 cscdr4;/* 0x0040 */
Signature · 1 line
1.7.9
PATCH 2/2 i.MX6: mx6qsabrelite: Add splash screen support
In reply to Eric NelsonAdds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to u-boot-video/master:
http://patchwork.ozlabs.org/patch/162206/
Modifications include:
removal of i2c setup (unneeded)
cleanup of lcd_iomux to use struct mxc_ccm_reg and anatop_regs and associated constants
--- arch/arm/include/asm/arch-mx6/crm_regs.h | 4 + board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 14 ++++- 3 files changed, 107 insertions(+), 1 deletions(-)
arch/arm/include/asm/arch-mx6/crm_regs.h +4 -0
@@ -294,6 +294,10 @@ struct mxc_ccm_reg {#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7)#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET 0 +#define CHSCCDR_CLK_SEL_LDB_DI0 3 +#define CHSCCDR_PODF_DIVIDE_BY_3 2 +#define CHSCCDR_IPU_PRE_CLK_540M_PFD 5 +/* Define the bits in register CSCDR2 */ #define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK (0x3F << 19)#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET 19
board/freescale/mx6qsabrelite/mx6qsabrelite.c +90 -0
121 lines not on this page · raw message
include/configs/mx6qsabrelite.h +13 -1
@@ -39,9 +39,10 @@#define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO
@@ -121,6 +122,17 @@/* Miscellaneous commands */ #define CONFIG_CMD_BMODE +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1
Signature · 1 line
1.7.9
Fabio Estevam
reviewerPATCH 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Hi Eric,
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 490
Quoted 5 lines · Eric Nelson
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5
-0+int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ; +}
I was told not to do this way.
Please follow this approach instead:
commit 3e0773708dd4e502c127a589be5779708eb7ba69
Author: Stefano Babic <[email protected]> Date: Sun Aug 5 00:18:53 2012 +0000
MX5: mx53loco: do not overwrite the console
On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled.
Regards,
Fabio Estevam
cover i.MX6: mx6qsabrelite: Add splash screen support
In reply to Eric NelsonHi Eric,
Quoted 7 lines · On Mon, 17 Sep 2012 13:20:49 -0700 Eric Nelson…
Series includes one patch to fix a register name in
imx6/crm_regs.hand a second that's a re-base of Fabio's patch from 5/31.http://patchwork.ozlabs.org/patch/162206/Note that I'm not sure whether this should have been based on u-boot-video because it's video-related or u-boot imx because the bulk of the patch set is board-specific.
It should be based on u-boot-imx since it touches board files.
Thanks,
Anatolij
v2 cover i.MX6: mx6qsabrelite: Add splash screen support
In reply to Eric NelsonSeries includes one patch to fix a register name in imx6/crm_regs.h and a second that's a re-base of Fabio's patch from 5/31.
http://patchwork.ozlabs.org/patch/162206/
arch/arm/include/asm/arch-mx6/crm_regs.h | 6 ++- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 14 ++++- 3 files changed, 108 insertions(+), 2 deletions(-)
V2 rebased against u-boot-imx/master.
PATCH v2 1/2 i.MX6: change register name for CCM_CHSCCDR to match ref. manual
Register CCM_CHSCCDR (offset 0x34 in CCM) is named CCM_CHSCCDR in reference manual, but was named chscdr in struct mxc_ccm_reg.
--- arch/arm/include/asm/arch-mx6/crm_regs.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/include/asm/arch-mx6/crm_regs.h +1 -1
@@ -34,7 +34,7 @@ struct mxc_ccm_reg {u32 cs1cdr;u32 cs2cdr;u32 cdcdr;/* 0x0030 */ -u32 chscdr; +u32 chsccdr;u32 cscdr2;u32 cscdr3;u32 cscdr4;/* 0x0040 */
Signature · 1 line
1.7.9
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
In reply to Eric NelsonAdds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to u-boot-video/master:
http://patchwork.ozlabs.org/patch/162206/
Modifications include:
removal of i2c setup (unneeded)
cleanup of lcd_iomux to use struct mxc_ccm_reg and anatop_regs and associated constants
--- arch/arm/include/asm/arch-mx6/crm_regs.h | 4 + board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 14 ++++- 3 files changed, 107 insertions(+), 1 deletions(-)
arch/arm/include/asm/arch-mx6/crm_regs.h +4 -0
@@ -294,6 +294,10 @@ struct mxc_ccm_reg {#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7)#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET 0 +#define CHSCCDR_CLK_SEL_LDB_DI0 3 +#define CHSCCDR_PODF_DIVIDE_BY_3 2 +#define CHSCCDR_IPU_PRE_CLK_540M_PFD 5 +/* Define the bits in register CSCDR2 */ #define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK (0x3F << 19)#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET 19
board/freescale/mx6qsabrelite/mx6qsabrelite.c +90 -0
121 lines not on this page · raw message
include/configs/mx6qsabrelite.h +13 -1
@@ -39,9 +39,10 @@#define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO
@@ -121,6 +122,17 @@/* Miscellaneous commands */ #define CONFIG_CMD_BMODE +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1
Signature · 1 line
1.7.9
Fabio Estevam
reviewerPATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Hi Eric,
Quoted 4 lines · Eric Nelson
Adds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to
s/Estevan/Estevam
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 490
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5
-0+int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ; +}
Please see my previous comment on v1 about this.
Wolfgang nacked this method and Stefano has proposed a nice way for keeping the console in serial. Check mx53loco and mx51evk.
Regards,
Fabio Estevam
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Hi Fabio,
Quoted 11 lines · Fabio Estevam
Hi Eric,
Quoted 4 lines · Eric Nelson
Adds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to
s/Estevan/Estevam
Oops, sorry...
Quoted 11 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 490
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5
-0+int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ; +}Please see my previous comment on v1 about this.
Wolfgang nacked this method and Stefano has proposed a nice way for keeping the console in serial. Check mx53loco and mx51evk.
Thanks. I'll look into it.
I'll also look into this:
http://lists.denx.de/pipermail/u-boot/2012-July/129556.html
Regards,
Eric
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Quoted 15 lines · Eric Nelson
Hi Fabio,
Quoted 12 lines · Fabio Estevam
Hi Eric,
<snip >
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 490
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5
-0+int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ; +}Please see my previous comment on v1 about this.
Quoted 6 lines
Quoted 3 lines
Wolfgang nacked this method and Stefano has proposed a nice way for keeping the console in serial. Check mx53loco and mx51evk.
Thanks. I'll look into it.
Like this?
http://lists.denx.de/pipermail/u-boot/2012-August/129967.html
Fabio Estevam
reviewerPATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Quoted 2 lines · Eric Nelson
Like this?
http://lists.denx.de/pipermail/u-boot/2012-August/129967.html
Yes, correct.
Regards,
Fabio Estevam
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
In reply to Fabio EstevamQuoted 20 lines · Fabio Estevam
Hi Eric,
Quoted 4 lines · Eric Nelson
Adds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to
s/Estevan/Estevam
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 490
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5
-0+int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ; +}Please see my previous comment on v1 about this.
Quoted 3 lines
Wolfgang nacked this method and Stefano has proposed a nice way for keeping the console in serial. Check mx53loco and mx51evk.
Hi Fabio and Stefano,
While trying to understand this, I wonder whether the use of overwrite_console() addresses Wolfgang's original concern.
I think the suggestion was to set the preboot variable to change things:
#define CONFIG_PREBOOT "setenv stdout serial"
The has the benefit of allowing saveenv to completely overwrite the decision.
Am I over-thinking this?
Please advise,
Eric
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Quoted 9 lines · Eric Nelson
Hi Fabio and Stefano,
While trying to understand this, I wonder whether the use of
overwrite_console()addresses Wolfgang's original concern.I think the suggestion was to set the preboot variable to change things:
Wolfgang's first concern was to avoid to hardcode variable inside the code, as it was done in the original mx51 / mx53 code (and not only in i.MX boards).
Quoted 2 lines
#define
CONFIG_PREBOOT"setenv stdout serial"
This makes sense if you want maintain the possibility that u-boot output is displayed on the LCD. Is this really the case ?
In most cases, we want to display a splashscreen, while the console is still managed by serial line.
If this is the case, adding overwrite_console() tells video subsystem to not change the stdout variable, and then it is not required to set it back to serial neither in code nor with the help of the preboot variable.
Quoted 4 lines
The has the benefit of allowing saveenv to completely overwrite the decision.
Am I over-thinking this?
It depends if you want also U-Boot's output on the display or only a picture.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Thanks Stefano,
Quoted 15 lines · Stefano Babic
Quoted 8 lines · Eric Nelson
Hi Fabio and Stefano,
While trying to understand this, I wonder whether the use of
overwrite_console()addresses Wolfgang's original concern.I think the suggestion was to set the preboot variable to change things:
Wolfgang's first concern was to avoid to hardcode variable inside the code, as it was done in the original mx51 / mx53 code (and not only in i.MX boards).
Quoted 1 line
Quoted 5 lines
Quoted 1 line
#define
CONFIG_PREBOOT"setenv stdout serial"This makes sense if you want maintain the possibility that u-boot output is displayed on the LCD. Is this really the case ?
Sometimes it is.
We have customers of SABRE Lite that are new to embedded who have had to purchase serial adapters upon receiving their boards, though this is rare.
The other main use case is simpler: a serial port isn't hooked up during boot (i.e. in a production environment). In production, it would be more convenient to hook up a USB keyboard if needed.
Quoted 8 lines
In most cases, we want to display a splashscreen, while the console is still managed by serial line.
If this is the case, adding
overwrite_console()tells video subsystem to not change the stdout variable, and then it is not required to set it back to serial neither in code nor with the help of the preboot variable.
Quoted 8 lines
Quoted 4 lines
The has the benefit of allowing saveenv to completely overwrite the decision.
Am I over-thinking this?
It depends if you want also U-Boot's output on the display or only a picture.
I'll rework the patch with overwrite_console() and keep these options in mind.
Thanks for the tips.
Regards,
Eric
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
In reply to Eric NelsonOn 18/09/2012 01:14, Eric Nelson wrote:
Hi Eric,
Quoted 12 lines
Adds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to u-boot-video/master:
http://patchwork.ozlabs.org/patch/162206/Modifications include:
removal of i2c setup (unneeded)
cleanup oflcd_iomuxto use structmxc_ccm_regandanatop_regsand associated constants
All this stuff should not be part of the commit message, because it is more or less a changelog. Should you also include Fabio's signed-off ?
Quoted 72 lines
Signed-off-by Eric Nelson <[email protected]>---
arch/arm/include/asm/arch-mx6/crm_regs.h | 4 + board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 14 ++++- 3 files changed, 107 insertions(+), 1 deletions(-)arch/arm/include/asm/arch-mx6/crm_regs.h +4
-0@@ -294,6 +294,10 @@ struct mxc_ccm_reg {#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7)#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET 0 +#define CHSCCDR_CLK_SEL_LDB_DI0 3 +#define CHSCCDR_PODF_DIVIDE_BY_3 2 +#define CHSCCDR_IPU_PRE_CLK_540M_PFD 5 +/* Define the bits in register CSCDR2 */ #define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK (0x3F << 19)#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET 19board/freescale/mx6qsabrelite/mx6qsabrelite.c +27
-0@@ -36,6 +36,9 @@#include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> +#include <asm/arch/crm_regs.h> DECLARE_GLOBAL_DATA_PTR ;#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \@@ -195,6 +198,10 @@ static iomux_v3_cfg_t button_pads[] = { MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), }; +iomux_v3_cfg_t lcd_gpio[] = { +MX6Q_PAD_SD1_CMD__GPIO_1_18 |MUX_PAD_CTRL (NO_PAD_CTRL ), +}; +static void setup_iomux_enet (void ) {gpio_direction_output (IMX_GPIO_NR (3 ,23 ),0 );@@ -372,10 +379,84 @@ int setup_sata(void) }#endif +static struct fb_videomode lvds_xga = { + .name ="Hannstar-XGA" , + .refresh =60 , + .xres =1024 , + .yres =768 , + .pixclock =15385 , + .left_margin =220 , + .right_margin =40 , + .upper_margin =21 , + .lower_margin =7 , + .hsync_len =60 , + .vsync_len =10 , + .sync =FB_SYNC_EXT , + .vmode =FB_VMODE_NONINTERLACED +}; + +void lcd_iomux (void ) +{ +struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; +struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR ;
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void) · line 411
Quoted 10 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +10
-0+ +int reg; +/* Turn on GPIO backlight */ +imx_iomux_v3_setup_multiple_pads (lcd_gpio,ARRAY_SIZE (lcd_gpio)); +gpio_direction_output (18 ,1 ); + +/* Turn on LDB0,IPU,IPU DI0 clocks */ + reg =__raw_readl (&mxc_ccm->CCGR3); + reg |=0x300F ; +writel (reg, &mxc_ccm->CCGR3);
I think we can add constants for these - at least for these constants, you could drop the not useful defines with offset like MXC_CCM_CCGR5_CGx_OFFSET. There is already a patch (not yet merged) for MX5, we should then doing the same for MX6.
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void) · line 415
Quoted 4 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +4
-0+ +/* set PFD3_FRAC to 0x13 == 455 MHz (480*18)/0x13 */ +writel (0x00003F00 , &anatop->pfd_480_clr); +writel (0x00001300 , &anatop->pfd_480_set);
Add constants for these. They are not already defined, but they are added when needed, see for example ehci-mx6.c
Quoted 10 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +10
-0+ +/* set LDB0, LDB1 clk select to 011/011 */ + reg =readl (&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK + |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK ); + reg |= (3 <<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET ) + |(3 <<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET ); +writel (reg, &mxc_ccm->cs2cdr); + + reg =readl (&mxc_ccm->cscmr2);
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void) · line 435
Quoted 10 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +10
-0+ reg |=MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV ; +writel (reg, &mxc_ccm->cscmr2); + + reg =readl (&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK ); +/* derive clock from LDB_DI0 */ +/* divide by 3 */ +/* derive clock from 540M PFD */
Wrong style for a multiline comment
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void) · line 444
Quoted 9 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +9
-0+ reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET ) + |(CHSCCDR_PODF_DIVIDE_BY_3 + <<MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET ) + |(CHSCCDR_IPU_PRE_CLK_540M_PFD + <<MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET ); +writel (reg, &mxc_ccm->chsccdr); + +writel (0x201 ,IOMUXC_BASE_ADDR +0x8 );/* 16 bpp */
This is GPR2, right ? Nobody can easy understand. Use structure (not offset) and constants to set it.
Quoted 22 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +11
-0+} + +void lcd_enable (void ) +{ + +int ret =ipuv3_fb_init (&lvds_xga,0 ,IPU_PIX_FMT_RGB666 ); +if (ret) +printf ("LCD cannot be configured: %d\n" , ret); +} +int board_early_init_f (void ) {setup_iomux_uart ();setup_buttons (); +lcd_iomux ();return 0 ; }@@ -396,9 +477,18 @@ int board_init(void)setup_sata ();#endif
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 489
Quoted 10 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +7
-0+#ifdef CONFIG_VIDEO +lcd_enable (); +#endif return 0 ; } +int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ;
This is wrong, we found a better way to do this. You should add a overwrite_console() function, see for example the MX5 boards.
Quoted 18 lines
include/configs/mx6qsabrelite.h +2
-1@@ -39,9 +39,10 @@#define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO @@ -121,6 +122,17 @@/* Miscellaneous commands */ #define CONFIG_CMD_BMODE
include/configs/mx6qsabrelite.h line 134
Quoted 10 lines
include/configs/mx6qsabrelite.h +10
-0+/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000
...adding also CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Thanks for the review, Stefano.
Quoted 11 lines · Stefano Babic
On 18/09/2012 01:14, Eric Nelson wrote:
Hi Eric,
Quoted 7 lines
Adds support for the Hannstar 1024 x 768 LVDS panel (Freescale part number MCIMX-LVDS1) to SABRE-Lite board.
This commit is a rebase Fabio Estevan's patch from 5/31 to u-boot-video/master:
http://patchwork.ozlabs.org/patch/162206/
Quoted 9 lines
Quoted 5 lines
Modifications include:
removal of i2c setup (unneeded)
cleanup oflcd_iomuxto use structmxc_ccm_regandanatop_regsand associated constantsAll this stuff should not be part of the commit message, because it is more or less a changelog. Should you also include Fabio's signed-off ?
Okay. I'll take it out of V3.
I didn't include Fabio's sign off because he hadn't seen this yet and I changed a fair amount of code.
Quoted 79 lines
Quoted 79 lines
Signed-off-by Eric Nelson<[email protected]>---
arch/arm/include/asm/arch-mx6/crm_regs.h | 4 + board/freescale/mx6qsabrelite/mx6qsabrelite.c | 90 +++++++++++++++++++++++++ include/configs/mx6qsabrelite.h | 14 ++++- 3 files changed, 107 insertions(+), 1 deletions(-)arch/arm/include/asm/arch-mx6/crm_regs.h +4
-0@@ -294,6 +294,10 @@ struct mxc_ccm_reg {#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7)#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET 0 +#define CHSCCDR_CLK_SEL_LDB_DI0 3 +#define CHSCCDR_PODF_DIVIDE_BY_3 2 +#define CHSCCDR_IPU_PRE_CLK_540M_PFD 5 +/* Define the bits in register CSCDR2 */ #define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK (0x3F<< 19)#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET 19board/freescale/mx6qsabrelite/mx6qsabrelite.c +34
-0@@ -36,6 +36,9 @@#include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> +#include <asm/arch/crm_regs.h> DECLARE_GLOBAL_DATA_PTR ;#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \@@ -195,6 +198,10 @@ static iomux_v3_cfg_t button_pads[] = { MX6Q_PAD_GPIO_18__GPIO_7_13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), }; +iomux_v3_cfg_t lcd_gpio[] = { +MX6Q_PAD_SD1_CMD__GPIO_1_18 |MUX_PAD_CTRL (NO_PAD_CTRL ), +}; +static void setup_iomux_enet (void ) {gpio_direction_output (IMX_GPIO_NR (3 ,23 ),0 );@@ -372,10 +379,84 @@ int setup_sata(void) }#endif +static struct fb_videomode lvds_xga = { + .name ="Hannstar-XGA" , + .refresh =60 , + .xres =1024 , + .yres =768 , + .pixclock =15385 , + .left_margin =220 , + .right_margin =40 , + .upper_margin =21 , + .lower_margin =7 , + .hsync_len =60 , + .vsync_len =10 , + .sync =FB_SYNC_EXT , + .vmode =FB_VMODE_NONINTERLACED +}; + +void lcd_iomux (void ) +{ +struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR ; +struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR ; + +int reg; +/* Turn on GPIO backlight */ +imx_iomux_v3_setup_multiple_pads (lcd_gpio,ARRAY_SIZE (lcd_gpio)); +gpio_direction_output (18 ,1 ); + +/* Turn on LDB0,IPU,IPU DI0 clocks */
Quoted 9 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void)
Quoted 3 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +3
-0+ reg =__raw_readl (&mxc_ccm->CCGR3); + reg |=0x300F ; +writel (reg,&mxc_ccm->CCGR3);I think we can add constants for these - at least for these constants, you could drop the not useful defines with offset like
MXC_CCM_CCGR5_CGx_OFFSET. There is already a patch (not yet merged) for MX5, we should then doing the same for MX6.
Do you have a reference to the patch so I can follow precedent?
Quoted 8 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void)
Quoted 4 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +4
-0+ +/* set PFD3_FRAC to 0x13 == 455 MHz (480*18)/0x13 */ +writel (0x00003F00 ,&anatop->pfd_480_clr); +writel (0x00001300 ,&anatop->pfd_480_set);Add constants for these. They are not already defined, but they are added when needed, see for example
ehci-mx6.c
Ok.
Quoted 14 lines
Quoted 14 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +14
-0+ +/* set LDB0, LDB1 clk select to 011/011 */ + reg =readl (&mxc_ccm->cs2cdr); + reg&= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK + |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK ); + reg |= (3 <<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET ) + |(3 <<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET ); +writel (reg,&mxc_ccm->cs2cdr); + + reg =readl (&mxc_ccm->cscmr2); + reg |=MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV ; +writel (reg,&mxc_ccm->cscmr2); + + reg =readl (&mxc_ccm->chsccdr);
Quoted 9 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void) · line 435
Quoted 6 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +6
-0+ reg&= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK ); +/* derive clock from LDB_DI0 */ +/* divide by 3 */ +/* derive clock from 540M PFD */ Wrong style for a multiline comment
Noted. These are leftovers I used while hand decoding the bits.
Quoted 4 lines
Quoted 4 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +4
-0+ reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET ) + |(CHSCCDR_PODF_DIVIDE_BY_3 + <<MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET )
Quoted 9 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int setup_sata(void) · line 444
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5
-0+ |(CHSCCDR_IPU_PRE_CLK_540M_PFD + <<MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET ); +writel (reg,&mxc_ccm->chsccdr); + +writel (0x201 ,IOMUXC_BASE_ADDR +0x8 );/* 16 bpp */ This is GPR2, right ? Nobody can easy understand. Use structure (not offset) and constants to set it.
Yep.
Quoted 28 lines
Quoted 28 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +14
-0+} + +void lcd_enable (void ) +{ + +int ret =ipuv3_fb_init (&lvds_xga,0 ,IPU_PIX_FMT_RGB666 ); +if (ret) +printf ("LCD cannot be configured: %d\n" , ret); +} +int board_early_init_f (void ) {setup_iomux_uart ();setup_buttons (); +lcd_iomux ();return 0 ; }@@ -396,9 +477,18 @@ int board_init(void)setup_sata ();#endif +#ifdef CONFIG_VIDEO +lcd_enable (); +#endif return 0 ; }
Quoted 8 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_init(void) · line 489
Quoted 4 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +4
-0+int board_late_init (void ) +{ +setenv ("stdout" ,"serial" ); +return 0 ;This is wrong, we found a better way to do this. You should add a
overwrite_console()function, see for example the MX5 boards.
Fabio noted that as well.
Quoted 18 lines
Quoted 18 lines
include/configs/mx6qsabrelite.h +2
-1@@ -39,9 +39,10 @@#define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO @@ -121,6 +122,17 @@/* Miscellaneous commands */ #define CONFIG_CMD_BMODE
Quoted 13 lines
include/configs/mx6qsabrelite.h line 134
Quoted 10 lines
include/configs/mx6qsabrelite.h +10
-0+/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000...adding also
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
I'll send a note under separate cover about this.
Quoted 3 lines
Best regards,
Stefano Babic
Regards,
Eric
PATCH v2 2/2 i.MX6: mx6qsabrelite: Add splash screen support
Quoted 2 lines · Eric Nelson
Do you have a reference to the patch so I can follow precedent?
See http://patchwork.ozlabs.org/patch/177403/
Check changes in .h.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
[U-Boot] Cleanup of CCGR registers (was [PATCH V2 2/2] i.MX6: mx6qsabrelite: Add splash screen support)
Quoted 8 lines · Stefano Babic
Quoted 2 lines · Eric Nelson
Do you have a reference to the patch so I can follow precedent?
See http://patchwork.ozlabs.org/patch/177403/
Check changes in .h.
Should I remove the un-named macros?
MXC_CCM_CCGRx_CGy_OFFSET
MXC_CCM_CCGRx_CGy_MASK
It appears that only arch/arm/cpu/armv7/mx6/clock.c is using them.
Please advise,
Eric
[U-Boot] Cleanup of CCGR registers (was [PATCH V2 2/2] i.MX6: mx6qsabrelite: Add splash screen support)
Quoted 10 lines · Eric Nelson
Quoted 8 lines · Stefano Babic
Quoted 2 lines · Eric Nelson
Do you have a reference to the patch so I can follow precedent?
See http://patchwork.ozlabs.org/patch/177403/
Check changes in .h.
Quoted 6 lines
Should I remove the un-named macros?
MXC_CCM_CCGRx_CGy_OFFSET
MXC_CCM_CCGRx_CGy_MASKIt appears that only
arch/arm/cpu/armv7/mx6/clock.cis using them.
Any cleanup to make code better understandable is welcome !
As I see, most macros are named in clock.c, with the exception in enable_usboh3_clk().
Regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/9 mx6: Allow mx6 to access the IPUv3 registers
In reply to Fabio EstevamHi Fabio,
Quoted 10 lines · On Thu, 31 May 2012 14:23:55 -0300 Fabio Estevam <[email protected]>…
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.
Signed-off-by Fabio Estevam <[email protected]>---
This patch series apply against Anatolij's tree.arch/arm/include/asm/arch-mx5/imx-regs.h | 2 -- arch/arm/include/asm/arch-mx6/imx-regs.h | 3 +++ drivers/video/ipu_regs.h | 12 +++++++++++- 3 files changed, 14 insertions(+), 3 deletions(-)
Applied to u-boot-video/next, thanks!
Anatolij