fsl_esdhc: Add no-snoop config for default init
Subsystems (3)
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
cfg->no_snoop was available only through custom fsl_esdhc_mmc init functions. Add a config options to make it available also through the default init.
--- .../drivers/mmc/fsl_esdhc.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/mmc/fsl_esdhc.c +3 -0
@@ -597,6 +597,9 @@ int fsl_esdhc_mmc_init(bd_t *bis) cfg =malloc (sizeof (struct fsl_esdhc_cfg ));memset (cfg,0 ,sizeof (struct fsl_esdhc_cfg )); cfg->esdhc_base =CONFIG_SYS_FSL_ESDHC_ADDR ; +#ifdef CONFIG_SYS_FSL_ESDHC_NO_SNOOP + cfg->no_snoop =1 ; +#endif return fsl_esdhc_initialize (bis, cfg); }
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
Quoted 3 lines · Beno?t Th?baudeau
cfg->no_snoopwas available only through customfsl_esdhc_mmcinit functions. Add a config options to make it available also through the default init.
Hi Beno?t,
Quoted 13 lines
Signed-off-by Beno?t Th?baudeau <[email protected]>Cc Andy Fleming <[email protected]>Cc Stefano Babic <[email protected]>Cc Kim Phillips <[email protected]>--- .../drivers/mmc/fsl_esdhc.c | 3 +++ 1 file changed, 3 insertions(+)drivers/mmc/fsl_esdhc.c +0
-0
drivers/mmc/fsl_esdhc.c int fsl_esdhc_mmc_init(bd_t *bis) · line 605
Quoted 9 lines
drivers/mmc/fsl_esdhc.c +3
-0@@ -597,6 +597,9 @@ int fsl_esdhc_mmc_init(bd_t *bis) cfg =malloc (sizeof (struct fsl_esdhc_cfg ));memset (cfg,0 ,sizeof (struct fsl_esdhc_cfg )); cfg->esdhc_base =CONFIG_SYS_FSL_ESDHC_ADDR ; +#ifdef CONFIG_SYS_FSL_ESDHC_NO_SNOOP + cfg->no_snoop =1 ; +#endif return fsl_esdhc_initialize (bis, cfg); }
Using a structure to setup the controller avoids to add further CONFIG_ switch. I do not find the needs to have both. Why do you need ?
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
Hi Stefano,
Quoted 28 lines · Stefano Babic
Quoted 5 lines · Beno?t Th?baudeau
cfg->no_snoopwas available only through customfsl_esdhc_mmcinit functions.
Add a config options to make it available also through the default init.Hi Beno?t,
Quoted 19 lines
Signed-off-by Beno?t Th?baudeau <[email protected]>Cc Andy Fleming <[email protected]>Cc Stefano Babic <[email protected]>Cc Kim Phillips <[email protected]>--- .../drivers/mmc/fsl_esdhc.c | 3 +++ 1 file changed, 3 insertions(+)(quoted diff) +0
-0
u-boot-4d3c95f/drivers/mmc/fsl_esdhc.c
index b6c969d..21154e5 100644drivers/mmc/fsl_esdhc.c +2
-0@@ -597,6 +597,9 @@ int fsl_esdhc_mmc_init(bd_t *bis) cfg =malloc (sizeof (struct fsl_esdhc_cfg ));memset (cfg,0 ,sizeof (struct fsl_esdhc_cfg )); cfg->esdhc_base =CONFIG_SYS_FSL_ESDHC_ADDR ; +#ifdef CONFIG_SYS_FSL_ESDHC_NO_SNOOP + cfg->no_snoop =1 ;
Quoted 8 lines
drivers/mmc/fsl_esdhc.c int fsl_esdhc_mmc_init(bd_t *bis) · line 605
Quoted 4 lines
drivers/mmc/fsl_esdhc.c +1
-0+#endif return fsl_esdhc_initialize (bis, cfg); }Using a structure to setup the controller avoids to add further
CONFIG_
switch. I do not find the needs to have both. Why do you need ?
fsl_esdhc_mmc_init() exists, so it should give access to all features. Moreover, it's shorter to #define a config option than to create custom fsl_esdhc_mmc init functions when only a single eSDHC instance is needed.
Besides that, the cache snooping feature is not available on i.MX, which means that without CONFIG_SYS_FSL_ESDHC_NO_SNOOP or an equivalent, boards using fsl_esdhc_mmc_init() will make esdhc_init() access a reserved bit of a reserved register, which is not really recommended.
On i.MX, the patch could also be improved by not making this option available, but behaving as if it were set.
Best regards,
Beno?t
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
Quoted 2 lines · Beno?t Th?baudeau
Hi Stefano,
Hi,
Quoted 1 line
fsl_esdhc_mmc_init()exists, so it should give access to all features.
This was left for compatibility with PowerPC SOCs.
Quoted 3 lines
Moreover,
it's shorter to #define a config option than to create customfsl_esdhc_mmcinit functions when only a single eSDHC instance is needed.
However, the number of CONFIG_ continues to increase, often not well documented.
Quoted 5 lines
Besides that, the cache snooping feature is not available on i.MX, which means that without
CONFIG_SYS_FSL_ESDHC_NO_SNOOPor an equivalent, boards usingfsl_esdhc_mmc_init()will makeesdhc_init()access a reserved bit of a reserved register, which is not really recommended.
It should be masked by the i.MX code. You add CONFIG_SYS_FSL_ESDHC_NO_SNOOP and this is set inside the board configuration file. But this is not a board configuration option, rather a SOC option. Then it should the initialization code of i.MX that should hide this bit to the board itself.
Instead of this, I think it is better to change cpu_mmc_init() in arch/arm/cpu/armv7/imx-common/cpu.c, setting the structure and fixing the soop bit to 1, because i.MX has not this feature. Then all i.MX boards using ESDHC have the no_snoop bit set.
Quoted 2 lines
On i.MX, the patch could also be improved by not making this option available, but behaving as if it were set.
Right. It should not be configurable. We know that the i.MXs have no snoop cabability.
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
Hi Stefano,
Quoted 10 lines · Stefano Babic
Quoted 2 lines · Beno?t Th?baudeau
Hi Stefano,
Hi,
Quoted 2 lines
fsl_esdhc_mmc_init()exists, so it should give access to all features.This was left for compatibility with PowerPC SOCs.
OK.
Quoted 7 lines
Quoted 4 lines
Moreover,
it's shorter to #define a config option than to create customfsl_esdhc_mmcinit
functions when only a single eSDHC instance is needed.However, the number of
CONFIG_continues to increase, often not well documented.
OK.
Quoted 16 lines
Quoted 7 lines
Besides that, the cache snooping feature is not available on i.MX, which means
that withoutCONFIG_SYS_FSL_ESDHC_NO_SNOOPor an equivalent, boards usingfsl_esdhc_mmc_init()will makeesdhc_init()access a reserved bit of a reserved
register, which is not really recommended.It should be masked by the i.MX code. You add
CONFIG_SYS_FSL_ESDHC_NO_SNOOPand this is set inside the board configuration file. But this is not a board configuration option, rather
a SOC option. Then it should the initialization code of i.MX that should
hide this bit to the board itself.
Quoted 4 lines
Instead of this, I think it is better to change
cpu_mmc_init()inarch/arm/cpu/armv7/imx-common/cpu.c, setting the structure and fixing the soop bit to 1, because i.MX has not this feature. Then all i.MX boards using ESDHC have theno_snoopbit set.
That could be a solution. However, that would have to be done for i.MX25 and i.MX35 too (I have patches to add/fix eSDHC support for these that I will post shortly), which means more duplicated code that should rather be centralized somewhere.
Quoted 6 lines
Quoted 3 lines
On i.MX, the patch could also be improved by not making this option available,
but behaving as if it were set.Right. It should not be configurable. We know that the i.MXs have no snoop cabability.
The solution I would like would be to have some automatic ARCH_IMX (or ARCH_MXC) config like on Linux. Then the fsl_esdhc driver could use this config to remove all cache snooping stuff from its code and from struct fsl_esdhc_cfg.
The i.MX board files would have to be updated to no longer refer to the no_snoop field. struct fsl_esdhc_cfg would then have only one field for i.MX, but this is not really an issue.
ARCH_IMX could be defined in all imx-regs.h files. Or the fsl_esdhc driver could simply use a #if testing all the supported CONFIG_MX*.
What do you think?
Best regards,
Beno?t
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
Am 11/08/2012 19:59, schrieb Beno?t Th?baudeau:
Quoted 2 lines
Hi Stefano,
Hi Beno?t,
Quoted 4 lines
That could be a solution. However, that would have to be done for i.MX25 and i.MX35 too (I have patches to add/fix eSDHC support for these that I will post shortly), which means more duplicated code that should rather be centralized somewhere.
Ok, I'll wait for your patches ;-)
Quoted 8 lines
Quoted 7 lines
Quoted 4 lines
On i.MX, the patch could also be improved by not making this option available,
but behaving as if it were set.Right. It should not be configurable. We know that the i.MXs have no snoop cabability.
Quoted 7 lines
The solution I would like would be to have some automatic
ARCH_IMX(orARCH_MXC) config like on Linux. Then thefsl_esdhcdriver could use this config to remove all cache snooping stuff from its code and from structfsl_esdhc_cfg.The i.MX board files would have to be updated to no longer refer to the
no_snoopfield. structfsl_esdhc_cfgwould then have only one field for i.MX, but this is not really an issue.
Yes, this is no an issue.
Quoted 3 lines
ARCH_IMXcould be defined in allimx-regs.hfiles. Or thefsl_esdhcdriver could simply use a #if testing all the supported CONFIG_MX*.
Let the fsl_edhc checking for CONFIG_MX* results clear for us today, but nobody will remember after some times and if the checked CONFIG_MX* will be changed, it will have drawbacks not so evident on MMC. I prefer the first solution, adding an entry to imx-regs.h.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================
PATCH 1/2 imx: Define architecture identifier
Define ARCH_IMX for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux).
--- .../arch/arm/include/asm/arch-imx/imx-regs.h | 3 +++ .../arch/arm/include/asm/arch-mx25/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx27/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx31/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx35/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx5/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ 7 files changed, 15 insertions(+)
arch/arm/include/asm/arch-imx/imx-regs.h +3 -0
@@ -1,5 +1,8 @@#ifndef _IMX_REGS_H#define _IMX_REGS_H + +#define ARCH_IMX +/* ------------------------------------------------------------------------ * Motorola IMX system registers * ------------------------------------------------------------------------
arch/arm/include/asm/arch-mx25/imx-regs.h +2 -0
@@ -172,6 +172,8 @@ struct aips_regs {#endif +#define ARCH_IMX +/* AIPS 1 */ #define IMX_AIPS1_BASE (0x43F00000)#define IMX_MAX_BASE (0x43F04000)
arch/arm/include/asm/arch-mx27/imx-regs.h +2 -0
@@ -217,6 +217,8 @@ struct fuse_bank0_regs {#endif +#define ARCH_IMX +#define IMX_IO_BASE 0x10000000#define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE)
arch/arm/include/asm/arch-mx31/imx-regs.h +2 -0
@@ -541,6 +541,8 @@ struct esdc_regs {#endif +#define ARCH_IMX +#define __REG (x) (*((volatile u32 *)(x)))#define __REG16 (x) (*((volatile u16 *)(x)))#define __REG8 (x) (*((volatile u8 *)(x)))
arch/arm/include/asm/arch-mx35/imx-regs.h +2 -0
@@ -25,6 +25,8 @@#ifndef __ASM_ARCH_MX35_H#define __ASM_ARCH_MX35_H +#define ARCH_IMX +/* * IRAM */
arch/arm/include/asm/arch-mx5/imx-regs.h +2 -0
@@ -23,6 +23,8 @@#ifndef __ASM_ARCH_MX5_IMX_REGS_H__#define __ASM_ARCH_MX5_IMX_REGS_H__ +#define ARCH_IMX +#if defined(CONFIG_MX51 )#define IRAM_BASE_ADDR 0x1FFE0000/* internal ram */ #define IPU_SOC_BASE_ADDR 0x40000000
arch/arm/include/asm/arch-mx6/imx-regs.h +2 -0
@@ -19,6 +19,8 @@#ifndef __ASM_ARCH_MX6_IMX_REGS_H__#define __ASM_ARCH_MX6_IMX_REGS_H__ +#define ARCH_IMX +#define CONFIG_SYS_CACHELINE_SIZE 32#define ROMCP_ARB_BASE_ADDR 0x00000000
PATCH 2/2 fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() were used for an i.MX board.
--- .../board/efikamx/efikamx.c | 4 ++-- .../board/esg/ima3-mx53/ima3-mx53.c | 2 +- .../board/freescale/mx51evk/mx51evk.c | 4 ++-- .../board/freescale/mx53ard/mx53ard.c | 4 ++-- .../board/freescale/mx53evk/mx53evk.c | 4 ++-- .../board/freescale/mx53loco/mx53loco.c | 4 ++-- .../board/freescale/mx53smd/mx53smd.c | 2 +- .../board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- .../board/freescale/mx6qsabrelite/mx6qsabrelite.c | 4 ++-- .../board/ttcontrol/vision2/vision2.c | 2 +- .../drivers/mmc/fsl_esdhc.c | 2 ++ .../include/fsl_esdhc.h | 3 +++ 12 files changed, 22 insertions(+), 17 deletions(-)
board/efikamx/efikamx.c +2 -2
@@ -302,8 +302,8 @@ static inline void power_init(void) { }*/ #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };static inline uint32_t efika_mmc_cd (void )
board/esg/ima3-mx53/ima3-mx53.c +1 -1
@@ -172,7 +172,7 @@ static void setup_iomux_fec(void) }#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR ,1 }; +struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR };int board_mmc_getcd (struct mmc *mmc) {
board/freescale/mx51evk/mx51evk.c +2 -2
@@ -47,8 +47,8 @@ DECLARE_GLOBAL_DATA_PTR;#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };#endif
board/freescale/mx53ard/mx53ard.c +2 -2
@@ -79,8 +79,8 @@ static void setup_iomux_uart(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53evk/mx53evk.c +2 -2
@@ -204,8 +204,8 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC3_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC3_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53loco/mx53loco.c +2 -2
@@ -165,8 +165,8 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC3_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC3_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53smd/mx53smd.c +1 -1
@@ -129,7 +129,7 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[1 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx6qarm2/mx6qarm2.c +2 -2
@@ -116,8 +116,8 @@ static void setup_iomux_enet(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2 ] = { - {USDHC3_BASE_ADDR ,1 }, - {USDHC4_BASE_ADDR ,1 }, + {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx6qsabrelite/mx6qsabrelite.c +2 -2
@@ -237,8 +237,8 @@ int board_ehci_hcd_init(int port)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2 ] = { - {USDHC3_BASE_ADDR ,1 }, - {USDHC4_BASE_ADDR ,1 }, + {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/ttcontrol/vision2/vision2.c +1 -1
@@ -521,7 +521,7 @@ static void setup_fec(void) }struct fsl_esdhc_cfg esdhc_cfg[1 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, };int get_mmc_getcd (u8 *cd,struct mmc *mmc)
drivers/mmc/fsl_esdhc.c +2 -0
@@ -479,9 +479,11 @@ static int esdhc_init(struct mmc *mmc)while ((esdhc_read32 (®s->sysctl) &SYSCTL_RSTA ) && --timeout)udelay (1000 ); +#ifndef ARCH_IMX /* Enable cache snooping */ if (cfg && !cfg->no_snoop)esdhc_write32 (®s->scr,0x00000040 ); +#endif esdhc_write32 (®s->sysctl,SYSCTL_HCKEN |SYSCTL_IPGEN );
include/fsl_esdhc.h +3 -0
@@ -26,6 +26,7 @@#ifndef __FSL_ESDHC_H__#define __FSL_ESDHC_H__ +#include <config.h> #include <asm/errno.h> #include <asm/byteorder.h>
@@ -167,7 +168,9 @@struct fsl_esdhc_cfg {u32 esdhc_base; +#ifndef ARCH_IMX u32 no_snoop; +#endif };/* Select the correct accessors depending on endianess */
PATCH 2/2 fsl_esdhc: Remove cache snooping for i.MX
Quoted 9 lines · Beno?t Th?baudeau
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting
no_snoopfor all i.MX boards, and it prevents setting a reserved bit of a reserved register iffsl_esdhc_mmc_init()were used for an i.MX board.Signed-off-by Beno?t Th?baudeau <[email protected]>Cc Andy Fleming <[email protected]>Cc Stefano Babic <[email protected]>Cc Kim Phillips <[email protected]>
Quoted 15 lines
--- .../board/efikamx/efikamx.c | 4 ++-- .../board/esg/ima3-mx53/ima3-mx53.c | 2 +- .../board/freescale/mx51evk/mx51evk.c | 4 ++-- .../board/freescale/mx53ard/mx53ard.c | 4 ++-- .../board/freescale/mx53evk/mx53evk.c | 4 ++-- .../board/freescale/mx53loco/mx53loco.c | 4 ++-- .../board/freescale/mx53smd/mx53smd.c | 2 +- .../board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- .../board/freescale/mx6qsabrelite/mx6qsabrelite.c | 4 ++-- .../board/ttcontrol/vision2/vision2.c | 2 +- .../drivers/mmc/fsl_esdhc.c | 2 ++ .../include/fsl_esdhc.h | 3 +++ 12 files changed, 22 insertions(+), 17 deletions(-)
Hi Beno?t,
Quoted 29 lines
drivers/mmc/fsl_esdhc.c +2
-0@@ -479,9 +479,11 @@ static int esdhc_init(struct mmc *mmc)while ((esdhc_read32 (®s->sysctl) &SYSCTL_RSTA ) && --timeout)udelay (1000 ); +#ifndef ARCH_IMX /* Enable cache snooping */ if (cfg && !cfg->no_snoop)esdhc_write32 (®s->scr,0x00000040 ); +#endif esdhc_write32 (®s->sysctl,SYSCTL_HCKEN |SYSCTL_IPGEN );include/fsl_esdhc.h +1
-0@@ -26,6 +26,7 @@#ifndef __FSL_ESDHC_H__#define __FSL_ESDHC_H__ +#include <config.h> #include <asm/errno.h> #include <asm/byteorder.h>
include/fsl_esdhc.h line 174
Quoted 7 lines
include/fsl_esdhc.h +2
-0@@ -167,7 +168,9 @@struct fsl_esdhc_cfg {u32 esdhc_base; +#ifndef ARCH_IMX u32 no_snoop; +#endif };
Why don't you get rid of no_snoop at all ? Using ARCH_IMX is not needed anymore.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 2/2 fsl_esdhc: Remove cache snooping for i.MX
Hi Stefano,
Quoted 64 lines · Stefano Babic
Quoted 12 lines · Beno?t Th?baudeau
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids settingno_snoopfor all
i.MX boards, and it prevents setting a reserved bit of a reserved register iffsl_esdhc_mmc_init()were used for an i.MX board.Signed-off-by Beno?t Th?baudeau <[email protected]>Cc Andy Fleming <[email protected]>Cc Stefano Babic <[email protected]>Cc Kim Phillips <[email protected]>Quoted 15 lines
--- .../board/efikamx/efikamx.c | 4 ++-- .../board/esg/ima3-mx53/ima3-mx53.c | 2 +- .../board/freescale/mx51evk/mx51evk.c | 4 ++-- .../board/freescale/mx53ard/mx53ard.c | 4 ++-- .../board/freescale/mx53evk/mx53evk.c | 4 ++-- .../board/freescale/mx53loco/mx53loco.c | 4 ++-- .../board/freescale/mx53smd/mx53smd.c | 2 +- .../board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- .../board/freescale/mx6qsabrelite/mx6qsabrelite.c | 4 ++-- .../board/ttcontrol/vision2/vision2.c | 2 +- .../drivers/mmc/fsl_esdhc.c | 2 ++ .../include/fsl_esdhc.h | 3 +++ 12 files changed, 22 insertions(+), 17 deletions(-)Hi Beno?t,
Quoted 32 lines
(quoted diff) +0
-0
u-boot-4d3c95f/drivers/mmc/fsl_esdhc.c
index b6c969d..efdc6be 100644drivers/mmc/fsl_esdhc.c +2
-0@@ -479,9 +479,11 @@ static int esdhc_init(struct mmc *mmc)while ((esdhc_read32 (®s->sysctl) &SYSCTL_RSTA ) && --timeout)udelay (1000 ); +#ifndef ARCH_IMX /* Enable cache snooping */ if (cfg && !cfg->no_snoop)esdhc_write32 (®s->scr,0x00000040 ); +#endif esdhc_write32 (®s->sysctl,SYSCTL_HCKEN |SYSCTL_IPGEN );(quoted diff) +0
-0
u-boot-4d3c95f/include/fsl_esdhc.h
index 0e26558..44f9f06 100644include/fsl_esdhc.h +1
-0@@ -26,6 +26,7 @@#ifndef __FSL_ESDHC_H__#define __FSL_ESDHC_H__ +#include <config.h> #include <asm/errno.h> #include <asm/byteorder.h> @@ -167,7 +168,9 @@
Quoted 10 lines
include/fsl_esdhc.h line 174
Quoted 6 lines
include/fsl_esdhc.h +2
-0struct fsl_esdhc_cfg {u32 esdhc_base; +#ifndef ARCH_IMX u32 no_snoop; +#endif };Why don't you get rid of
no_snoopat all ? UsingARCH_IMXis not needed
anymore.
Because I didn't know if disabling cache snooping could be a useful option or not for architectures other than i.MX, so I preferred to leave it just in case, even if it seems to be unused.
But if you are certain that disabling cache snooping can not be useful for architectures other than i.MX (now or in the future, for boards in or out of tree), I can completely remove no_snoop. Just tell me.
Perhaps you have a rule such as "remove any stuff that is unused in mainstream".
Best regards,
Beno?t
PATCH 2/2 fsl_esdhc: Remove cache snooping for i.MX
Quoted 8 lines · Beno?t Th?baudeau
Quoted 4 lines
Why don't you get rid of
no_snoopat all ? UsingARCH_IMXis not needed
anymore.Because I didn't know if disabling cache snooping could be a useful option or not for architectures other than i.MX, so I preferred to leave it just in case, even if it seems to be unused.
I introduce no_snoop when I adapted the driver for iMX. I do not see PowerPC boards setting this bit.
And checking this, it seems to me that code in arch/arm/cpu/armv7/imx-common/cpu.c is wrong, because cpu_mmc_init() does not set the bit and the scr register is set (or could be set) even for i.MX6 SOCs. Maybe writing at this adress does not cause problems, but it seems wrong. You patch then fixes also this issue.
Quoted 3 lines
But if you are certain that disabling cache snooping can not be useful for architectures other than i.MX (now or in the future, for boards in or out of tree), I can completely remove
no_snoop. Just tell me.
IMHO you can drop it.
Quoted 2 lines
Perhaps you have a rule such as "remove any stuff that is unused in mainstream".
It would be nice to have it ;-)
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 2/2 fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
---
Changes for v2:
- Get rid of no_snoop.
.../board/efikamx/efikamx.c | 4 ++-- .../board/esg/ima3-mx53/ima3-mx53.c | 2 +- .../board/freescale/mx51evk/mx51evk.c | 4 ++-- .../board/freescale/mx53ard/mx53ard.c | 4 ++-- .../board/freescale/mx53evk/mx53evk.c | 4 ++-- .../board/freescale/mx53loco/mx53loco.c | 4 ++-- .../board/freescale/mx53smd/mx53smd.c | 2 +- .../board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- .../board/freescale/mx6qsabrelite/mx6qsabrelite.c | 4 ++-- .../board/ttcontrol/vision2/vision2.c | 2 +- .../drivers/mmc/fsl_esdhc.c | 5 +++-- .../include/fsl_esdhc.h | 1 - 12 files changed, 20 insertions(+), 20 deletions(-)
board/efikamx/efikamx.c +2 -2
@@ -302,8 +302,8 @@ static inline void power_init(void) { }*/ #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };static inline uint32_t efika_mmc_cd (void )
board/esg/ima3-mx53/ima3-mx53.c +1 -1
@@ -172,7 +172,7 @@ static void setup_iomux_fec(void) }#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR ,1 }; +struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR };int board_mmc_getcd (struct mmc *mmc) {
board/freescale/mx51evk/mx51evk.c +2 -2
@@ -47,8 +47,8 @@ DECLARE_GLOBAL_DATA_PTR;#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };#endif
board/freescale/mx53ard/mx53ard.c +2 -2
@@ -79,8 +79,8 @@ static void setup_iomux_uart(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53evk/mx53evk.c +2 -2
@@ -204,8 +204,8 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC3_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC3_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53loco/mx53loco.c +2 -2
@@ -165,8 +165,8 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC3_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC3_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53smd/mx53smd.c +1 -1
@@ -129,7 +129,7 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[1 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx6qarm2/mx6qarm2.c +2 -2
@@ -116,8 +116,8 @@ static void setup_iomux_enet(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2 ] = { - {USDHC3_BASE_ADDR ,1 }, - {USDHC4_BASE_ADDR ,1 }, + {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx6qsabrelite/mx6qsabrelite.c +2 -2
@@ -237,8 +237,8 @@ int board_ehci_hcd_init(int port)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2 ] = { - {USDHC3_BASE_ADDR ,1 }, - {USDHC4_BASE_ADDR ,1 }, + {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/ttcontrol/vision2/vision2.c +1 -1
@@ -521,7 +521,7 @@ static void setup_fec(void) }struct fsl_esdhc_cfg esdhc_cfg[1 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, };int get_mmc_getcd (u8 *cd,struct mmc *mmc)
drivers/mmc/fsl_esdhc.c +3 -2
@@ -479,9 +479,10 @@ static int esdhc_init(struct mmc *mmc)while ((esdhc_read32 (®s->sysctl) &SYSCTL_RSTA ) && --timeout)udelay (1000 ); +#ifndef ARCH_IMX /* Enable cache snooping */ -if (cfg && !cfg->no_snoop) -esdhc_write32 (®s->scr,0x00000040 ); +esdhc_write32 (®s->scr,0x00000040 ); +#endif esdhc_write32 (®s->sysctl,SYSCTL_HCKEN |SYSCTL_IPGEN );
include/fsl_esdhc.h +0 -1
@@ -167,7 +167,6 @@struct fsl_esdhc_cfg {u32 esdhc_base; -u32 no_snoop; };/* Select the correct accessors depending on endianess */
PATCH v3 2/2 fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
---
Changes for v2:
- Get rid of no_snoop.
Changes for v3:
- Rename ARCH_IMX to ARCH_MXC to emphasize the difference between mxc and mxs.
.../board/efikamx/efikamx.c | 4 ++-- .../board/esg/ima3-mx53/ima3-mx53.c | 2 +- .../board/freescale/mx51evk/mx51evk.c | 4 ++-- .../board/freescale/mx53ard/mx53ard.c | 4 ++-- .../board/freescale/mx53evk/mx53evk.c | 4 ++-- .../board/freescale/mx53loco/mx53loco.c | 4 ++-- .../board/freescale/mx53smd/mx53smd.c | 2 +- .../board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- .../board/freescale/mx6qsabrelite/mx6qsabrelite.c | 4 ++-- .../board/ttcontrol/vision2/vision2.c | 2 +- .../drivers/mmc/fsl_esdhc.c | 5 +++-- .../include/fsl_esdhc.h | 1 - 12 files changed, 20 insertions(+), 20 deletions(-)
board/efikamx/efikamx.c +2 -2
@@ -302,8 +302,8 @@ static inline void power_init(void) { }*/ #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };static inline uint32_t efika_mmc_cd (void )
board/esg/ima3-mx53/ima3-mx53.c +1 -1
@@ -172,7 +172,7 @@ static void setup_iomux_fec(void) }#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR ,1 }; +struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR };int board_mmc_getcd (struct mmc *mmc) {
board/freescale/mx51evk/mx51evk.c +2 -2
@@ -47,8 +47,8 @@ DECLARE_GLOBAL_DATA_PTR;#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };#endif
board/freescale/mx53ard/mx53ard.c +2 -2
@@ -79,8 +79,8 @@ static void setup_iomux_uart(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC2_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC2_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53evk/mx53evk.c +2 -2
@@ -204,8 +204,8 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC3_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC3_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53loco/mx53loco.c +2 -2
@@ -165,8 +165,8 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[2 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, - {MMC_SDHC3_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, + {MMC_SDHC3_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx53smd/mx53smd.c +1 -1
@@ -129,7 +129,7 @@ static void setup_iomux_fec(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[1 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx6qarm2/mx6qarm2.c +2 -2
@@ -116,8 +116,8 @@ static void setup_iomux_enet(void)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2 ] = { - {USDHC3_BASE_ADDR ,1 }, - {USDHC4_BASE_ADDR ,1 }, + {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/freescale/mx6qsabrelite/mx6qsabrelite.c +2 -2
@@ -237,8 +237,8 @@ int board_ehci_hcd_init(int port)#ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2 ] = { - {USDHC3_BASE_ADDR ,1 }, - {USDHC4_BASE_ADDR ,1 }, + {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, };int board_mmc_getcd (struct mmc *mmc)
board/ttcontrol/vision2/vision2.c +1 -1
@@ -521,7 +521,7 @@ static void setup_fec(void) }struct fsl_esdhc_cfg esdhc_cfg[1 ] = { - {MMC_SDHC1_BASE_ADDR ,1 }, + {MMC_SDHC1_BASE_ADDR }, };int get_mmc_getcd (u8 *cd,struct mmc *mmc)
drivers/mmc/fsl_esdhc.c +3 -2
@@ -479,9 +479,10 @@ static int esdhc_init(struct mmc *mmc)while ((esdhc_read32 (®s->sysctl) &SYSCTL_RSTA ) && --timeout)udelay (1000 ); +#ifndef ARCH_MXC /* Enable cache snooping */ -if (cfg && !cfg->no_snoop) -esdhc_write32 (®s->scr,0x00000040 ); +esdhc_write32 (®s->scr,0x00000040 ); +#endif esdhc_write32 (®s->sysctl,SYSCTL_HCKEN |SYSCTL_IPGEN );
include/fsl_esdhc.h +0 -1
@@ -167,7 +167,6 @@struct fsl_esdhc_cfg {u32 esdhc_base; -u32 no_snoop; };/* Select the correct accessors depending on endianess */
PATCH 1/2 imx: Define architecture identifier
In reply to Benoît ThébaudeauQuoted 10 lines · Beno?t Th?baudeau
Define
ARCH_IMXfor i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs.The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux).
Signed-off-by Beno?t Th?baudeau <[email protected]>Cc Stefano Babic <[email protected]>Cc Andy Fleming <[email protected]>Cc Kim Phillips <[email protected]>
Wouldn't be better to use ARCH_MXC in this case?
Signature · 3 lines
Otavio Salvador O.S. Systems E-mail: otavio at ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br
PATCH v3 1/2 mxc: Define architecture identifier
Define ARCH_MXC for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux).
---
Changes for v2: None.
Changes for v3:
- Rename ARCH_IMX to ARCH_MXC to emphasize the difference between mxc and mxs.
.../arch/arm/include/asm/arch-imx/imx-regs.h | 3 +++ .../arch/arm/include/asm/arch-mx25/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx27/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx31/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx35/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx5/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ 7 files changed, 15 insertions(+)
arch/arm/include/asm/arch-imx/imx-regs.h +3 -0
@@ -1,5 +1,8 @@#ifndef _IMX_REGS_H#define _IMX_REGS_H + +#define ARCH_MXC +/* ------------------------------------------------------------------------ * Motorola IMX system registers * ------------------------------------------------------------------------
arch/arm/include/asm/arch-mx25/imx-regs.h +2 -0
@@ -172,6 +172,8 @@ struct aips_regs {#endif +#define ARCH_MXC +/* AIPS 1 */ #define IMX_AIPS1_BASE (0x43F00000)#define IMX_MAX_BASE (0x43F04000)
arch/arm/include/asm/arch-mx27/imx-regs.h +2 -0
@@ -217,6 +217,8 @@ struct fuse_bank0_regs {#endif +#define ARCH_MXC +#define IMX_IO_BASE 0x10000000#define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE)
arch/arm/include/asm/arch-mx31/imx-regs.h +2 -0
@@ -541,6 +541,8 @@ struct esdc_regs {#endif +#define ARCH_MXC +#define __REG (x) (*((volatile u32 *)(x)))#define __REG16 (x) (*((volatile u16 *)(x)))#define __REG8 (x) (*((volatile u8 *)(x)))
arch/arm/include/asm/arch-mx35/imx-regs.h +2 -0
@@ -25,6 +25,8 @@#ifndef __ASM_ARCH_MX35_H#define __ASM_ARCH_MX35_H +#define ARCH_MXC +/* * IRAM */
arch/arm/include/asm/arch-mx5/imx-regs.h +2 -0
@@ -23,6 +23,8 @@#ifndef __ASM_ARCH_MX5_IMX_REGS_H__#define __ASM_ARCH_MX5_IMX_REGS_H__ +#define ARCH_MXC +#if defined(CONFIG_MX51 )#define IRAM_BASE_ADDR 0x1FFE0000/* internal ram */ #define IPU_SOC_BASE_ADDR 0x40000000
arch/arm/include/asm/arch-mx6/imx-regs.h +2 -0
@@ -19,6 +19,8 @@#ifndef __ASM_ARCH_MX6_IMX_REGS_H__#define __ASM_ARCH_MX6_IMX_REGS_H__ +#define ARCH_MXC +#define CONFIG_SYS_CACHELINE_SIZE 32#define ROMCP_ARB_BASE_ADDR 0x00000000
PATCH v3 1/2 mxc: Define architecture identifier
Quoted 11 lines · Beno?t Th?baudeau
Define
ARCH_MXCfor i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs.The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux).
Signed-off-by Beno?t Th?baudeau <[email protected]>Cc Stefano Babic <[email protected]>Cc Andy Fleming <[email protected]>Cc Kim Phillips <[email protected]>---
Hi Beno?t,
I checked again this patch and I already set this patch in patchwork as "merged" (=awaiting upstream), but I could not find it in u-boot-imx. Something went wrong..
I have applied it now to u-boot-imx.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
In reply to Benoît ThébaudeauOn 11/08/2012 19:59, Beno?t Th?baudeau wrote:
Hi Beno?t,
Quoted 4 lines
That could be a solution. However, that would have to be done for i.MX25 and i.MX35 too (I have patches to add/fix eSDHC support for these that I will post shortly), which means more duplicated code that should rather be centralized somewhere.
can I ask you which kind of problems you have seen on a i.MX35 ? I was curious after your e-amil and I enabled the FSL_ESDHC driver on a mx35pdk - it seems working out of the box, I have not changed the driver.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 1/1 fsl_esdhc: Add no-snoop config for default init
Hi Stefano,
Quoted 12 lines · Stefano Babic
On 11/08/2012 19:59, Beno?t Th?baudeau wrote:
Hi Beno?t,
Quoted 7 lines
That could be a solution. However, that would have to be done for i.MX25 and
i.MX35 too (I have patches to add/fix eSDHC support for these that I will post
shortly), which means more duplicated code that should rather be centralized
somewhere.
Quoted 5 lines
can I ask you which kind of problems you have seen on a i.MX35 ? I was
curious after your e-amil and I enabled theFSL_ESDHCdriver on a mx35pdk - it seems working out of the box, I have not changed the driver.
Yes, it's not a big deal. The driver itself is fine. The issues are clock and init issues in the mx25- and mx35-specific files (clock.c, generic.c and the associated headers I think). I don't remember precisely what applied to mx25 and/or mx35, but what I fixed is:
- init code referring to mxc mmc instead of fsl esdhc,
- wrong handling of the cpu_mmc_init return value in some cases,
- wrong source clock reported to the fsl_esdhc driver (not the eSDHC clock, and
not making any difference between the clocks of the various eSDHC instances), so that if it works it's only by chance, and the actual SD clock will likely be different from what mmcinfo reports, depending on the selected board clock dividers.
Best regards,
Beno?t