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mxc_spi: Round up clock divider

PATCH New Benoît Thébaudeau 2 participants 4 messages Aug 10, 2012 – Aug 20, 2012 1 message not in the archive

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A message that is not in the archive (sent off-list or not yet received): [email protected]

#1 lore raw

PATCH 1/1 mxc_spi: Round up clock divider

Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated.

Cc Wolfgang Denk <[email protected]>
Cc Stefano Babic <[email protected]>
---
 .../drivers/spi/mxc_spi.c                          |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/spi/mxc_spi.c +2 -2
index 2e15318..cf1462f 100644
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 
 	clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-	div = clk_src / max_hz;
+	div = DIV_ROUND_UP(clk_src, max_hz);
 	div = get_cspi_div(div);
 
 	debug("clk %d Hz, div %d, real clk %d Hz\n",
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 	 * The following computation is taken directly from Freescale's code.
 	 */
 	if (clk_src > max_hz) {
-		pre_div = clk_src / max_hz;
+		pre_div = DIV_ROUND_UP(clk_src, max_hz);
 		if (pre_div > 16) {
 			post_div = pre_div / 16;
 			pre_div = 15;
#2 lore raw

PATCH 1/1 mxc_spi: Round up clock divider

Quoted 4 lines · Beno?t Th?baudeau

Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated.

Hi Beno?t,

Quoted 22 lines
Cc Wolfgang Denk <[email protected]>
Cc Stefano Babic <[email protected]>
---
 .../drivers/spi/mxc_spi.c                          |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/spi/mxc_spi.c +1 -1
index 2e15318..cf1462f 100644
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 
 	clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-	div = clk_src / max_hz;
+	div = DIV_ROUND_UP(clk_src, max_hz);
 	div = get_cspi_div(div);
 
 	debug("clk %d Hz, div %d, real clk %d Hz\n",

drivers/spi/mxc_spi.c static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, · line 153

Quoted 8 lines
drivers/spi/mxc_spi.c +1 -1
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 	 * The following computation is taken directly from Freescale's code.
 	 */
 	if (clk_src > max_hz) {
-		pre_div = clk_src / max_hz;
+		pre_div = DIV_ROUND_UP(clk_src, max_hz);
 		if (pre_div > 16) {
 			post_div = pre_div / 16;
 			pre_div = 15;

Agree - do you also get a case where the divider was too low and the SPI does not work or it was only examining the code ?

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#3 lore raw

PATCH 1/1 mxc_spi: Round up clock divider

Hi Stefano,

Quoted 40 lines · Stefano Babic
Quoted 6 lines · Beno?t Th?baudeau

Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.

Hi Beno?t,

Quoted 30 lines
Cc Wolfgang Denk <[email protected]>
Cc Stefano Babic <[email protected]>
---
 .../drivers/spi/mxc_spi.c                          |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
(quoted diff) +0 -0

u-boot-4d3c95f/drivers/spi/mxc_spi.c
index 2e15318..cf1462f 100644

drivers/spi/mxc_spi.c +1 -1
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave
 *mxcs, unsigned int cs,
 
 	clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-	div = clk_src / max_hz;
+	div = DIV_ROUND_UP(clk_src, max_hz);
 	div = get_cspi_div(div);
 
drivers/spi/mxc_spi.c +1 -1
 	debug("clk %d Hz, div %d, real clk %d Hz\n",
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave
 *mxcs, unsigned int cs,
 	 * The following computation is taken directly from Freescale's
 	 code.
 	 */
 	if (clk_src > max_hz) {
-		pre_div = clk_src / max_hz;
+		pre_div = DIV_ROUND_UP(clk_src, max_hz);
Quoted 8 lines

drivers/spi/mxc_spi.c static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, · line 153

Quoted 4 lines
drivers/spi/mxc_spi.c +0 -0
 		if (pre_div > 16) {
drivers/spi/mxc_spi.c +0 -0
 			post_div = pre_div / 16;
 			pre_div = 15;

Agree - do you also get a case where the divider was too low and the SPI
does not work or it was only examining the code ?

It was only examining the code. I had many clock issues on i.MX51, so I made a global review of clock usage that led to that. Most i.MX5 clock functions are broken. I have a series fixing these that I will post next week.

Quoted 4 lines

Best regards,
Stefano Babic

Best regards,
Beno?t

#4 lore raw

PATCH 1/1 mxc_spi: Round up clock divider

In reply to Benoît Thébaudeau
Quoted 26 lines · Beno?t Th?baudeau

Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated.

Cc Wolfgang Denk <[email protected]>
Cc Stefano Babic <[email protected]>
---
 .../drivers/spi/mxc_spi.c                          |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/spi/mxc_spi.c +1 -1
index 2e15318..cf1462f 100644
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 
 	clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-	div = clk_src / max_hz;
+	div = DIV_ROUND_UP(clk_src, max_hz);
 	div = get_cspi_div(div);
 
 	debug("clk %d Hz, div %d, real clk %d Hz\n",

drivers/spi/mxc_spi.c static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, · line 153

Quoted 8 lines
drivers/spi/mxc_spi.c +1 -1
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 	 * The following computation is taken directly from Freescale's code.
 	 */
 	if (clk_src > max_hz) {
-		pre_div = clk_src / max_hz;
+		pre_div = DIV_ROUND_UP(clk_src, max_hz);
 		if (pre_div > 16) {
 			post_div = pre_div / 16;
 			pre_div = 15;

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================