Move imx6q/28/23 clock lookup over to device tree
Subsystems (6)
v2 cover Move imx6q/28/23 clock lookup over to device tree
Change since v1:
* Rewrite of_clk_src_onecell_get() to get the clk using the index provided by device tree and the clks array provided by clock driver. Then we can save that big clock name list in dts and the string matching which is relatively slow.
Shawn Guo (4):
clk: add of_clk_src_onecell_get() support
ARM: imx6q: replace clk_register_clkdev with clock DT lookup
clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
.../devicetree/bindings/clock/imx23-clock.txt | 76 +++++++ .../devicetree/bindings/clock/imx28-clock.txt | 99 +++++++++ .../devicetree/bindings/clock/imx6q-clock.txt | 222 ++++++++++++++++++++ arch/arm/boot/dts/imx23.dtsi | 16 ++- arch/arm/boot/dts/imx28.dtsi | 33 +++- arch/arm/boot/dts/imx6q-sabrelite.dts | 1 + arch/arm/boot/dts/imx6q.dtsi | 73 ++++++- arch/arm/mach-imx/clk-imx6q.c | 44 +---- arch/arm/mach-imx/mach-imx6q.c | 1 - drivers/clk/clk.c | 14 ++ drivers/clk/mxs/clk-imx23.c | 55 +---- drivers/clk/mxs/clk-imx28.c | 113 +--------- include/linux/clk-provider.h | 5 + 13 files changed, 550 insertions(+), 202 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx23-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/imx28-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.txt
Signature · 1 line
1.7.5.4
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
For those SoCs that have hundreds of clock outputs, their clock DT bindings could reasonably define #clock-cells as 1 and require the client device specify the index of the clock it consumes in the cell of its "clocks" phandle.
Add a generic of_clk_src_onecell_get() function for this purpose.
--- drivers/clk/clk.c | 14 ++++++++++++++ include/linux/clk-provider.h | 5 +++++ 2 files changed, 19 insertions(+), 0 deletions(-)
drivers/clk/clk.c +14 -0
@@ -1582,6 +1582,20 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, }EXPORT_SYMBOL_GPL (of_clk_src_simple_get); +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data) +{ +struct clk_onecell_data *clk_data = data; +unsigned int idx = clkspec->args[0 ]; + +if (idx >= clk_data->clk_num) { +pr_err ("%s: invalid clock index %d\n" , __func__, idx); +return ERR_PTR (-EINVAL ); + } + +return clk_data->clks[idx]; +} +EXPORT_SYMBOL_GPL (of_clk_src_onecell_get); +/** * of_clk_add_provider() - Register a clock provider for a node * @np: Device node pointer associated with clock provider
include/linux/clk-provider.h +5 -0
@@ -360,6 +360,11 @@ int of_clk_add_provider(struct device_node *np,void of_clk_del_provider (struct device_node *np);struct clk *of_clk_src_simple_get (struct of_phandle_args *clkspec,void *data); +struct clk_onecell_data { +struct clk **clks; +unsigned int clk_num; +}; +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data);const char *of_clk_get_parent_name (struct device_node *np,int index);void of_clk_init (const struct of_device_id *matches);
Signature · 1 line
1.7.5.4
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoted 9 lines · Shawn Guo
For those SoCs that have hundreds of clock outputs, their clock DT bindings could reasonably define #clock-cells as 1 and require the client device specify the index of the clock it consumes in the cell of its "clocks" phandle.
Add a generic
of_clk_src_onecell_get()function for this purpose.Signed-off-by Shawn Guo <[email protected]>---
I have some reservations about how generic this will end up being, but we have to start somewhere. So, for the series:
Quoted 46 lines
drivers/clk/clk.c | 14 ++++++++++++++ include/linux/clk-provider.h | 5 +++++ 2 files changed, 19 insertions(+), 0 deletions(-)drivers/clk/clk.c +14
-0@@ -1582,6 +1582,20 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, }EXPORT_SYMBOL_GPL (of_clk_src_simple_get); +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data) +{ +struct clk_onecell_data *clk_data = data; +unsigned int idx = clkspec->args[0 ]; + +if (idx >= clk_data->clk_num) { +pr_err ("%s: invalid clock index %d\n" , __func__, idx); +return ERR_PTR (-EINVAL ); + } + +return clk_data->clks[idx]; +} +EXPORT_SYMBOL_GPL (of_clk_src_onecell_get); +/** * of_clk_add_provider() - Register a clock provider for a node * @np: Device node pointer associated with clock provider include/linux/clk-provider.h +5
-0@@ -360,6 +360,11 @@ int of_clk_add_provider(struct device_node *np,void of_clk_del_provider (struct device_node *np);struct clk *of_clk_src_simple_get (struct of_phandle_args *clkspec,void *data); +struct clk_onecell_data { +struct clk **clks; +unsigned int clk_num; +}; +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data);const char *of_clk_get_parent_name (struct device_node *np,int index);void of_clk_init (const struct of_device_id *matches);
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
In reply to Shawn GuoPing, Mike.
Regards,
Shawn
Quoted 57 lines · Shawn Guo
For those SoCs that have hundreds of clock outputs, their clock DT bindings could reasonably define #clock-cells as 1 and require the client device specify the index of the clock it consumes in the cell of its "clocks" phandle.
Add a generic
of_clk_src_onecell_get()function for this purpose.Signed-off-by Shawn Guo <[email protected]>--- drivers/clk/clk.c | 14 ++++++++++++++ include/linux/clk-provider.h | 5 +++++ 2 files changed, 19 insertions(+), 0 deletions(-)drivers/clk/clk.c +14
-0@@ -1582,6 +1582,20 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, }EXPORT_SYMBOL_GPL (of_clk_src_simple_get); +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data) +{ +struct clk_onecell_data *clk_data = data; +unsigned int idx = clkspec->args[0 ]; + +if (idx >= clk_data->clk_num) { +pr_err ("%s: invalid clock index %d\n" , __func__, idx); +return ERR_PTR (-EINVAL ); + } + +return clk_data->clks[idx]; +} +EXPORT_SYMBOL_GPL (of_clk_src_onecell_get); +/** * of_clk_add_provider() - Register a clock provider for a node * @np: Device node pointer associated with clock provider include/linux/clk-provider.h +5
-0@@ -360,6 +360,11 @@ int of_clk_add_provider(struct device_node *np,void of_clk_del_provider (struct device_node *np);struct clk *of_clk_src_simple_get (struct of_phandle_args *clkspec,void *data); +struct clk_onecell_data { +struct clk **clks; +unsigned int clk_num; +}; +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data);const char *of_clk_get_parent_name (struct device_node *np,int index);void of_clk_init (const struct of_device_id *matches);Signature · 1 line
1.7.5.4
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoting Shawn Guo (2012-08-30 23:41:27)
Quoted 2 lines
Ping, Mike.
Hi Shawn,
Do you want me to take everything including patch #2? I'm OK with the series but want to make sure it won't cause too much problem for you if the DTS and arch/arm changes go through my tree.
Regards,
Mike
Quoted 61 lines
Regards,
ShawnQuoted 57 lines · Shawn Guo
For those SoCs that have hundreds of clock outputs, their clock DT bindings could reasonably define #clock-cells as 1 and require the client device specify the index of the clock it consumes in the cell of its "clocks" phandle.
Add a generic
of_clk_src_onecell_get()function for this purpose.Signed-off-by Shawn Guo <[email protected]>--- drivers/clk/clk.c | 14 ++++++++++++++ include/linux/clk-provider.h | 5 +++++ 2 files changed, 19 insertions(+), 0 deletions(-)drivers/clk/clk.c +14
-0@@ -1582,6 +1582,20 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, }EXPORT_SYMBOL_GPL (of_clk_src_simple_get); +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data) +{ +struct clk_onecell_data *clk_data = data; +unsigned int idx = clkspec->args[0 ]; + +if (idx >= clk_data->clk_num) { +pr_err ("%s: invalid clock index %d\n" , __func__, idx); +return ERR_PTR (-EINVAL ); + } + +return clk_data->clks[idx]; +} +EXPORT_SYMBOL_GPL (of_clk_src_onecell_get); +/** * of_clk_add_provider() - Register a clock provider for a node * @np: Device node pointer associated with clock provider include/linux/clk-provider.h +5
-0@@ -360,6 +360,11 @@ int of_clk_add_provider(struct device_node *np,void of_clk_del_provider (struct device_node *np);struct clk *of_clk_src_simple_get (struct of_phandle_args *clkspec,void *data); +struct clk_onecell_data { +struct clk **clks; +unsigned int clk_num; +}; +struct clk *of_clk_src_onecell_get (struct of_phandle_args *clkspec,void *data);const char *of_clk_get_parent_name (struct device_node *np,int index);void of_clk_init (const struct of_device_id *matches);Signature · 1 line
1.7.5.4
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoted 10 lines · Mike Turquette
Quoting Shawn Guo (2012-08-30 23:41:27)
Quoted 2 lines
Ping, Mike.
Hi Shawn,
Do you want me to take everything including patch #2? I'm OK with the series but want to make sure it won't cause too much problem for you if the DTS and
arch/armchanges go through my tree.
It will cause conflicts to have those arch/arm changes to go through your tree, so I expect you only take patch #1 and ensure your branch is stable. I will ask arm-soc people to pull in your branch as dependency, and then I can have other patches go via arm-soc tree.
Signature · 2 lines
Regards, Shawn
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoting Shawn Guo (2012-09-06 17:26:20)
Quoted 7 lines · Mike Turquette
Quoted 6 lines
Quoting Shawn Guo (2012-08-30 23:41:27)
Quoted 2 lines
Ping, Mike.
Hi Shawn,
Quoted 9 lines
Quoted 4 lines
Do you want me to take everything including patch #2? I'm OK with the series but want to make sure it won't cause too much problem for you if the DTS and
arch/armchanges go through my tree.It will cause conflicts to have those
arch/armchanges to go through your tree, so I expect you only take patch #1 and ensure your branch is stable. I will ask arm-soc people to pull in your branch as dependency, and then I can have other patches go via arm-soc tree.
Done. I've taken patch #1 "clk: add of_clk_src_onecell_get() support" into clk-next.
Thanks,
Mike
Quoted 8 lines
Signature · 7 lines
Regards, Shawn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoted 3 lines · Mike Turquette
Done. I've taken patch #1 "clk: add
of_clk_src_onecell_get()support" into clk-next.
Thanks, Mike.
I'm still waiting for a stable branch like clk-3.7, which I can ask arm-soc folks to pull as a dependency. I have some imx and mxs 3.7 material currently pending on this.
Signature · 2 lines
Regards, Shawn
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoting Shawn Guo (2012-09-09 23:25:43)
Quoted 10 lines · Mike Turquette
Quoted 3 lines
Done. I've taken patch #1 "clk: add
of_clk_src_onecell_get()support" into clk-next.Thanks, Mike.
I'm still waiting for a stable branch like clk-3.7, which I can ask arm-soc folks to pull as a dependency. I have some imx and mxs 3.7 material currently pending on this.
Hi Shawn,
I didn't realize you were waiting on a stable branch. It seemed that no one used my clk-3.6 stable branch during the last cycle so I got lazy and decided not to have a clk-3.7 this time around. However my current clk-next HEAD is stable so creating one is easy enough... done!
Now that I have a clk-3.7 stable branch I'll plan on merging clk-next into clk-3.7 periodically as stability dictates.
Arnd, how does the "arm-soc dependency" thing work? Do I still issue a pull request to Linus for 3.7?
Regards,
Mike
Quoted 8 lines
Signature · 7 lines
Regards, Shawn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH v2 1/4 clk: add of_clk_src_onecell_get() support
Quoted 5 lines · Mike Turquette
I didn't realize you were waiting on a stable branch. It seemed that no one used my clk-3.6 stable branch during the last cycle so I got lazy and decided not to have a clk-3.7 this time around. However my current clk-next HEAD is stable so creating one is easy enough... done!
Great, thanks.
Quoted 6 lines
Now that I have a clk-3.7 stable branch I'll plan on merging clk-next into clk-3.7 periodically as stability dictates.
Arnd, how does the "arm-soc dependency" thing work? Do I still issue a pull request to Linus for 3.7?
Yes, you will still send clk-3.7 pull request to Linus. There is nothing changed on clk tree process. The only thing you need to ensure is that clk-3.7 is stable.
When I send imx and mxs dt branches to Arnd and Olof, I will tell them that the branches get a dependency on clk-3.7. They will pull your branch into arm-soc as dependency/clk-3.7 (something like that), and build arm-soc/next on top of dependency/clk-3.7 and imx/mxs dt branches. During merge window, none of the dependency/* branches will be sent by Arnd and Olof. Instead, they will keep an eye on whether those branches have been merged to Linus' tree, and will only send imx/mxs dt branches to Linus after clk-3.7 gets merged for this example.
Signature · 2 lines
Regards, Shawn
PATCH v2 2/4 ARM: imx6q: replace clk_register_clkdev with clock DT lookup
In reply to Shawn GuoIt really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel.
--- .../devicetree/bindings/clock/imx6q-clock.txt | 222 ++++++++++++++++++++ arch/arm/boot/dts/imx6q-sabrelite.dts | 1 + arch/arm/boot/dts/imx6q.dtsi | 73 ++++++- arch/arm/mach-imx/clk-imx6q.c | 44 +---- arch/arm/mach-imx/mach-imx6q.c | 1 - 5 files changed, 291 insertions(+), 50 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.txt
Documentation/devicetree/bindings/clock/imx6q-clock.txt new file +222 -0
@@ -0,0 +1,222 @@ +* Clock bindings for Freescale i.MX6 Quad + +Required properties: +- compatible: Should be "fsl,imx6q-ccm" +- reg: Address and length of the register set +- interrupts: Should contain CCM interrupt +- #clock-cells: Should be <1> + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. The following is a full list of i.MX6Q +clocks and IDs. + + Clock ID + --------------------------- + dummy 0 + ckil 1 + ckih 2 + osc 3 + pll2_pfd0_352m 4 + pll2_pfd1_594m 5 + pll2_pfd2_396m 6 + pll3_pfd0_720m 7 + pll3_pfd1_540m 8 + pll3_pfd2_508m 9 + pll3_pfd3_454m 10 + pll2_198m 11 + pll3_120m 12 + pll3_80m 13 + pll3_60m 14 + twd 15 + step 16 + pll1_sw 17 + periph_pre 18 + periph2_pre 19 + periph_clk2_sel 20 + periph2_clk2_sel 21 + axi_sel 22 + esai_sel 23 + asrc_sel 24 + spdif_sel 25 + gpu2d_axi 26 + gpu3d_axi 27 + gpu2d_core_sel 28 + gpu3d_core_sel 29 + gpu3d_shader_sel 30 + ipu1_sel 31 + ipu2_sel 32 + ldb_di0_sel 33 + ldb_di1_sel 34 + ipu1_di0_pre_sel 35 + ipu1_di1_pre_sel 36 + ipu2_di0_pre_sel 37 + ipu2_di1_pre_sel 38 + ipu1_di0_sel 39 + ipu1_di1_sel 40 + ipu2_di0_sel 41 + ipu2_di1_sel 42 + hsi_tx_sel 43 + pcie_axi_sel 44 + ssi1_sel 45 + ssi2_sel 46 + ssi3_sel 47 + usdhc1_sel 48 + usdhc2_sel 49 + usdhc3_sel 50 + usdhc4_sel 51 + enfc_sel 52 + emi_sel 53 + emi_slow_sel 54 + vdo_axi_sel 55 + vpu_axi_sel 56 + cko1_sel 57 + periph 58 + periph2 59 + periph_clk2 60 + periph2_clk2 61 + ipg 62 + ipg_per 63 + esai_pred 64 + esai_podf 65 + asrc_pred 66 + asrc_podf 67 + spdif_pred 68 + spdif_podf 69 + can_root 70 + ecspi_root 71 + gpu2d_core_podf 72 + gpu3d_core_podf 73 + gpu3d_shader 74 + ipu1_podf 75 + ipu2_podf 76 + ldb_di0_podf 77 + ldb_di1_podf 78 + ipu1_di0_pre 79 + ipu1_di1_pre 80 + ipu2_di0_pre 81 + ipu2_di1_pre 82 + hsi_tx_podf 83 + ssi1_pred 84 + ssi1_podf 85 + ssi2_pred 86 + ssi2_podf 87 + ssi3_pred 88 + ssi3_podf 89 + uart_serial_podf 90 + usdhc1_podf 91 + usdhc2_podf 92 + usdhc3_podf 93 + usdhc4_podf 94 + enfc_pred 95 + enfc_podf 96 + emi_podf 97 + emi_slow_podf 98 + vpu_axi_podf 99 + cko1_podf 100 + axi 101 + mmdc_ch0_axi_podf 102 + mmdc_ch1_axi_podf 103 + arm 104 + ahb 105 + apbh_dma 106 + asrc 107 + can1_ipg 108 + can1_serial 109 + can2_ipg 110 + can2_serial 111 + ecspi1 112 + ecspi2 113 + ecspi3 114 + ecspi4 115 + ecspi5 116 + enet 117 + esai 118 + gpt_ipg 119 + gpt_ipg_per 120 + gpu2d_core 121 + gpu3d_core 122 + hdmi_iahb 123 + hdmi_isfr 124 + i2c1 125 + i2c2 126 + i2c3 127 + iim 128 + enfc 129 + ipu1 130 + ipu1_di0 131 + ipu1_di1 132 + ipu2 133 + ipu2_di0 134 + ldb_di0 135 + ldb_di1 136 + ipu2_di1 137 + hsi_tx 138 + mlb 139 + mmdc_ch0_axi 140 + mmdc_ch1_axi 141 + ocram 142 + openvg_axi 143 + pcie_axi 144 + pwm1 145 + pwm2 146 + pwm3 147 + pwm4 148 + per1_bch 149 + gpmi_bch_apb 150 + gpmi_bch 151 + gpmi_io 152 + gpmi_apb 153 + sata 154 + sdma 155 + spba 156 + ssi1 157 + ssi2 158 + ssi3 159 + uart_ipg 160 + uart_serial 161 + usboh3 162 + usdhc1 163 + usdhc2 164 + usdhc3 165 + usdhc4 166 + vdo_axi 167 + vpu_axi 168 + cko1 169 + pll1_sys 170 + pll2_bus 171 + pll3_usb_otg 172 + pll4_audio 173 + pll5_video 174 + pll6_mlb 175 + pll7_usb_host 176 + pll8_enet 177 + ssi1_ipg 178 + ssi2_ipg 179 + ssi3_ipg 180 + rom 181 + usbphy1 182 + usbphy2 183 + ldb_di0_div_3_5 184 + ldb_di1_div_3_5 185 + +Examples: + +clks: ccm at 020c4000 { + compatible = "fsl,imx6q-ccm"; + reg = <0x020c4000 0x4000>; + interrupts = <0 87 0x04 0 88 0x04>; + #clock-cells = <1>; + clock-output-names = ... + "uart_ipg", + "uart_serial", + ...; +}; + +uart1: serial at 02020000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x02020000 0x4000>; + interrupts = <0 26 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; + status = "disabled"; +};
arch/arm/boot/dts/imx6q-sabrelite.dts +1 -0
@@ -111,6 +111,7 @@ codec: sgtl5000 at 0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + clocks = <&clks 169>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; };
arch/arm/boot/dts/imx6q.dtsi +63 -10
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arch/arm/mach-imx/clk-imx6q.c +5 -39
59 lines not on this page · raw message
arch/arm/mach-imx/mach-imx6q.c +0 -1
@@ -100,7 +100,6 @@ static void __init imx6q_sabrelite_cko1_setup(void)clk_set_parent (cko1_sel, ahb); rate =clk_round_rate (cko1,16000000 );clk_set_rate (cko1, rate); -clk_register_clkdev (cko1,NULL ,"0-000a" ); put_clk:if (!IS_ERR (cko1_sel))clk_put (cko1_sel);
Signature · 1 line
1.7.5.4
PATCH v2 3/4 clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
In reply to Shawn GuoIt really becomes a maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx28 client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel.
--- .../devicetree/bindings/clock/imx28-clock.txt | 99 +++++++++++++++++ arch/arm/boot/dts/imx28.dtsi | 35 ++++++- drivers/clk/mxs/clk-imx28.c | 113 ++------------------ 3 files changed, 142 insertions(+), 105 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx28-clock.txt
Documentation/devicetree/bindings/clock/imx28-clock.txt new file +99 -0
@@ -0,0 +1,99 @@ +* Clock bindings for Freescale i.MX28 + +Required properties: +- compatible: Should be "fsl,imx28-clkctrl" +- reg: Address and length of the register set +- #clock-cells: Should be <1> + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. The following is a full list of i.MX28 +clocks and IDs. + + Clock ID + ------------------ + ref_xtal 0 + pll0 1 + pll1 2 + pll2 3 + ref_cpu 4 + ref_emi 5 + ref_io0 6 + ref_io1 7 + ref_pix 8 + ref_hsadc 9 + ref_gpmi 10 + saif0_sel 11 + saif1_sel 12 + gpmi_sel 13 + ssp0_sel 14 + ssp1_sel 15 + ssp2_sel 16 + ssp3_sel 17 + emi_sel 18 + etm_sel 19 + lcdif_sel 20 + cpu 21 + ptp_sel 22 + cpu_pll 23 + cpu_xtal 24 + hbus 25 + xbus 26 + ssp0_div 27 + ssp1_div 28 + ssp2_div 29 + ssp3_div 30 + gpmi_div 31 + emi_pll 32 + emi_xtal 33 + lcdif_div 34 + etm_div 35 + ptp 36 + saif0_div 37 + saif1_div 38 + clk32k_div 39 + rtc 40 + lradc 41 + spdif_div 42 + clk32k 43 + pwm 44 + uart 45 + ssp0 46 + ssp1 47 + ssp2 48 + ssp3 49 + gpmi 50 + spdif 51 + emi 52 + saif0 53 + saif1 54 + lcdif 55 + etm 56 + fec 57 + can0 58 + can1 59 + usb0 60 + usb1 61 + usb0_pwr 62 + usb1_pwr 63 + enet_out 64 + +Examples: + +clks: clkctrl at 80040000 { + compatible = "fsl,imx28-clkctrl"; + reg = <0x80040000 0x2000>; + #clock-cells = <1>; + clock-output-names = + ... + "uart", /* 45 */ + ... + "end_of_list"; +}; + +auart0: serial at 8006a000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; + reg = <0x8006a000 0x2000>; + interrupts = <112 70 71>; + clocks = <&clks 45>; + status = "disabled"; +};
arch/arm/boot/dts/imx28.dtsi +33 -2
@@ -65,6 +65,7 @@ dma-apbh at 80004000 { compatible = "fsl,imx28-dma-apbh"; reg = <0x80004000 0x2000>; + clocks = <&clks 25>; }; perfmon at 80006000 {
@@ -81,6 +82,7 @@ reg-names = "gpmi-nand", "bch"; interrupts = <88>, <41>; interrupt-names = "gpmi-dma", "bch"; + clocks = <&clks 50>; fsl,gpmi-dma-channel = <4>; status = "disabled"; };
@@ -88,6 +90,7 @@ ssp0: ssp at 80010000 { reg = <0x80010000 0x2000>; interrupts = <96 82>; + clocks = <&clks 46>; fsl,ssp-dma-channel = <0>; status = "disabled"; };
@@ -95,6 +98,7 @@ ssp1: ssp at 80012000 { reg = <0x80012000 0x2000>; interrupts = <97 83>; + clocks = <&clks 47>; fsl,ssp-dma-channel = <1>; status = "disabled"; };
@@ -102,6 +106,7 @@ ssp2: ssp at 80014000 { reg = <0x80014000 0x2000>; interrupts = <98 84>; + clocks = <&clks 48>; fsl,ssp-dma-channel = <2>; status = "disabled"; };
@@ -109,6 +114,7 @@ ssp3: ssp at 80016000 { reg = <0x80016000 0x2000>; interrupts = <99 85>; + clocks = <&clks 49>; fsl,ssp-dma-channel = <3>; status = "disabled"; };
@@ -523,6 +529,7 @@ dma-apbx at 80024000 { compatible = "fsl,imx28-dma-apbx"; reg = <0x80024000 0x2000>; + clocks = <&clks 26>; }; dcp at 80028000 {
@@ -551,6 +558,7 @@ compatible = "fsl,imx28-lcdif"; reg = <0x80030000 0x2000>; interrupts = <38 86>; + clocks = <&clks 55>; status = "disabled"; };
@@ -558,6 +566,8 @@ compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; reg = <0x80032000 0x2000>; interrupts = <8>; + clocks = <&clks 58>, <&clks 58>; + clock-names = "ipg", "per"; status = "disabled"; };
@@ -565,6 +575,8 @@ compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; reg = <0x80034000 0x2000>; interrupts = <9>; + clocks = <&clks 59>, <&clks 59>; + clock-names = "ipg", "per"; status = "disabled"; };
@@ -611,15 +623,17 @@ reg = <0x80040000 0x40000>; ranges; - clkctl at 80040000 { + clks: clkctrl at 80040000 { + compatible = "fsl,imx28-clkctrl"; reg = <0x80040000 0x2000>; - status = "disabled"; + #clock-cells = <1>; }; saif0: saif at 80042000 { compatible = "fsl,imx28-saif"; reg = <0x80042000 0x2000>; interrupts = <59 80>; + clocks = <&clks 53>; fsl,saif-dma-channel = <4>; status = "disabled"; };
@@ -633,6 +647,7 @@ compatible = "fsl,imx28-saif"; reg = <0x80046000 0x2000>; interrupts = <58 81>; + clocks = <&clks 54>; fsl,saif-dma-channel = <5>; status = "disabled"; };
@@ -677,6 +692,7 @@ pwm: pwm at 80064000 { compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; reg = <0x80064000 0x2000>; + clocks = <&clks 44>; #pwm-cells = <2>; fsl,pwm-number = <8>; status = "disabled";
@@ -691,6 +707,7 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006a000 0x2000>; interrupts = <112 70 71>; + clocks = <&clks 45>; status = "disabled"; };
@@ -698,6 +715,7 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; interrupts = <113 72 73>; + clocks = <&clks 45>; status = "disabled"; };
@@ -705,6 +723,7 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006e000 0x2000>; interrupts = <114 74 75>; + clocks = <&clks 45>; status = "disabled"; };
@@ -712,6 +731,7 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x80070000 0x2000>; interrupts = <115 76 77>; + clocks = <&clks 45>; status = "disabled"; };
@@ -719,6 +739,7 @@ compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x80072000 0x2000>; interrupts = <116 78 79>; + clocks = <&clks 45>; status = "disabled"; };
@@ -726,18 +747,22 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x80074000 0x1000>; interrupts = <47>; + clocks = <&clks 45>, <&clks 26>; + clock-names = "uart", "apb_pclk"; status = "disabled"; }; usbphy0: usbphy at 8007c000 { compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy"; reg = <0x8007c000 0x2000>; + clocks = <&clks 62>; status = "disabled"; }; usbphy1: usbphy at 8007e000 { compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy"; reg = <0x8007e000 0x2000>; + clocks = <&clks 63>; status = "disabled"; }; };
@@ -754,6 +779,7 @@ compatible = "fsl,imx28-usb", "fsl,imx27-usb"; reg = <0x80080000 0x10000>; interrupts = <93>; + clocks = <&clks 60>; fsl,usbphy = <&usbphy0>; status = "disabled"; };
@@ -762,6 +788,7 @@ compatible = "fsl,imx28-usb", "fsl,imx27-usb"; reg = <0x80090000 0x10000>; interrupts = <92>; + clocks = <&clks 61>; fsl,usbphy = <&usbphy1>; status = "disabled"; };
@@ -775,6 +802,8 @@ compatible = "fsl,imx28-fec"; reg = <0x800f0000 0x4000>; interrupts = <101>; + clocks = <&clks 57>, <&clks 57>; + clock-names = "ipg", "ahb"; status = "disabled"; };
@@ -782,6 +811,8 @@ compatible = "fsl,imx28-fec"; reg = <0x800f4000 0x4000>; interrupts = <102>; + clocks = <&clks 57>, <&clks 57>; + clock-names = "ipg", "ahb"; status = "disabled"; };
drivers/clk/mxs/clk-imx28.c +10 -103
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1.7.5.4
PATCH v2 4/4 clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
In reply to Shawn GuoIt really becomes a maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx23 client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel.
--- .../devicetree/bindings/clock/imx23-clock.txt | 76 ++++++++++++++++++++ arch/arm/boot/dts/imx23.dtsi | 16 ++++- drivers/clk/mxs/clk-imx23.c | 55 +++------------ 3 files changed, 100 insertions(+), 47 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx23-clock.txt
Documentation/devicetree/bindings/clock/imx23-clock.txt new file +76 -0
@@ -0,0 +1,76 @@ +* Clock bindings for Freescale i.MX23 + +Required properties: +- compatible: Should be "fsl,imx23-clkctrl" +- reg: Address and length of the register set +- #clock-cells: Should be <1> + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. The following is a full list of i.MX23 +clocks and IDs. + + Clock ID + ------------------ + ref_xtal 0 + pll 1 + ref_cpu 2 + ref_emi 3 + ref_pix 4 + ref_io 5 + saif_sel 6 + lcdif_sel 7 + gpmi_sel 8 + ssp_sel 9 + emi_sel 10 + cpu 11 + etm_sel 12 + cpu_pll 13 + cpu_xtal 14 + hbus 15 + xbus 16 + lcdif_div 17 + ssp_div 18 + gpmi_div 19 + emi_pll 20 + emi_xtal 21 + etm_div 22 + saif_div 23 + clk32k_div 24 + rtc 25 + adc 26 + spdif_div 27 + clk32k 28 + dri 29 + pwm 30 + filt 31 + uart 32 + ssp 33 + gpmi 34 + spdif 35 + emi 36 + saif 37 + lcdif 38 + etm 39 + usb 40 + usb_pwr 41 + +Examples: + +clks: clkctrl at 80040000 { + compatible = "fsl,imx23-clkctrl"; + reg = <0x80040000 0x2000>; + #clock-cells = <1>; + clock-output-names = + ... + "uart", /* 32 */ + ... + "end_of_list"; +}; + +auart0: serial at 8006c000 { + compatible = "fsl,imx23-auart"; + reg = <0x8006c000 0x2000>; + interrupts = <24 25 23>; + clocks = <&clks 32>; + status = "disabled"; +};
arch/arm/boot/dts/imx23.dtsi +14 -2
@@ -52,6 +52,7 @@ dma-apbh at 80004000 { compatible = "fsl,imx23-dma-apbh"; reg = <0x80004000 0x2000>; + clocks = <&clks 15>; }; ecc at 80008000 {
@@ -67,6 +68,7 @@ reg-names = "gpmi-nand", "bch"; interrupts = <13>, <56>; interrupt-names = "gpmi-dma", "bch"; + clocks = <&clks 34>; fsl,gpmi-dma-channel = <4>; status = "disabled"; };
@@ -74,6 +76,7 @@ ssp0: ssp at 80010000 { reg = <0x80010000 0x2000>; interrupts = <15 14>; + clocks = <&clks 33>; fsl,ssp-dma-channel = <1>; status = "disabled"; };
@@ -280,6 +283,7 @@ dma-apbx at 80024000 { compatible = "fsl,imx23-dma-apbx"; reg = <0x80024000 0x2000>; + clocks = <&clks 16>; }; dcp at 80028000 {
@@ -306,12 +310,14 @@ compatible = "fsl,imx23-lcdif"; reg = <0x80030000 2000>; interrupts = <46 45>; + clocks = <&clks 38>; status = "disabled"; }; ssp1: ssp at 80034000 { reg = <0x80034000 0x2000>; interrupts = <2 20>; + clocks = <&clks 33>; fsl,ssp-dma-channel = <2>; status = "disabled"; };
@@ -329,9 +335,10 @@ reg = <0x80040000 0x40000>; ranges; - clkctl at 80040000 { + clks: clkctrl at 80040000 { + compatible = "fsl,imx23-clkctrl"; reg = <0x80040000 0x2000>; - status = "disabled"; + #clock-cells = <1>; }; saif0: saif at 80042000 {
@@ -383,6 +390,7 @@ pwm: pwm at 80064000 { compatible = "fsl,imx23-pwm"; reg = <0x80064000 0x2000>; + clocks = <&clks 30>; #pwm-cells = <2>; fsl,pwm-number = <5>; status = "disabled";
@@ -397,6 +405,7 @@ compatible = "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; interrupts = <24 25 23>; + clocks = <&clks 32>; status = "disabled"; };
@@ -404,6 +413,7 @@ compatible = "fsl,imx23-auart"; reg = <0x8006e000 0x2000>; interrupts = <59 60 58>; + clocks = <&clks 32>; status = "disabled"; };
@@ -411,6 +421,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x80070000 0x2000>; interrupts = <0>; + clocks = <&clks 32>, <&clks 16>; + clock-names = "uart", "apb_pclk"; status = "disabled"; };
drivers/clk/mxs/clk-imx23.c +10 -45
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1.7.5.4