Skip to contentSkip to conversation

gpio: add gpio api support to mx27 (v2)

PATCH New Philippe Reynes 2 participants 3 messages Aug 6, 2012 – Aug 23, 2012

Subsystems (3)
Arm (32-bit) Arm i.MX and Layerscape GPIO
lore
Share & tools
lore

Philippe Reynes

author
#0 lore raw

PATCH 1/2 gpio: add gpio api support to mx27 (v2)

There is a little change on gpio_get_value because on mx27 the register to read is ssr and not dr.

Signed-off-by Philippe Reynes <[email protected]>
---
 arch/arm/cpu/arm926ejs/mx27/generic.c     |   11 +++---
 arch/arm/include/asm/arch-mx27/gpio.h     |   55 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx27/imx-regs.h |   30 ++++------------
 drivers/gpio/mxc_gpio.c                   |   12 +++++--
 4 files changed, 77 insertions(+), 31 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
arch/arm/cpu/arm926ejs/mx27/generic.c +6 -5
index 65c4813..41bb84b 100644
@@ -24,6 +24,7 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
 #ifdef CONFIG_MXC_MMC
 #include <asm/arch/mxcmmc.h>
 #endif

@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
 
 void imx_gpio_mode(int gpio_mode)
 {
-	struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+	struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
 	unsigned int pin = gpio_mode & GPIO_PIN_MASK;
 	unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
 	unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;

@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
 
 	/* Data direction */
 	if (gpio_mode & GPIO_OUT) {
-		writel(readl(&regs->port[port].ddir) | 1 << pin,
-				&regs->port[port].ddir);
+		writel(readl(&regs->port[port].gpio_dir) | 1 << pin,
+				&regs->port[port].gpio_dir);
 	} else {
-		writel(readl(&regs->port[port].ddir) & ~(1 << pin),
-				&regs->port[port].ddir);
+		writel(readl(&regs->port[port].gpio_dir) & ~(1 << pin),
+				&regs->port[port].gpio_dir);
 	}
 
 	/* Primary / alternate function */
arch/arm/include/asm/arch-mx27/gpio.h new file +55 -0

55 lines not on this page · raw message

arch/arm/include/asm/arch-mx27/imx-regs.h +7 -23
index ced5b2a..4035d2b 100644
@@ -162,29 +162,6 @@ struct gpt_regs {
 #define PORTE 4
 #define PORTF 5
 
-struct gpio_regs {
-	struct {
-		u32 ddir;
-		u32 ocr1;
-		u32 ocr2;
-		u32 iconfa1;
-		u32 iconfa2;
-		u32 iconfb1;
-		u32 iconfb2;
-		u32 dr;
-		u32 gius;
-		u32 ssr;
-		u32 icr1;
-		u32 icr2;
-		u32 imr;
-		u32 isr;
-		u32 gpr;
-		u32 swr;
-		u32 puen;
-		u32 res[0x2f];
-	} port[6];
-};
-
 /* IIM Control Registers */
 struct iim_regs {
 	u32 iim_stat;

@@ -471,6 +448,13 @@ struct fuse_bank0_regs {
 #define TSTAT_CAPT	(1 << 1)	/* Capture event */
 #define TSTAT_COMP	1		/* Compare event */
 
+#define GPIO1_BASE_ADDR 0x10015000
+#define GPIO2_BASE_ADDR 0x10015100
+#define GPIO3_BASE_ADDR 0x10015200
+#define GPIO4_BASE_ADDR 0x10015300
+#define GPIO5_BASE_ADDR 0x10015400
+#define GPIO6_BASE_ADDR 0x10015500
+
 #define GPIO_PIN_MASK	0x1f
 
 #define GPIO_PORT_SHIFT	5
drivers/gpio/mxc_gpio.c +9 -3
index 6615535..4be27af 100644
@@ -41,13 +41,15 @@ static unsigned long gpio_ports[] = {
 	[0] = GPIO1_BASE_ADDR,
 	[1] = GPIO2_BASE_ADDR,
 	[2] = GPIO3_BASE_ADDR,
-#if defined(CONFIG_MX25) || defined(CONFIG_MX51) || defined(CONFIG_MX53) || \
-		defined(CONFIG_MX6Q)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
+		defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
 	[3] = GPIO4_BASE_ADDR,
 #endif
-#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
+#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
 	[4] = GPIO5_BASE_ADDR,
 	[5] = GPIO6_BASE_ADDR,
+#endif
+#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
 	[6] = GPIO7_BASE_ADDR,
 #endif
 };

@@ -116,7 +118,11 @@ int gpio_get_value(unsigned gpio)
 
 	regs = (struct gpio_regs *)gpio_ports[port];
 
+#ifndef CONFIG_MX27
 	val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
+#else
+	val = (readl(&regs->ssr) >> gpio) & 0x01;
+#endif
 
 	return val;
 }
Signature · 1 line
1.7.4.4
author
#1 lore raw

PATCH 2/2 imx27lite: update with gpio api change (v3)

Signed-off-by Philippe Reynes <[email protected]>
---
 board/logicpd/imx27lite/imx27lite.c |    5 ++---
 include/configs/imx27lite-common.h  |    5 +++++
 2 files changed, 7 insertions(+), 3 deletions(-)
board/logicpd/imx27lite/imx27lite.c +2 -3
index 8a5015c..b38e5ab 100644
@@ -23,12 +23,12 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/gpio.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
 #if defined(CONFIG_SYS_NAND_LARGEPAGE)
 	struct system_control_regs *sc_regs =
 		(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;

@@ -43,8 +43,7 @@ int board_init(void)
 #ifdef CONFIG_FEC_MXC
 	mx27_fec_init_pins();
 	imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
-	writel(readl(&regs->port[PORTC].dr) | (1 << 31),
-				&regs->port[PORTC].dr);
+	gpio_set_value(GPIO_PORTC | 31, 1);
 #endif
 #ifdef CONFIG_MXC_MMC
 #if defined(CONFIG_MAGNESIUM)
include/configs/imx27lite-common.h +5 -0
index 7d2876b..2e79a9e 100644
@@ -162,6 +162,11 @@
 #define CONFIG_DOS_PARTITION
 
 /*
+ * GPIO
+ */
+#define CONFIG_MXC_GPIO
+
+/*
  * MTD partitions
  */
 #define CONFIG_CMD_MTDPARTS
Signature · 1 line
1.7.4.4
#2 lore raw

PATCH 1/2 gpio: add gpio api support to mx27 (v2)

In reply to Philippe Reynes
Quoted 5 lines · Philippe Reynes

There is a little change on gpio_get_value because on mx27 the register to read is ssr and not dr.

Signed-off-by Philippe Reynes <[email protected]>

---

Hi Philippe,

Quoted 32 lines
 arch/arm/cpu/arm926ejs/mx27/generic.c     |   11 +++---
 arch/arm/include/asm/arch-mx27/gpio.h     |   55 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx27/imx-regs.h |   30 ++++------------
 drivers/gpio/mxc_gpio.c                   |   12 +++++--
 4 files changed, 77 insertions(+), 31 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h
arch/arm/cpu/arm926ejs/mx27/generic.c +2 -1
index 65c4813..41bb84b 100644
@@ -24,6 +24,7 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
 #ifdef CONFIG_MXC_MMC
 #include <asm/arch/mxcmmc.h>
 #endif

@@ -209,7 +210,7 @@ int cpu_mmc_init(bd_t *bis)
 
 void imx_gpio_mode(int gpio_mode)
 {
-	struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+	struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
 	unsigned int pin = gpio_mode & GPIO_PIN_MASK;
 	unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
 	unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;

@@ -228,11 +229,11 @@ void imx_gpio_mode(int gpio_mode)
 
 	/* Data direction */
 	if (gpio_mode & GPIO_OUT) {

arch/arm/cpu/arm926ejs/mx27/generic.c void imx_gpio_mode(int gpio_mode) · line 237

Quoted 10 lines
arch/arm/cpu/arm926ejs/mx27/generic.c +4 -4
-		writel(readl(&regs->port[port].ddir) | 1 << pin,
-				&regs->port[port].ddir);
+		writel(readl(&regs->port[port].gpio_dir) | 1 << pin,
+				&regs->port[port].gpio_dir);
 	} else {
-		writel(readl(&regs->port[port].ddir) & ~(1 << pin),
-				&regs->port[port].ddir);
+		writel(readl(&regs->port[port].gpio_dir) & ~(1 << pin),
+				&regs->port[port].gpio_dir);
 	}

This is strange, because it does not make use of gpio_direction_output(). However, if we use it, generic.c depends on CONFIG_MXC_GPIO. Ok

arch/arm/cpu/arm926ejs/mx27/generic.c void imx_gpio_mode(int gpio_mode)

Quoted 7 lines
arch/arm/cpu/arm926ejs/mx27/generic.c +4 -0
+#ifndef CONFIG_MX27
 	val = (readl(&regs->gpio_dr) >> gpio) & 0x01;
+#else
+	val = (readl(&regs->ssr) >> gpio) & 0x01;
+#endif

A recent patch uses psr on the other SOC instead of dr to read directly the pad status instead of the internal shadow register. If you rename your ssr into gpio_psr we do not need this #ifdef.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================