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efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

PATCH Superseded Matt Sealey 4 participants 6 messages Aug 23, 2012 – Aug 24, 2012 Arm i.MX and Layerscape

v1 of 2 Superseded Latest is v2 →

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#0 lore raw

PATCH 1/1 efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

We have no idea where the DCD was derived from for Smartbook support, but they differ from the Smarttop settings, MX51EVK settings and certainly don't correspond to any shipped or development version of U-Boot that Genesi has ever had on any Smartbook.

So, copy the calibrated, verified settings from the U-Boot as shipped with every Smartbook since retail production. Remove those few settings that just set the POR defaults which have already been confirmed for the previous Smarttop DCD change.

One of the lines is specific to i.MX51 TO3 designs and therefore TO2 Smartbooks will possibly not work so reliably with this new DCD; that said, TO2 Smartbooks basically don't exist at retail and the number of units in the world is less than 5 (3 of which are at the Genesi office or owned by Genesi employees).

Many hours of memory testing confirms the new settings are stable.

Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>
---
 board/genesi/mx51_efikamx/imximage_sb.cfg |   46 +++++++++++++----------------
 1 file changed, 20 insertions(+), 26 deletions(-)
board/genesi/mx51_efikamx/imximage_sb.cfg +20 -26
index 878146f..57ccad0 100644
@@ -1,5 +1,7 @@
 #
+# Copyright (C) 2009 Pegatron Corporation
 # Copyright (C) 2010 Marek Vasut <[email protected]>
+# Copyright (C) 2009-2012 Genesi USA, Inc.
 #
 # BASED ON: imx51evk
 #
@@ -43,30 +45,22 @@ BOOT_FROM	spi
 #	Address	  absolute address of the register
 #	value	  value to be stored in the register
 
-# Setting IOMUXC
-DATA 4 0x73fa88a0 0x200
-DATA 4 0x73fa850c 0x20c3
-DATA 4 0x73fa8510 0x20c3
-DATA 4 0x73fa883c 0x2
-DATA 4 0x73fa8848 0x2
-DATA 4 0x73fa84b8 0xe7
-DATA 4 0x73fa84bc 0x45
-DATA 4 0x73fa84c0 0x45
-DATA 4 0x73fa84c4 0x45
-DATA 4 0x73fa84c8 0x45
-DATA 4 0x73fa8820 0x0
-DATA 4 0x73fa84a4 0x5
-DATA 4 0x73fa84a8 0x5
-DATA 4 0x73fa84ac 0xe3
-DATA 4 0x73fa84b0 0xe3
-DATA 4 0x73fa84b4 0xe3
-DATA 4 0x73fa84cc 0xe3
-DATA 4 0x73fa84d0 0xe2
-
-DATA 4 0x73fa882c 0x4
-DATA 4 0x73fa88a4 0x4
-DATA 4 0x73fa88ac 0x4
-DATA 4 0x73fa88b8 0x4
+# DDR bus IOMUX PAD settings
+DATA 4 0x73fa88a0 0x200		# GRP_INMODE1
+DATA 4 0x73fa850c 0x20c5	# SDODT1
+DATA 4 0x73fa8510 0x20c5	# SDODT0
+DATA 4 0x73fa8848 0x4		# DDR_A1
+DATA 4 0x73fa84b8 0xe7		# DRAM_SDCLK
+DATA 4 0x73fa84bc 0x45		# DRAM_SDQS0
+DATA 4 0x73fa84c0 0x45		# DRAM_SDQS1
+DATA 4 0x73fa84c4 0x45		# DRAM_SDQS2
+DATA 4 0x73fa84c8 0x45		# DRAM_SDQS3
+DATA 4 0x73fa8820 0x0		# DDRPKS
+DATA 4 0x73fa84ac 0xe5		# SDWE
+DATA 4 0x73fa84b0 0xe5		# SDCKE0
+DATA 4 0x73fa84b4 0xe5		# SDCKE1
+DATA 4 0x73fa84cc 0xe5		# DRAM_CS0
+DATA 4 0x73fa84d0 0xe4		# DRAM_CS1
 
 # Setting DDR for micron
 # 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model
@@ -108,7 +102,7 @@ DATA 4 0x83fd9014 0x00008014
 DATA 4 0x83fd9014 0x00008014
 DATA 4 0x83fd9014 0x0632801c
 DATA 4 0x83fd9014 0x0380801d
-DATA 4 0x83fd9014 0x0040801d
+DATA 4 0x83fd9014 0x0042801d
 DATA 4 0x83fd9014 0x00008004
 
 # Write to CTL0
@@ -116,7 +110,7 @@ DATA 4 0x83fd9000 0xb2a20000
 # Write to CTL1
 DATA 4 0x83fd9008 0xb2a20000
 # ESDMISC
-DATA 4 0x83fd9010 0xcaaaf6d0
+DATA 4 0x83fd9010 0x000ad6d0
 #ESDCTL_ESDCDLYGD
 DATA 4 0x83fd9034 0x90000000
 DATA 4 0x83fd9014 0x00000000
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

Oops. I picked the wrong commit id out of my local tree and there's a subtle mistake here.. It won't break anything but its not the one I wanted to submit. I'll respond this one..

Signature · 2 lines
Matt Sealey <[email protected]>
Product Development Analyst, Genesi USA, Inc.
Quoted 104 lines · Matt Sealey

We have no idea where the DCD was derived from for Smartbook support, but they differ from the Smarttop settings, MX51EVK settings and certainly don't correspond to any shipped or development version of U-Boot that Genesi has ever had on any Smartbook.

So, copy the calibrated, verified settings from the U-Boot as shipped with every Smartbook since retail production. Remove those few settings that just set the POR defaults which have already been confirmed for the previous Smarttop DCD change.

One of the lines is specific to i.MX51 TO3 designs and therefore TO2 Smartbooks will possibly not work so reliably with this new DCD; that said, TO2 Smartbooks basically don't exist at retail and the number of units in the world is less than 5 (3 of which are at the Genesi office or owned by Genesi employees).

Many hours of memory testing confirms the new settings are stable.

Cc Stefano Babic <[email protected]>
Cc Marek Vasut <[email protected]>

---
board/genesi/mx51_efikamx/imximage_sb.cfg | 46 +++++++++++++----------------

1 file changed, 20 insertions(+), 26 deletions(-)
board/genesi/mx51_efikamx/imximage_sb.cfg +18 -24
index 878146f..57ccad0 100644
@@ -1,5 +1,7 @@
 #
+# Copyright (C) 2009 Pegatron Corporation
 # Copyright (C) 2010 Marek Vasut <[email protected]>
+# Copyright (C) 2009-2012 Genesi USA, Inc.
 #
 # BASED ON: imx51evk
 #
@@ -43,30 +45,22 @@ BOOT_FROM    spi
 #    Address      absolute address of the register
 #    value      value to be stored in the register
 
-# Setting IOMUXC
-DATA 4 0x73fa88a0 0x200
-DATA 4 0x73fa850c 0x20c3
-DATA 4 0x73fa8510 0x20c3
-DATA 4 0x73fa883c 0x2
-DATA 4 0x73fa8848 0x2
-DATA 4 0x73fa84b8 0xe7
-DATA 4 0x73fa84bc 0x45
-DATA 4 0x73fa84c0 0x45
-DATA 4 0x73fa84c4 0x45
-DATA 4 0x73fa84c8 0x45
-DATA 4 0x73fa8820 0x0
-DATA 4 0x73fa84a4 0x5
-DATA 4 0x73fa84a8 0x5
-DATA 4 0x73fa84ac 0xe3
-DATA 4 0x73fa84b0 0xe3
-DATA 4 0x73fa84b4 0xe3
-DATA 4 0x73fa84cc 0xe3
-DATA 4 0x73fa84d0 0xe2
-
-DATA 4 0x73fa882c 0x4
-DATA 4 0x73fa88a4 0x4
-DATA 4 0x73fa88ac 0x4
-DATA 4 0x73fa88b8 0x4
+# DDR bus IOMUX PAD settings
+DATA 4 0x73fa88a0 0x200        # GRP_INMODE1
+DATA 4 0x73fa850c 0x20c5    # SDODT1
+DATA 4 0x73fa8510 0x20c5    # SDODT0
+DATA 4 0x73fa8848 0x4        # DDR_A1
+DATA 4 0x73fa84b8 0xe7        # DRAM_SDCLK
+DATA 4 0x73fa84bc 0x45        # DRAM_SDQS0
+DATA 4 0x73fa84c0 0x45        # DRAM_SDQS1
+DATA 4 0x73fa84c4 0x45        # DRAM_SDQS2
+DATA 4 0x73fa84c8 0x45        # DRAM_SDQS3
+DATA 4 0x73fa8820 0x0        # DDRPKS
+DATA 4 0x73fa84ac 0xe5        # SDWE
+DATA 4 0x73fa84b0 0xe5        # SDCKE0
+DATA 4 0x73fa84b4 0xe5        # SDCKE1
+DATA 4 0x73fa84cc 0xe5        # DRAM_CS0
+DATA 4 0x73fa84d0 0xe4        # DRAM_CS1
 
 # Setting DDR for micron
 # 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model
@@ -108,7 +102,7 @@ DATA 4 0x83fd9014 0x00008014

DATA 4 0x83fd9014 0x00008014
DATA 4 0x83fd9014 0x0632801c
DATA 4 0x83fd9014 0x0380801d

board/genesi/mx51_efikamx/imximage_sb.cfg +1 -1
-DATA 4 0x83fd9014 0x0040801d
+DATA 4 0x83fd9014 0x0042801d

DATA 4 0x83fd9014 0x00008004

# Write to CTL0

board/genesi/mx51_efikamx/imximage_sb.cfg +0 -0
@@ -116,7 +110,7 @@ DATA 4 0x83fd9000 0xb2a20000
 # Write to CTL1

DATA 4 0x83fd9008 0xb2a20000
# ESDMISC

board/genesi/mx51_efikamx/imximage_sb.cfg +1 -1
-DATA 4 0x83fd9010 0xcaaaf6d0
+DATA 4 0x83fd9010 0x000ad6d0

#ESDCTL_ESDCDLYGD
DATA 4 0x83fd9034 0x90000000
DATA 4 0x83fd9014 0x00000000

Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 1/1 efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

Quoted 5 lines · Matt Sealey

Oops. I picked the wrong commit id out of my local tree and there's a subtle mistake here.. It won't break anything but its not the one I wanted to submit. I'll respond this one..

Do not worry - I mark this pacth as read to be merged in my queue, but it is not yet merged. I discharge it, send to the ML the right one.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#3 lore raw

PATCH 1/1 efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

Done. Sorry for the inconvenience.

Signature · 2 lines
Matt Sealey <[email protected]>
Product Development Analyst, Genesi USA, Inc.
Quoted 20 lines · Stefano Babic
Quoted 5 lines · Matt Sealey

Oops. I picked the wrong commit id out of my local tree and there's a subtle mistake here.. It won't break anything but its not the one I wanted to submit. I'll respond this one..

Do not worry - I mark this pacth as read to be merged in my queue, but it is not yet merged. I discharge it, send to the ML the right one.

Best regards,
Stefano Babic

--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

#4 lore raw

PATCH 1/1 efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

Dear Matt Sealey,

Quoted 1 line

Done. Sorry for the inconvenience.

Please stop posting.
Please submit the patch in reply to the original one. Please read http://www.denx.de/wiki/U-Boot/Patches

Quoted 11 lines
Quoted 11 lines · Matt Sealey
Quoted 3 lines

Oops. I picked the wrong commit id out of my local tree and there's a subtle mistake here.. It won't break anything but its not the one I wanted to submit. I'll respond this one..

Do not worry - I mark this pacth as read to be merged in my queue, but it is not yet merged. I discharge it, send to the ML the right one.

Best regards,
Stefano Babic

Quoted 6 lines
Quoted 6 lines

--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Best regards,
Marek Vasut

#5 lore raw

PATCH 1/1 efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot

Quoted 7 lines · Marek Vasut

Dear Matt Sealey,

Quoted 1 line

Done. Sorry for the inconvenience.

Please stop posting.
Please submit the patch in reply to the original one. Please read http://www.denx.de/wiki/U-Boot/Patches

I read it, I am still getting used to this abominable system.

We can't all be the epitome of perfection as you obviously are.

Signature · 2 lines
Matt Sealey <[email protected]>
Product Development Analyst, Genesi USA, Inc.