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OMAP3: tam3517: add function to read MAC from EEPROM

PATCH Superseded Stefano Babic 5 participants 42 messages Aug 28, 2012 – Aug 31, 2012

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Arm (32-bit) Framebuffer layer
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Stefano Babic

author
#0 lore raw

PATCH 1/8 OMAP3: tam3517: add function to read MAC from EEPROM

The manufacturer delivers the TAM3517 SOM with 4 MAC address. They are stored on the EEPROM of the SOM. The patch adds a function to get their values and set the ethaddr variables.

Signed-off-by Stefano Babic <[email protected]>
---
 include/configs/tam3517-common.h |   66 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)
include/configs/tam3517-common.h +66 -0
index 24f6f7e..51503da 100644
@@ -125,6 +125,7 @@
 #define CONFIG_CMD_NAND		/* NAND support			*/
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
 
 #undef CONFIG_CMD_FLASH		/* only NAND on the SOM */
 #undef CONFIG_CMD_IMLS

@@ -135,6 +136,9 @@
 #define CONFIG_SYS_I2C_SLAVE		1
 #define CONFIG_SYS_I2C_BUS		0
 #define CONFIG_SYS_I2C_BUS_SELECT	1
+#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
 #define CONFIG_DRIVER_OMAP34XX_I2C
 
 

@@ -354,4 +358,66 @@
 		"fi;"							\
 		"else echo U-Boot not downloaded..exiting;fi\0"		\
 
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+	char customer[48];
+	char product[48];
+
+	/*
+	 * bit 0~47  : sequence number
+	 * bit 48~55 : week of year, from 0.
+	 * bit 56~63 : year
+	 */
+	unsigned long long sequence_number;
+
+	/*
+	 * bit 0~7   : revision fixed
+	 * bit 8~15  : revision major
+	 * bit 16~31 : TNxxx
+	 */
+	unsigned int revision;
+	unsigned char eth_addr[4][8];
+	unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM	\
+do {					\
+	struct tam3517_module_info info;\
+	char buf[80], ethname[20];	\
+	int i;				\
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);	\
+	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,		\
+			(void *)&info, sizeof(info)))		\
+		break;						\
+	memset(buf, 0, sizeof(buf));				\
+	for (i = 0 ; i < ARRAY_SIZE(info.eth_addr); i++) {	\
+		sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",	\
+			info.eth_addr[i][5],			\
+			info.eth_addr[i][4],			\
+			info.eth_addr[i][3],			\
+			info.eth_addr[i][2],			\
+			info.eth_addr[i][1],			\
+			info.eth_addr[i][0]);			\
+								\
+		if (i)						\
+			sprintf(ethname, "eth%daddr", i);	\
+		else						\
+			sprintf(ethname, "ethaddr");		\
+		printf("Setting %s from EEPROM with %s\n", ethname, buf);\
+		setenv(ethname, buf);				\
+	}							\
+} while (0)
+#endif
+
 #endif /* __TAM3517_H */
Signature · 1 line
1.7.9.5
author
#1 lore raw

PATCH 2/8 OMAP3: twister : get MAC address from EEPROM

Signed-off-by Stefano Babic <[email protected]>
---
 board/technexion/twister/twister.c |   10 ++++++++++
 1 file changed, 10 insertions(+)
board/technexion/twister/twister.c +10 -0
index c2b10ac..7429e93 100644
@@ -100,8 +100,18 @@ int board_init(void)
 
 int misc_init_r(void)
 {
+	char *eth_addr;
+
 	dieid_num_r();
 
+	eth_addr = getenv("ethaddr");
+	if (eth_addr)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
 	return 0;
 }
Signature · 1 line
1.7.9.5
author
#2 lore raw

PATCH 3/8 OMAP3: mt_ventoux: Correct board pinmux

In reply to Stefano Babic

Fix some issues (some pins were not set as GPIOs)

Signed-off-by Stefano Babic <[email protected]>
---
 board/teejet/mt_ventoux/mt_ventoux.h |   74 +++++++++++++++-------------------
 1 file changed, 33 insertions(+), 41 deletions(-)
board/teejet/mt_ventoux/mt_ventoux.h +33 -41
index 9b2e43e..d1fee25 100644
@@ -142,7 +142,8 @@ const omap3_sysinfo sysinfo = {
 			/*GPIO_62: FPGA_RESET */ \
 	MUX_VAL(CP(GPMC_WAIT0),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(GPMC_WAIT1),		(IEN  | PTU | EN  | M4)) \
-	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) /*GPIO_64*/ \
+	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) \
+			/* GPIO_64*/ \
 	MUX_VAL(CP(GPMC_WAIT3),		(IEN  | PTU | EN  | M4)) \
 	/* DSS */\
 	MUX_VAL(CP(DSS_PCLK),		(IDIS | PTD | DIS | M0)) \

@@ -174,26 +175,6 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(DSS_DATA22),		(IDIS | PTD | DIS | M0)) \
 	MUX_VAL(CP(DSS_DATA23),		(IDIS | PTD | DIS | M0)) \
 	/* CAMERA */\
-	MUX_VAL(CP(CAM_HS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_VS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_XCLKA),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_PCLK),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_FLD),		(IDIS | PTD | DIS | M4)) /*GPIO_98*/\
-	MUX_VAL(CP(CAM_D0),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D1),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D2),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D3),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D4),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D5),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D6),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D7),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D8),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D9),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D10),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D11),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_XCLKB),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_WEN),		(IEN  | PTD | DIS | M4)) /*GPIO_167*/\
-	MUX_VAL(CP(CAM_STROBE),		(IDIS | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DX0),		(IEN  | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DY0),		(IEN  | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DX1),		(IEN  | PTD | DIS | M0)) \

@@ -209,6 +190,7 @@ const omap3_sysinfo sysinfo = {
 			/* GPIO_126: CardDetect */\
 	MUX_VAL(CP(MMC1_DAT5),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC1_DAT6),		(IEN  | PTU | EN  | M4)) \
+			/*GPIO_128 */ \
 	MUX_VAL(CP(MMC1_DAT7),		(IEN  | PTU | EN  | M4)) \
 	\
 	MUX_VAL(CP(MMC2_CLK),		(IEN  | PTU | EN | M0)) /*MMC2_CLK*/\

@@ -250,7 +232,7 @@ const omap3_sysinfo sysinfo = {
 	\
 	MUX_VAL(CP(MCBSP4_CLKX),	(IEN | PTD | DIS | M4)) \
 			/*GPIO_152: Ignition Sense */ \
-	MUX_VAL(CP(MCBSP4_DR),		(IDIS | PTD | DIS | M4)) \
+	MUX_VAL(CP(MCBSP4_DR),		(IEN | PTD | DIS | M4)) \
 			/*GPIO_153: Power Button Sense */ \
 	MUX_VAL(CP(MCBSP4_DX),		(IEN | PTU | DIS | M4)) \
 			/* GPIO_154: FPGA_DONE */ \

@@ -264,10 +246,14 @@ const omap3_sysinfo sysinfo = {
 			/* GPIO_150: USB status 1 */\
 	\
 	MUX_VAL(CP(UART1_RX),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(UART2_RTS),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M2)) \
+			/* gpt9_pwm */\
+	MUX_VAL(CP(UART2_RTS),		(IEN | PTD | DIS | M2)) \
+			/* gpt10_pwm */\
+	MUX_VAL(CP(UART2_TX),		(IEN | PTD | DIS | M2)) \
+			/* gpt8_pwm */\
+	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M2)) \
+			/* gpt11_pwm */\
 	\
 	MUX_VAL(CP(UART3_CTS_RCTX),	(IDIS  | PTD | DIS | M4)) \
 			/*GPIO_163 : TS_PENIRQ*/ \

@@ -299,22 +285,24 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | EN  | M4)) \
 	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | EN  | M0)) \
 	/* CCDC */\
-	MUX_VAL(CP(CCDC_PCLK),		(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CCDC_PCLK),		(IEN  | PTU | EN  | M4)) \
+			/* GPIO94 */\
 	MUX_VAL(CP(CCDC_FIELD),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO95: #Enable Output */\
-	MUX_VAL(CP(CCDC_HD),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CCDC_VD),		(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CCDC_HD),		(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(CCDC_VD),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(CCDC_WEN),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO 99: #SOM_PWR_OFF */\
-	MUX_VAL(CP(CCDC_DATA0),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CCDC_DATA0),		(IEN  | PTD | DIS | M4)) \
 	MUX_VAL(CP(CCDC_DATA1),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO_100: #power out */\
-	MUX_VAL(CP(CCDC_DATA2),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA3),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA4),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA5),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA6),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA7),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CCDC_DATA2),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA3),		(IEN  | PTD | DIS | M4)) \
+			/* GPIO_102 */\
+	MUX_VAL(CP(CCDC_DATA4),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA5),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA6),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA7),		(IEN  | PTD | DIS | M4)) \
 	/* RMII */\
 	MUX_VAL(CP(RMII_MDIO_DATA),	(IEN  |  M0)) \
 	MUX_VAL(CP(RMII_MDIO_CLK),	(M0)) \

@@ -363,7 +351,8 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(SYS_BOOT8),		(IEN  | PTD | EN  | M0)) \
 	\
 	MUX_VAL(CP(SYS_OFF_MODE),	(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(SYS_CLKOUT1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_CLKOUT1),	(IDIS | PTD | DIS | M4)) \
+			/* gpio_10 */\
 	MUX_VAL(CP(SYS_CLKOUT2),	(IEN  | PTU | EN  | M0)) \
 	/* JTAG */\
 	MUX_VAL(CP(JTAG_nTRST),		(IEN  | PTD | DIS | M0)) \

@@ -387,12 +376,15 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(ETK_D7_ES2),		(IEN  | PTU | EN  | M3)) \
 	MUX_VAL(CP(ETK_D8_ES2),		(IEN  | PTD | EN  | M3)) \
 	MUX_VAL(CP(ETK_D9_ES2),		(IEN  | PTD | EN  | M3)) \
-	MUX_VAL(CP(ETK_D10_ES2),	(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTD | EN  | M4)) \
+					/* gpio_24 */\
 	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTD | DIS | M4)) \
-	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M3)) \
+	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M4)) \
+					/* gpio_26 */\
 	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | DIS | M3)) \
-	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M3)) \
-	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M3)) \
+	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M4)) \
+					/* gpio_29 */\
 	/* Die to Die */\
 	MUX_VAL(CP(D2D_MCAD34),		(IEN  | PTD | EN  | M0)) \
 	MUX_VAL(CP(D2D_MCAD35),		(IEN  | PTD | EN  | M0)) \
Signature · 1 line
1.7.9.5
author
#3 lore raw

PATCH 4/8 OMAP3: mt_ventoux: activate GPIO4

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>
---
 include/configs/mt_ventoux.h |    1 +
 1 file changed, 1 insertion(+)
include/configs/mt_ventoux.h +1 -0
index 5db6d57..131670a 100644
@@ -31,6 +31,7 @@
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_AUTO_COMPLETE
 
+#define CONFIG_OMAP3_GPIO_4
 #define CONFIG_HOSTNAME mt_ventoux
 
 /*
Signature · 1 line
1.7.9.5
author
#4 lore raw

PATCH 5/8 OMAP3: mt_ventoux: read MAC address from EEPROM

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>
---
 board/teejet/mt_ventoux/mt_ventoux.c |   16 ++++++++++++++++
 1 file changed, 16 insertions(+)
board/teejet/mt_ventoux/mt_ventoux.c +16 -0
index 9fbaedd..b7744a9 100644
@@ -196,6 +196,22 @@ int board_init(void)
 	return 0;
 }
 
+int misc_init_r(void)
+{
+	char *eth_addr;
+
+	dieid_num_r();
+
+	eth_addr = getenv("ethaddr");
+	if (eth_addr)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+	return 0;
+}
+
 /*
  * Routine: set_muxconf_regs
  * Description: Setting up the configuration Mux registers specific to the
Signature · 1 line
1.7.9.5
author
#5 lore raw

PATCH 6/8 OMAP3: mt_ventoux: disable the buzzer at start-up

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>
---
 board/teejet/mt_ventoux/mt_ventoux.c |   14 ++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    4 ----
 2 files changed, 14 insertions(+), 4 deletions(-)
board/teejet/mt_ventoux/mt_ventoux.c +14 -0
index b7744a9..814e72f 100644
@@ -39,6 +39,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define BUZZER		140
+#define SPEAKER		141
+
 #ifndef CONFIG_FPGA
 #error "The Teejet mt_ventoux must have CONFIG_FPGA enabled"
 #endif

@@ -193,6 +196,17 @@ int board_init(void)
 
 	mt_ventoux_init_fpga();
 
+	/* GPIO_140: speaker #mute */
+	MUX_VAL(CP(MCBSP3_DX),		(IEN | PTU | EN | M4))
+	/* GPIO_141: Buzz Hi */
+	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTU | EN | M4))
+
+	/* Turning off the buzzer */
+	gpio_request(BUZZER, "BUZZER_MUTE");
+	gpio_request(SPEAKER, "SPEAKER");
+	gpio_direction_output(BUZZER, 0);
+	gpio_direction_output(SPEAKER, 0);
+
 	return 0;
 }
board/teejet/mt_ventoux/mt_ventoux.h +0 -4
index d1fee25..eadb8a5 100644
@@ -223,10 +223,6 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCBSP2_DX),		(IEN | PTD | EN | M4)) \
 			/* GPIO_119: FPGA_INIT */ \
 	\
-	MUX_VAL(CP(MCBSP3_DX),		(IEN | PTU | EN | M4)) \
-			/* GPIO_140: speaker #mute */\
-	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTU | EN | M4)) \
-			/* GPIO_141: Buzz Hi */\
 	MUX_VAL(CP(MCBSP3_CLKX),	(IEN  | PTU | EN | M4)) \
 	MUX_VAL(CP(MCBSP3_FSX),		(IEN  | PTU | EN | M4)) \
 	\
Signature · 1 line
1.7.9.5
author
#6 lore raw

PATCH 7/8 video: drop duplicate set of DISPC_CONFIG register

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>
---
 drivers/video/omap3_dss.c |    1 -
 1 file changed, 1 deletion(-)
drivers/video/omap3_dss.c +0 -1
index 6686718..5fcc0fb 100644
@@ -112,7 +112,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->pol_freq, &dispc->pol_freq);
 	writel(panel_cfg->divisor, &dispc->divisor);
 	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
 	writel(panel_cfg->panel_type << TFTSTN_SHIFT |
 		panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
 	writel(panel_cfg->panel_color, &dispc->default_color0);
Signature · 1 line
1.7.9.5
#7 lore raw

PATCH 7/8 video: drop duplicate set of DISPC_CONFIG register

Hi Stefano,

Quoted 10 lines · Stefano Babic
Signed-off-by Stefano Babic <[email protected]>
---
  drivers/video/omap3_dss.c |    1 -
  1 file changed, 1 deletion(-)
drivers/video/omap3_dss.c +0 -0
index 6686718..5fcc0fb 100644

drivers/video/omap3_dss.c void omap3_dss_panel_config(const struct panel_config *panel_cfg) · line 117

Quoted 7 lines
drivers/video/omap3_dss.c +0 -1
@@ -112,7 +112,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
  	writel(panel_cfg->pol_freq, &dispc->pol_freq);
  	writel(panel_cfg->divisor, &dispc->divisor);
  	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
  	writel(panel_cfg->panel_type << TFTSTN_SHIFT |
  		panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
  	writel(panel_cfg->panel_color, &dispc->default_color0);

The beagle board doesn't have a framebuffer, but uses the panel color only. So only the part till if (!panel_cfg->frame_buffer) is used by the beagle
board, so the other should be removed.

And perhaps change the FRAME_MODE_SHIFT to LOADMODE_SHIFT (both defined as 1 though).

Regards,
Jeroen

author
#8 lore raw

PATCH 7/8 video: drop duplicate set of DISPC_CONFIG register

Quoted 2 lines · Jeroen Hofstee

Hi Stefano,

Hi Jeroen,

Quoted 24 lines · Stefano Babic
Quoted 17 lines
Signed-off-by Stefano Babic <[email protected]>
---
  drivers/video/omap3_dss.c |    1 -
  1 file changed, 1 deletion(-)
drivers/video/omap3_dss.c +0 -1
index 6686718..5fcc0fb 100644
@@ -112,7 +112,6 @@ void omap3_dss_panel_config(const struct
 panel_config *panel_cfg)
      writel(panel_cfg->pol_freq, &dispc->pol_freq);
      writel(panel_cfg->divisor, &dispc->divisor);
      writel(panel_cfg->lcd_size, &dispc->size_lcd);
-    writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
      writel(panel_cfg->panel_type << TFTSTN_SHIFT |
          panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
Quoted 1 line
      writel(panel_cfg->panel_color, &dispc->default_color0);

The beagle board doesn't have a framebuffer, but uses the panel color only. So only the part till if (!panel_cfg->frame_buffer) is used by the beagle
board, so the other should be removed.

Quoted 2 lines

And perhaps change the FRAME_MODE_SHIFT to LOADMODE_SHIFT (both defined as 1 though).

This is exactly the duplication. In code, after some lines :

writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);

that is equivalent to the dropped line. Then I will move this line before the check if frame_buffer is set. And by the way, I drop FRAME_MODE_SHIFT.

Best regards,
Stefano

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
author
#9 lore raw

PATCH 8/8 OMAP3: mt_ventoux: added video support

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>
---
 board/teejet/mt_ventoux/mt_ventoux.c |   91 ++++++++++++++++++++++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    2 +-
 include/configs/mt_ventoux.h         |   16 ++++++
 3 files changed, 108 insertions(+), 1 deletion(-)
board/teejet/mt_ventoux/mt_ventoux.c +91 -0
index 814e72f..a2bda4b 100644
@@ -21,13 +21,17 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <malloc.h>
 #include <fpga.h>
+#include <video_fb.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/omap_gpio.h>
 #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/dss.h>
+#include <asm/arch/clocks.h>
 #include <i2c.h>
 #include <spartan3.h>
 #include <asm/gpio.h>

@@ -53,6 +57,50 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FPGA_INIT	119
 #define FPGA_DONE	154
 
+#define LCD_PWR		138
+#define LCD_PON_PIN	139
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+static struct {
+	u32 xres;
+	u32 yres;
+} panel_resolution[] = {
+	{ 480, 272 },
+	{ 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+	{
+	.timing_h       =  ((4 /* hpb */ - 1) << 20) |
+			((8 /*hfp */- 1) << 8) |
+			(41 /* hsw */ - 1), /* Horizontal timing */
+	.timing_v       = (2 /*vbp */ << 24) |
+			(4 /* vfp */ << 8) |
+			(10 - 1), /* Vertical timing */
+	.pol_freq       = 0x00000000, /* Pol Freq */
+	.divisor        = 0x0001000d, /* 33Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	},
+	{
+	.timing_h       =  ((20 /* hpb */ - 1) << 20) |
+			((192 /*hfp */- 1) << 8) |
+			(4 /* hsw */ - 1), /* Horizontal timing */
+	.timing_v       = (2 /*vbp */ << 24) |
+			(20 /* vfp */ << 8) |
+			(10 /* vsw */ - 1), /* Vertical timing */
+	.pol_freq       = 0x00004000, /* Pol Freq */
+	.divisor        = 0x0001000E, /* 36Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	}
+};
+#endif
+
 /* Timing definitions for FPGA */
 static const u32 gpmc_fpga[] = {
 	FPGA_GPMC_CONFIG1,

@@ -254,3 +302,46 @@ int board_mmc_init(bd_t *bis)
 	return omap_mmc_init(0, 0, 0);
 }
 #endif
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+	struct panel_config *panel = &lcd_cfg[0];
+	char *s;
+	u32 index = 0;
+
+	void *fb;
+
+	fb = (void *)0x88000000;
+
+	s = getenv("panel");
+	if (s) {
+		index = simple_strtoul(s, NULL, 10);
+		if (index < ARRAY_SIZE(lcd_cfg))
+			panel = &lcd_cfg[index];
+		else
+			return 0;
+	}
+
+	panel->frame_buffer = fb;
+	printf("Panel: %dx%d\n", panel_resolution[index].xres,
+		panel_resolution[index].yres);
+	panel->lcd_size = (panel_resolution[index].yres - 1) << 16 |
+		(panel_resolution[index].xres - 1);
+
+	gpio_request(LCD_PWR, "LCD Power");
+	gpio_request(LCD_PON_PIN, "LCD Pon");
+	gpio_direction_output(LCD_PWR, 0);
+	gpio_direction_output(LCD_PON_PIN, 1);
+
+
+	setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+	setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+
+	omap3_dss_panel_config(panel);
+	omap3_dss_enable();
+
+	return 0;
+}
+#endif
board/teejet/mt_ventoux/mt_ventoux.h +1 -1
index eadb8a5..1cd7ec2 100644
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MMC2_DAT5),		(IDIS  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC2_DAT6),		(IDIS  | PTU | EN  | M4)) \
 			/* GPIO_138: LCD_ENVD */\
-	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTU | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTD | EN  | M4)) \
 			/* GPIO_139: LCD_PON */\
 	/* McBSP */\
 	MUX_VAL(CP(MCBSP_CLKS),		(IEN  | PTU | DIS | M0)) \
include/configs/mt_ventoux.h +16 -0
index 131670a..8d35943 100644
@@ -2,6 +2,9 @@
  * Copyright (C) 2011
  * Stefano Babic, DENX Software Engineering, sbabic at denx.de.
  *
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
  * Copyright (C) 2009 TechNexion Ltd.
  *
  * This program is free software; you can redistribute it and/or modify

@@ -24,6 +27,10 @@
 
 #include "tam3517-common.h"
 
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10) + \
+					6 * 1024 * 1024)
+
 #define MACH_TYPE_AM3517_MT_VENTOUX	3832
 #define CONFIG_MACH_TYPE	MACH_TYPE_AM3517_MT_VENTOUX
 

@@ -63,6 +70,15 @@
 #define CONFIG_FPGA_DELAY() udelay(1)
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #define	CONFIG_EXTRA_ENV_SETTINGS	CONFIG_TAM3517_SETTINGS \
 	"bootcmd=run net_nfs\0"
Signature · 1 line
1.7.9.5
#10 lore raw

PATCH 8/8 OMAP3: mt_ventoux: added video support

Hello Stefano,

Quoted 40 lines · Stefano Babic
Signed-off-by Stefano Babic<[email protected]>
---
  board/teejet/mt_ventoux/mt_ventoux.c |   91 ++++++++++++++++++++++++++++++++++
  board/teejet/mt_ventoux/mt_ventoux.h |    2 +-
  include/configs/mt_ventoux.h         |   16 ++++++
  3 files changed, 108 insertions(+), 1 deletion(-)
board/teejet/mt_ventoux/mt_ventoux.c +11 -0
index 814e72f..a2bda4b 100644
@@ -21,13 +21,17 @@
 
  #include<common.h>
  #include<netdev.h>
+#include<malloc.h>
  #include<fpga.h>
+#include<video_fb.h>
  #include<asm/io.h>
  #include<asm/arch/mem.h>
  #include<asm/arch/mux.h>
  #include<asm/arch/sys_proto.h>
  #include<asm/omap_gpio.h>
  #include<asm/arch/mmc_host_def.h>
+#include<asm/arch/dss.h>
+#include<asm/arch/clocks.h>
  #include<i2c.h>
  #include<spartan3.h>
  #include<asm/gpio.h>

@@ -53,6 +57,50 @@ DECLARE_GLOBAL_DATA_PTR;
  #define FPGA_INIT	119
  #define FPGA_DONE	154
 
+#define LCD_PWR		138
+#define LCD_PON_PIN	139
+
+#if defined(CONFIG_VIDEO)&&  !defined(CONFIG_SPL_BUILD)
+static struct {
+	u32 xres;
+	u32 yres;

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 76

Quoted 10 lines
board/teejet/mt_ventoux/mt_ventoux.c +10 -0
+} panel_resolution[] = {
+	{ 480, 272 },
+	{ 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+	{
+	.timing_h       =  ((4 /* hpb */ - 1)<<  20) |
+			((8 /*hfp */- 1)<<  8) |
+			(41 /* hsw */ - 1), /* Horizontal timing */

Could we use here a define, something like this:

#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | (sw - 1))

                 .panel_config = {
                         .timing_h       = PANEL_TIMING_H(4, 8, 41),

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 77

Quoted 1 line
board/teejet/mt_ventoux/mt_ventoux.c +1 -0
+	.timing_v       = (2 /*vbp */<<  24) |

^^
Is this correct? In the manual I see for the timing H and V settings the same bitpositions!

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 79

Quoted 2 lines
board/teejet/mt_ventoux/mt_ventoux.c +2 -0
+			(4 /* vfp */<<  8) |
+			(10 - 1), /* Vertical timing */

#define PANEL_TIMING_V(bp, fp, sw) (((bp) << 20) | ((fp) << 8) | (sw - 1))

and here too ?

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 90

Quoted 11 lines
board/teejet/mt_ventoux/mt_ventoux.c +11 -0
+	.pol_freq       = 0x00000000, /* Pol Freq */
+	.divisor        = 0x0001000d, /* 33Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	},
+	{
+	.timing_h       =  ((20 /* hpb */ - 1)<<  20) |
+			((192 /*hfp */- 1)<<  8) |
+			(4 /* hsw */ - 1), /* Horizontal timing */

and here ...

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 93

Quoted 3 lines
board/teejet/mt_ventoux/mt_ventoux.c +3 -0
+	.timing_v       = (2 /*vbp */<<  24) |
+			(20 /* vfp */<<  8) |
+			(10 /* vsw */ - 1), /* Vertical timing */

and here.

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 102

Quoted 9 lines
board/teejet/mt_ventoux/mt_ventoux.c +9 -0
+	.pol_freq       = 0x00004000, /* Pol Freq */
+	.divisor        = 0x0001000E, /* 36Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	}
+};
+#endif

[...]

bye,
Heiko

Signature · 2 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
author
#11 lore raw

PATCH 8/8 OMAP3: mt_ventoux: added video support

Quoted 2 lines · Heiko Schocher

Hello Stefano,

Hi Heiko,

Quoted 10 lines

board/teejet/mt_ventoux/mt_ventoux.c DECLARE_GLOBAL_DATA_PTR; · line 76

Quoted 5 lines
board/teejet/mt_ventoux/mt_ventoux.c +5 -0
+static struct panel_config lcd_cfg[] = {
+    {
+    .timing_h       =  ((4 /* hpb */ - 1)<<  20) |
+            ((8 /*hfp */- 1)<<  8) |
+            (41 /* hsw */ - 1), /* Horizontal timing */

Could we use here a define, something like this:

#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | (sw - 1))

Agree - and put it in a common header (arch/dss.h), making it accessible to all boards. And we need only one macro PANEL_TIMING, the register has the same layout.

I'll do in V2.

Quoted 11 lines
                .panel_config = {
                        .timing_h       = PANEL_TIMING_H(4, 8, 41),
Quoted 1 line

+ .timing_v = (2 /*vbp */<< 24) |

^^
Is this correct? In the manual I see for the timing H and V
settings
the same bitpositions!

This is not correct, thanks. It has no influence on my hardware because it simply increments vbp, but I will fix it.

Stefano

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#12 lore raw

PATCH 8/8 OMAP3: mt_ventoux: added video support

Hello Stefano,

Could we use here a define, something like this:

#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | (sw - 1))

Quoted 6 lines

Agree - and put it in a common header (arch/dss.h), making it accessible to all boards. And we need only one macro PANEL_TIMING, the register has the same layout.

I'll do in V2.

The hbp, hfp, hsw, vsw all have a "(program to value minus 1)." vbp and vfp don't, you can set those to zero.

So while the layout is the same, the meaning isn't. To make the values match the lcd specification, I would prefer to have the separate defines.

Regards,
Jeroen

author
#13 lore raw

PATCH 8/8 OMAP3: mt_ventoux: added video support

Quoted 11 lines · Jeroen Hofstee

Hello Stefano,

Could we use here a define, something like this:

#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | (sw - 1))

Quoted 4 lines

Agree - and put it in a common header (arch/dss.h), making it accessible to all boards. And we need only one macro PANEL_TIMING, the register has the same layout.

Quoted 8 lines
Quoted 2 lines

I'll do in V2.

The hbp, hfp, hsw, vsw all have a "(program to value minus 1)." vbp and vfp don't, you can set those to zero.

So while the layout is the same, the meaning isn't. To make the values match the lcd specification, I would prefer to have the separate defines.

That's right - I will put two separate defines.

Regards,
Stefano

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
author
#14 lore raw

v2 cover This patchset updates boards based on the TAM3517 SOM.

In reply to Stefano Babic

The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board.

Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

Stefano Babic (9):
OMAP3: tam3517: add function to read MAC from EEPROM
OMAP3: twister : get MAC address from EEPROM
OMAP3: mt_ventoux: Correct board pinmux
OMAP3: mt_ventoux: activate GPIO4
OMAP3: mt_ventoux: read MAC address from EEPROM
OMAP3: mt_ventoux: disable the buzzer at start-up
video: drop duplicate set of DISPC_CONFIG register
OMAP3: video: add macros to set display parameters
OMAP3: mt_ventoux: added video support

 arch/arm/include/asm/arch-omap3/dss.h |    5 +-
 board/technexion/twister/twister.c    |   10 +++
 board/teejet/mt_ventoux/mt_ventoux.c  |  113 +++++++++++++++++++++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h  |   80 ++++++++++-------------
 drivers/video/omap3_dss.c             |    3 +-
 include/configs/mt_ventoux.h          |   17 +++++
 include/configs/tam3517-common.h      |   66 +++++++++++++++++++
 7 files changed, 245 insertions(+), 49 deletions(-)
Signature · 1 line
1.7.9.5
author
#15 lore raw

PATCH v2 1/9 OMAP3: tam3517: add function to read MAC from EEPROM

The manufacturer delivers the TAM3517 SOM with 4 MAC address. They are stored on the EEPROM of the SOM. The patch adds a function to get their values and set the ethaddr variables.

Signed-off-by Stefano Babic <[email protected]>

---
Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

 include/configs/tam3517-common.h |   66 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)
include/configs/tam3517-common.h +66 -0
index 24f6f7e..51503da 100644
@@ -125,6 +125,7 @@
 #define CONFIG_CMD_NAND		/* NAND support			*/
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
 
 #undef CONFIG_CMD_FLASH		/* only NAND on the SOM */
 #undef CONFIG_CMD_IMLS

@@ -135,6 +136,9 @@
 #define CONFIG_SYS_I2C_SLAVE		1
 #define CONFIG_SYS_I2C_BUS		0
 #define CONFIG_SYS_I2C_BUS_SELECT	1
+#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
 #define CONFIG_DRIVER_OMAP34XX_I2C
 
 

@@ -354,4 +358,66 @@
 		"fi;"							\
 		"else echo U-Boot not downloaded..exiting;fi\0"		\
 
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+	char customer[48];
+	char product[48];
+
+	/*
+	 * bit 0~47  : sequence number
+	 * bit 48~55 : week of year, from 0.
+	 * bit 56~63 : year
+	 */
+	unsigned long long sequence_number;
+
+	/*
+	 * bit 0~7   : revision fixed
+	 * bit 8~15  : revision major
+	 * bit 16~31 : TNxxx
+	 */
+	unsigned int revision;
+	unsigned char eth_addr[4][8];
+	unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM	\
+do {					\
+	struct tam3517_module_info info;\
+	char buf[80], ethname[20];	\
+	int i;				\
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);	\
+	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,		\
+			(void *)&info, sizeof(info)))		\
+		break;						\
+	memset(buf, 0, sizeof(buf));				\
+	for (i = 0 ; i < ARRAY_SIZE(info.eth_addr); i++) {	\
+		sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",	\
+			info.eth_addr[i][5],			\
+			info.eth_addr[i][4],			\
+			info.eth_addr[i][3],			\
+			info.eth_addr[i][2],			\
+			info.eth_addr[i][1],			\
+			info.eth_addr[i][0]);			\
+								\
+		if (i)						\
+			sprintf(ethname, "eth%daddr", i);	\
+		else						\
+			sprintf(ethname, "ethaddr");		\
+		printf("Setting %s from EEPROM with %s\n", ethname, buf);\
+		setenv(ethname, buf);				\
+	}							\
+} while (0)
+#endif
+
 #endif /* __TAM3517_H */
Signature · 1 line
1.7.9.5
author
#16 lore raw

PATCH v2 2/9 OMAP3: twister : get MAC address from EEPROM

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/technexion/twister/twister.c |   10 ++++++++++
 1 file changed, 10 insertions(+)
board/technexion/twister/twister.c +10 -0
index c2b10ac..7429e93 100644
@@ -100,8 +100,18 @@ int board_init(void)
 
 int misc_init_r(void)
 {
+	char *eth_addr;
+
 	dieid_num_r();
 
+	eth_addr = getenv("ethaddr");
+	if (eth_addr)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
 	return 0;
 }
Signature · 1 line
1.7.9.5
author
#17 lore raw

PATCH v2 3/9 OMAP3: mt_ventoux: Correct board pinmux

In reply to Stefano Babic

Fix some issues (some pins were not set as GPIOs)

Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.h |   74 +++++++++++++++-------------------
 1 file changed, 33 insertions(+), 41 deletions(-)
board/teejet/mt_ventoux/mt_ventoux.h +33 -41
index 9b2e43e..d1fee25 100644
@@ -142,7 +142,8 @@ const omap3_sysinfo sysinfo = {
 			/*GPIO_62: FPGA_RESET */ \
 	MUX_VAL(CP(GPMC_WAIT0),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(GPMC_WAIT1),		(IEN  | PTU | EN  | M4)) \
-	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) /*GPIO_64*/ \
+	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) \
+			/* GPIO_64*/ \
 	MUX_VAL(CP(GPMC_WAIT3),		(IEN  | PTU | EN  | M4)) \
 	/* DSS */\
 	MUX_VAL(CP(DSS_PCLK),		(IDIS | PTD | DIS | M0)) \

@@ -174,26 +175,6 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(DSS_DATA22),		(IDIS | PTD | DIS | M0)) \
 	MUX_VAL(CP(DSS_DATA23),		(IDIS | PTD | DIS | M0)) \
 	/* CAMERA */\
-	MUX_VAL(CP(CAM_HS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_VS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_XCLKA),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_PCLK),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_FLD),		(IDIS | PTD | DIS | M4)) /*GPIO_98*/\
-	MUX_VAL(CP(CAM_D0),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D1),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D2),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D3),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D4),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D5),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D6),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D7),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D8),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D9),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D10),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D11),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_XCLKB),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_WEN),		(IEN  | PTD | DIS | M4)) /*GPIO_167*/\
-	MUX_VAL(CP(CAM_STROBE),		(IDIS | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DX0),		(IEN  | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DY0),		(IEN  | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DX1),		(IEN  | PTD | DIS | M0)) \

@@ -209,6 +190,7 @@ const omap3_sysinfo sysinfo = {
 			/* GPIO_126: CardDetect */\
 	MUX_VAL(CP(MMC1_DAT5),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC1_DAT6),		(IEN  | PTU | EN  | M4)) \
+			/*GPIO_128 */ \
 	MUX_VAL(CP(MMC1_DAT7),		(IEN  | PTU | EN  | M4)) \
 	\
 	MUX_VAL(CP(MMC2_CLK),		(IEN  | PTU | EN | M0)) /*MMC2_CLK*/\

@@ -250,7 +232,7 @@ const omap3_sysinfo sysinfo = {
 	\
 	MUX_VAL(CP(MCBSP4_CLKX),	(IEN | PTD | DIS | M4)) \
 			/*GPIO_152: Ignition Sense */ \
-	MUX_VAL(CP(MCBSP4_DR),		(IDIS | PTD | DIS | M4)) \
+	MUX_VAL(CP(MCBSP4_DR),		(IEN | PTD | DIS | M4)) \
 			/*GPIO_153: Power Button Sense */ \
 	MUX_VAL(CP(MCBSP4_DX),		(IEN | PTU | DIS | M4)) \
 			/* GPIO_154: FPGA_DONE */ \

@@ -264,10 +246,14 @@ const omap3_sysinfo sysinfo = {
 			/* GPIO_150: USB status 1 */\
 	\
 	MUX_VAL(CP(UART1_RX),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(UART2_RTS),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M2)) \
+			/* gpt9_pwm */\
+	MUX_VAL(CP(UART2_RTS),		(IEN | PTD | DIS | M2)) \
+			/* gpt10_pwm */\
+	MUX_VAL(CP(UART2_TX),		(IEN | PTD | DIS | M2)) \
+			/* gpt8_pwm */\
+	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M2)) \
+			/* gpt11_pwm */\
 	\
 	MUX_VAL(CP(UART3_CTS_RCTX),	(IDIS  | PTD | DIS | M4)) \
 			/*GPIO_163 : TS_PENIRQ*/ \

@@ -299,22 +285,24 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | EN  | M4)) \
 	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | EN  | M0)) \
 	/* CCDC */\
-	MUX_VAL(CP(CCDC_PCLK),		(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CCDC_PCLK),		(IEN  | PTU | EN  | M4)) \
+			/* GPIO94 */\
 	MUX_VAL(CP(CCDC_FIELD),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO95: #Enable Output */\
-	MUX_VAL(CP(CCDC_HD),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CCDC_VD),		(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CCDC_HD),		(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(CCDC_VD),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(CCDC_WEN),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO 99: #SOM_PWR_OFF */\
-	MUX_VAL(CP(CCDC_DATA0),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CCDC_DATA0),		(IEN  | PTD | DIS | M4)) \
 	MUX_VAL(CP(CCDC_DATA1),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO_100: #power out */\
-	MUX_VAL(CP(CCDC_DATA2),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA3),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA4),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA5),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA6),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA7),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CCDC_DATA2),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA3),		(IEN  | PTD | DIS | M4)) \
+			/* GPIO_102 */\
+	MUX_VAL(CP(CCDC_DATA4),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA5),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA6),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA7),		(IEN  | PTD | DIS | M4)) \
 	/* RMII */\
 	MUX_VAL(CP(RMII_MDIO_DATA),	(IEN  |  M0)) \
 	MUX_VAL(CP(RMII_MDIO_CLK),	(M0)) \

@@ -363,7 +351,8 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(SYS_BOOT8),		(IEN  | PTD | EN  | M0)) \
 	\
 	MUX_VAL(CP(SYS_OFF_MODE),	(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(SYS_CLKOUT1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_CLKOUT1),	(IDIS | PTD | DIS | M4)) \
+			/* gpio_10 */\
 	MUX_VAL(CP(SYS_CLKOUT2),	(IEN  | PTU | EN  | M0)) \
 	/* JTAG */\
 	MUX_VAL(CP(JTAG_nTRST),		(IEN  | PTD | DIS | M0)) \

@@ -387,12 +376,15 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(ETK_D7_ES2),		(IEN  | PTU | EN  | M3)) \
 	MUX_VAL(CP(ETK_D8_ES2),		(IEN  | PTD | EN  | M3)) \
 	MUX_VAL(CP(ETK_D9_ES2),		(IEN  | PTD | EN  | M3)) \
-	MUX_VAL(CP(ETK_D10_ES2),	(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTD | EN  | M4)) \
+					/* gpio_24 */\
 	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTD | DIS | M4)) \
-	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M3)) \
+	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M4)) \
+					/* gpio_26 */\
 	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | DIS | M3)) \
-	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M3)) \
-	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M3)) \
+	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M4)) \
+					/* gpio_29 */\
 	/* Die to Die */\
 	MUX_VAL(CP(D2D_MCAD34),		(IEN  | PTD | EN  | M0)) \
 	MUX_VAL(CP(D2D_MCAD35),		(IEN  | PTD | EN  | M0)) \
Signature · 1 line
1.7.9.5
author
#18 lore raw

PATCH v2 4/9 OMAP3: mt_ventoux: activate GPIO4

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 include/configs/mt_ventoux.h |    1 +
 1 file changed, 1 insertion(+)
include/configs/mt_ventoux.h +1 -0
index 5db6d57..131670a 100644
@@ -31,6 +31,7 @@
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_AUTO_COMPLETE
 
+#define CONFIG_OMAP3_GPIO_4
 #define CONFIG_HOSTNAME mt_ventoux
 
 /*
Signature · 1 line
1.7.9.5
author
#19 lore raw

PATCH v2 5/9 OMAP3: mt_ventoux: read MAC address from EEPROM

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.c |   16 ++++++++++++++++
 1 file changed, 16 insertions(+)
board/teejet/mt_ventoux/mt_ventoux.c +16 -0
index 9fbaedd..b7744a9 100644
@@ -196,6 +196,22 @@ int board_init(void)
 	return 0;
 }
 
+int misc_init_r(void)
+{
+	char *eth_addr;
+
+	dieid_num_r();
+
+	eth_addr = getenv("ethaddr");
+	if (eth_addr)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+	return 0;
+}
+
 /*
  * Routine: set_muxconf_regs
  * Description: Setting up the configuration Mux registers specific to the
Signature · 1 line
1.7.9.5
author
#20 lore raw

PATCH v2 6/9 OMAP3: mt_ventoux: disable the buzzer at start-up

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.c |   14 ++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    4 ----
 2 files changed, 14 insertions(+), 4 deletions(-)
board/teejet/mt_ventoux/mt_ventoux.c +14 -0
index b7744a9..814e72f 100644
@@ -39,6 +39,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define BUZZER		140
+#define SPEAKER		141
+
 #ifndef CONFIG_FPGA
 #error "The Teejet mt_ventoux must have CONFIG_FPGA enabled"
 #endif

@@ -193,6 +196,17 @@ int board_init(void)
 
 	mt_ventoux_init_fpga();
 
+	/* GPIO_140: speaker #mute */
+	MUX_VAL(CP(MCBSP3_DX),		(IEN | PTU | EN | M4))
+	/* GPIO_141: Buzz Hi */
+	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTU | EN | M4))
+
+	/* Turning off the buzzer */
+	gpio_request(BUZZER, "BUZZER_MUTE");
+	gpio_request(SPEAKER, "SPEAKER");
+	gpio_direction_output(BUZZER, 0);
+	gpio_direction_output(SPEAKER, 0);
+
 	return 0;
 }
board/teejet/mt_ventoux/mt_ventoux.h +0 -4
index d1fee25..eadb8a5 100644
@@ -223,10 +223,6 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCBSP2_DX),		(IEN | PTD | EN | M4)) \
 			/* GPIO_119: FPGA_INIT */ \
 	\
-	MUX_VAL(CP(MCBSP3_DX),		(IEN | PTU | EN | M4)) \
-			/* GPIO_140: speaker #mute */\
-	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTU | EN | M4)) \
-			/* GPIO_141: Buzz Hi */\
 	MUX_VAL(CP(MCBSP3_CLKX),	(IEN  | PTU | EN | M4)) \
 	MUX_VAL(CP(MCBSP3_FSX),		(IEN  | PTU | EN | M4)) \
 	\
Signature · 1 line
1.7.9.5
author
#21 lore raw

PATCH v2 7/9 video: drop duplicate set of DISPC_CONFIG register

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 arch/arm/include/asm/arch-omap3/dss.h |    1 -
 drivers/video/omap3_dss.c             |    3 +--
 2 files changed, 1 insertion(+), 3 deletions(-)
arch/arm/include/asm/arch-omap3/dss.h +0 -1
index a830c43..8913a71 100644
@@ -142,7 +142,6 @@ struct venc_regs {
 };
 
 /* Few Register Offsets */
-#define FRAME_MODE_SHIFT			1
 #define TFTSTN_SHIFT				3
 #define DATALINES_SHIFT				8
drivers/video/omap3_dss.c +1 -2
index 6686718..b1424bf 100644
@@ -112,7 +112,7 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->pol_freq, &dispc->pol_freq);
 	writel(panel_cfg->divisor, &dispc->divisor);
 	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
+	writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
 	writel(panel_cfg->panel_type << TFTSTN_SHIFT |
 		panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
 	writel(panel_cfg->panel_color, &dispc->default_color0);

@@ -121,7 +121,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	if (!panel_cfg->frame_buffer)
 		return;
 
-	writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
 	writel(8 << GFX_FORMAT_SHIFT | GFX_ENABLE, &dispc->gfx_attributes);
 	writel(1, &dispc->gfx_row_inc);
 	writel(1, &dispc->gfx_pixel_inc);
Signature · 1 line
1.7.9.5
author
#23 lore raw

PATCH v2 8/9 OMAP3: video: add macros to set display parameters

In reply to Stefano Babic

Add a common macros to set the registers for horizontal and vertical timing.

Signed-off-by Stefano Babic <[email protected]>

---

 arch/arm/include/asm/arch-omap3/dss.h |    4 ++++
 1 file changed, 4 insertions(+)
arch/arm/include/asm/arch-omap3/dss.h +4 -0
index 8913a71..df5b978 100644
@@ -181,6 +181,10 @@ struct panel_config {
 	void *frame_buffer;
 };
 
+#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | \
+		 ((fp - 1) << 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp << 20) | (fp << 8) | (sw - 1))
+
 /* Generic DSS Functions */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 			u32 height, u32 width);
Signature · 1 line
1.7.9.5
#24 lore raw

PATCH v2 8/9 OMAP3: video: add macros to set display parameters

Hello Stefano,

Quoted 8 lines · Stefano Babic

Add a common macros to set the registers for horizontal and vertical timing.

Signed-off-by Stefano Babic<[email protected]>

---

  arch/arm/include/asm/arch-omap3/dss.h |    4 ++++
  1 file changed, 4 insertions(+)
Acked-by Heiko Schocher <[email protected]>

bye,
Heiko

Signature · 2 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
#25 lore raw

PATCH v2 8/9 OMAP3: video: add macros to set display parameters

In reply to Stefano Babic
Quoted 14 lines · Stefano Babic

Add a common macros to set the registers for horizontal and vertical timing.

Signed-off-by Stefano Babic <[email protected]>

---

  arch/arm/include/asm/arch-omap3/dss.h |    4 ++++
  1 file changed, 4 insertions(+)
arch/arm/include/asm/arch-omap3/dss.h +0 -0
index 8913a71..df5b978 100644

arch/arm/include/asm/arch-omap3/dss.h struct panel_config { · line 190

Quoted 10 lines
arch/arm/include/asm/arch-omap3/dss.h +4 -0
@@ -181,6 +181,10 @@ struct panel_config {
  	void *frame_buffer;
  };
 
+#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | \
+		 ((fp - 1) << 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp << 20) | (fp << 8) | (sw - 1))
+
  /* Generic DSS Functions */
  void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
  			u32 height, u32 width);

To make it a bit more clear what is set, perhaps we can define the fields themselves, this would save some /* hfp */ etc.

e.g.

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..b6ad72d 100644

arch/arm/include/asm/arch-omap3/dss.h +7 -0
@@ -182,6 +182,13 @@ struct panel_config {
         void *frame_buffer;
  };
 
+#define DSS_HPB(bp)    (((bp) - 1) << 20)
+#define DSS_HFB(fp)    (((fp) - 1) << 8)
+#define DSS_HSW(sw)    ((sw) - 1)
+#define DSS_VPB(bp)    ((bp) << 20)
+#define DSS_VFB(fp)    ((fp) << 8)
+#define DSS_VSW(sw)    ((sw) - 1)
+
  /* Generic DSS Functions */
  void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
                         u32 height, u32 width);
#26 lore raw

PATCH v2 8/9 OMAP3: video: add macros to set display parameters

Quoted 41 lines · Jeroen Hofstee
Quoted 15 lines · Stefano Babic

Add a common macros to set the registers for horizontal and vertical timing.

Signed-off-by Stefano Babic <[email protected]>

---

  arch/arm/include/asm/arch-omap3/dss.h |    4 ++++
  1 file changed, 4 insertions(+)
arch/arm/include/asm/arch-omap3/dss.h +0 -0
index 8913a71..df5b978 100644

arch/arm/include/asm/arch-omap3/dss.h struct panel_config { · line 189

Quoted 9 lines
arch/arm/include/asm/arch-omap3/dss.h +3 -0
@@ -181,6 +181,10 @@ struct panel_config {
      void *frame_buffer;
  };
  +#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | \
+         ((fp - 1) << 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp << 20) | (fp << 8) | (sw - 1))
+
  /* Generic DSS Functions */
  void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
              u32 height, u32 width);

To make it a bit more clear what is set, perhaps we can define the fields themselves, this would save some /* hfp */ etc.

e.g.

arch/arm/include/asm/arch-omap3/dss.h +0 -0
index a830c43..b6ad72d 100644
@@ -182,6 +182,13 @@ struct panel_config {
        void *frame_buffer;
 };

arch/arm/include/asm/arch-omap3/dss.h struct panel_config { · line 194

Quoted 10 lines
arch/arm/include/asm/arch-omap3/dss.h +7 -0
+#define DSS_HPB(bp)    (((bp) - 1) << 20)
+#define DSS_HFB(fp)    (((fp) - 1) << 8)
+#define DSS_HSW(sw)    ((sw) - 1)
+#define DSS_VPB(bp)    ((bp) << 20)
+#define DSS_VFB(fp)    ((fp) << 8)
+#define DSS_VSW(sw)    ((sw) - 1)
+
 /* Generic DSS Functions */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
                        u32 height, u32 width);

Looks helpful to me, please make it so, thanks!

Signature · 1 line
Tom
author
#27 lore raw

PATCH v2 8/9 OMAP3: video: add macros to set display parameters

Quoted 41 lines · Tom Rini
Quoted 40 lines · Jeroen Hofstee
Quoted 15 lines · Stefano Babic

Add a common macros to set the registers for horizontal and vertical timing.

Signed-off-by Stefano Babic <[email protected]>

---

  arch/arm/include/asm/arch-omap3/dss.h |    4 ++++
  1 file changed, 4 insertions(+)
arch/arm/include/asm/arch-omap3/dss.h +0 -0
index 8913a71..df5b978 100644

arch/arm/include/asm/arch-omap3/dss.h struct panel_config { · line 189

Quoted 9 lines
arch/arm/include/asm/arch-omap3/dss.h +3 -0
@@ -181,6 +181,10 @@ struct panel_config {
      void *frame_buffer;
  };
  +#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | \
+         ((fp - 1) << 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp << 20) | (fp << 8) | (sw - 1))
+
  /* Generic DSS Functions */
  void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
              u32 height, u32 width);

To make it a bit more clear what is set, perhaps we can define the fields themselves, this would save some /* hfp */ etc.

e.g.

arch/arm/include/asm/arch-omap3/dss.h +0 -0
index a830c43..b6ad72d 100644
@@ -182,6 +182,13 @@ struct panel_config {
        void *frame_buffer;
 };
Quoted 14 lines

arch/arm/include/asm/arch-omap3/dss.h struct panel_config { · line 194

Quoted 11 lines
arch/arm/include/asm/arch-omap3/dss.h +7 -0
+#define DSS_HPB(bp)    (((bp) - 1) << 20)
+#define DSS_HFB(fp)    (((fp) - 1) << 8)
+#define DSS_HSW(sw)    ((sw) - 1)
+#define DSS_VPB(bp)    ((bp) << 20)
+#define DSS_VFB(fp)    ((fp) << 8)
+#define DSS_VSW(sw)    ((sw) - 1)
+
 /* Generic DSS Functions */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
                        u32 height, u32 width);

Looks helpful to me, please make it so, thanks!

Done in V3 !

Stefano

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
author
#28 lore raw

PATCH v2 9/9 OMAP3: mt_ventoux: added video support

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.c |   83 ++++++++++++++++++++++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    2 +-
 include/configs/mt_ventoux.h         |   16 +++++++
 3 files changed, 100 insertions(+), 1 deletion(-)
board/teejet/mt_ventoux/mt_ventoux.c +83 -0
index 814e72f..b8ad447 100644
@@ -21,13 +21,17 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <malloc.h>
 #include <fpga.h>
+#include <video_fb.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/omap_gpio.h>
 #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/dss.h>
+#include <asm/arch/clocks.h>
 #include <i2c.h>
 #include <spartan3.h>
 #include <asm/gpio.h>

@@ -53,6 +57,42 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FPGA_INIT	119
 #define FPGA_DONE	154
 
+#define LCD_PWR		138
+#define LCD_PON_PIN	139
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+static struct {
+	u32 xres;
+	u32 yres;
+} panel_resolution[] = {
+	{ 480, 272 },
+	{ 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+	{
+	.timing_h       = PANEL_TIMING_H(4, 8, 41),
+	.timing_v       = PANEL_TIMING_V(2, 4, 10),
+	.pol_freq       = 0x00000000, /* Pol Freq */
+	.divisor        = 0x0001000d, /* 33Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	},
+	{
+	.timing_h       = PANEL_TIMING_H(20, 192, 4),
+	.timing_v       = PANEL_TIMING_V(2, 20, 10),
+	.pol_freq       = 0x00004000, /* Pol Freq */
+	.divisor        = 0x0001000E, /* 36Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	}
+};
+#endif
+
 /* Timing definitions for FPGA */
 static const u32 gpmc_fpga[] = {
 	FPGA_GPMC_CONFIG1,

@@ -254,3 +294,46 @@ int board_mmc_init(bd_t *bis)
 	return omap_mmc_init(0, 0, 0);
 }
 #endif
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+	struct panel_config *panel = &lcd_cfg[0];
+	char *s;
+	u32 index = 0;
+
+	void *fb;
+
+	fb = (void *)0x88000000;
+
+	s = getenv("panel");
+	if (s) {
+		index = simple_strtoul(s, NULL, 10);
+		if (index < ARRAY_SIZE(lcd_cfg))
+			panel = &lcd_cfg[index];
+		else
+			return 0;
+	}
+
+	panel->frame_buffer = fb;
+	printf("Panel: %dx%d\n", panel_resolution[index].xres,
+		panel_resolution[index].yres);
+	panel->lcd_size = (panel_resolution[index].yres - 1) << 16 |
+		(panel_resolution[index].xres - 1);
+
+	gpio_request(LCD_PWR, "LCD Power");
+	gpio_request(LCD_PON_PIN, "LCD Pon");
+	gpio_direction_output(LCD_PWR, 0);
+	gpio_direction_output(LCD_PON_PIN, 1);
+
+
+	setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+	setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+
+	omap3_dss_panel_config(panel);
+	omap3_dss_enable();
+
+	return 0;
+}
+#endif
board/teejet/mt_ventoux/mt_ventoux.h +1 -1
index eadb8a5..1cd7ec2 100644
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MMC2_DAT5),		(IDIS  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC2_DAT6),		(IDIS  | PTU | EN  | M4)) \
 			/* GPIO_138: LCD_ENVD */\
-	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTU | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTD | EN  | M4)) \
 			/* GPIO_139: LCD_PON */\
 	/* McBSP */\
 	MUX_VAL(CP(MCBSP_CLKS),		(IEN  | PTU | DIS | M0)) \
include/configs/mt_ventoux.h +16 -0
index 131670a..8d35943 100644
@@ -2,6 +2,9 @@
  * Copyright (C) 2011
  * Stefano Babic, DENX Software Engineering, sbabic at denx.de.
  *
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
  * Copyright (C) 2009 TechNexion Ltd.
  *
  * This program is free software; you can redistribute it and/or modify

@@ -24,6 +27,10 @@
 
 #include "tam3517-common.h"
 
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10) + \
+					6 * 1024 * 1024)
+
 #define MACH_TYPE_AM3517_MT_VENTOUX	3832
 #define CONFIG_MACH_TYPE	MACH_TYPE_AM3517_MT_VENTOUX
 

@@ -63,6 +70,15 @@
 #define CONFIG_FPGA_DELAY() udelay(1)
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #define	CONFIG_EXTRA_ENV_SETTINGS	CONFIG_TAM3517_SETTINGS \
 	"bootcmd=run net_nfs\0"
Signature · 1 line
1.7.9.5
author
#29 lore raw

v3 cover This patchset updates boards based on the TAM3517 SOM.

In reply to Stefano Babic

The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board.

Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)

Stefano Babic (9):
OMAP3: tam3517: add function to read MAC from EEPROM
OMAP3: twister : get MAC address from EEPROM
OMAP3: mt_ventoux: Correct board pinmux
OMAP3: mt_ventoux: activate GPIO4
OMAP3: mt_ventoux: read MAC address from EEPROM
OMAP3: mt_ventoux: disable the buzzer at start-up
video: drop duplicate set of DISPC_CONFIG register
OMAP3: video: add macros to set display parameters
OMAP3: mt_ventoux: added video support

 arch/arm/include/asm/arch-omap3/dss.h |   11 +++-
 board/technexion/twister/twister.c    |   10 +++
 board/teejet/mt_ventoux/mt_ventoux.c  |  113 +++++++++++++++++++++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h  |   80 ++++++++++-------------
 drivers/video/omap3_dss.c             |    3 +-
 include/configs/mt_ventoux.h          |   17 +++++
 include/configs/tam3517-common.h      |   66 +++++++++++++++++++
 7 files changed, 251 insertions(+), 49 deletions(-)
Signature · 1 line
1.7.9.5
author
#30 lore raw

PATCH v3 1/9 OMAP3: tam3517: add function to read MAC from EEPROM

The manufacturer delivers the TAM3517 SOM with 4 MAC address. They are stored on the EEPROM of the SOM. The patch adds a function to get their values and set the ethaddr variables.

Signed-off-by Stefano Babic <[email protected]>

---
Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)

 include/configs/tam3517-common.h |   66 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)
include/configs/tam3517-common.h +66 -0
index 24f6f7e..51503da 100644
@@ -125,6 +125,7 @@
 #define CONFIG_CMD_NAND		/* NAND support			*/
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
 
 #undef CONFIG_CMD_FLASH		/* only NAND on the SOM */
 #undef CONFIG_CMD_IMLS

@@ -135,6 +136,9 @@
 #define CONFIG_SYS_I2C_SLAVE		1
 #define CONFIG_SYS_I2C_BUS		0
 #define CONFIG_SYS_I2C_BUS_SELECT	1
+#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
 #define CONFIG_DRIVER_OMAP34XX_I2C
 
 

@@ -354,4 +358,66 @@
 		"fi;"							\
 		"else echo U-Boot not downloaded..exiting;fi\0"		\
 
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+	char customer[48];
+	char product[48];
+
+	/*
+	 * bit 0~47  : sequence number
+	 * bit 48~55 : week of year, from 0.
+	 * bit 56~63 : year
+	 */
+	unsigned long long sequence_number;
+
+	/*
+	 * bit 0~7   : revision fixed
+	 * bit 8~15  : revision major
+	 * bit 16~31 : TNxxx
+	 */
+	unsigned int revision;
+	unsigned char eth_addr[4][8];
+	unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM	\
+do {					\
+	struct tam3517_module_info info;\
+	char buf[80], ethname[20];	\
+	int i;				\
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);	\
+	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,		\
+			(void *)&info, sizeof(info)))		\
+		break;						\
+	memset(buf, 0, sizeof(buf));				\
+	for (i = 0 ; i < ARRAY_SIZE(info.eth_addr); i++) {	\
+		sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",	\
+			info.eth_addr[i][5],			\
+			info.eth_addr[i][4],			\
+			info.eth_addr[i][3],			\
+			info.eth_addr[i][2],			\
+			info.eth_addr[i][1],			\
+			info.eth_addr[i][0]);			\
+								\
+		if (i)						\
+			sprintf(ethname, "eth%daddr", i);	\
+		else						\
+			sprintf(ethname, "ethaddr");		\
+		printf("Setting %s from EEPROM with %s\n", ethname, buf);\
+		setenv(ethname, buf);				\
+	}							\
+} while (0)
+#endif
+
 #endif /* __TAM3517_H */
Signature · 1 line
1.7.9.5
author
#31 lore raw

PATCH v3 2/9 OMAP3: twister : get MAC address from EEPROM

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/technexion/twister/twister.c |   10 ++++++++++
 1 file changed, 10 insertions(+)
board/technexion/twister/twister.c +10 -0
index c2b10ac..7429e93 100644
@@ -100,8 +100,18 @@ int board_init(void)
 
 int misc_init_r(void)
 {
+	char *eth_addr;
+
 	dieid_num_r();
 
+	eth_addr = getenv("ethaddr");
+	if (eth_addr)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
 	return 0;
 }
Signature · 1 line
1.7.9.5
author
#32 lore raw

PATCH v3 3/9 OMAP3: mt_ventoux: Correct board pinmux

In reply to Stefano Babic

Fix some issues (some pins were not set as GPIOs)

Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.h |   74 +++++++++++++++-------------------
 1 file changed, 33 insertions(+), 41 deletions(-)
board/teejet/mt_ventoux/mt_ventoux.h +33 -41
index 9b2e43e..d1fee25 100644
@@ -142,7 +142,8 @@ const omap3_sysinfo sysinfo = {
 			/*GPIO_62: FPGA_RESET */ \
 	MUX_VAL(CP(GPMC_WAIT0),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(GPMC_WAIT1),		(IEN  | PTU | EN  | M4)) \
-	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) /*GPIO_64*/ \
+	MUX_VAL(CP(GPMC_WAIT2),		(IEN  | PTU | EN  | M4)) \
+			/* GPIO_64*/ \
 	MUX_VAL(CP(GPMC_WAIT3),		(IEN  | PTU | EN  | M4)) \
 	/* DSS */\
 	MUX_VAL(CP(DSS_PCLK),		(IDIS | PTD | DIS | M0)) \

@@ -174,26 +175,6 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(DSS_DATA22),		(IDIS | PTD | DIS | M0)) \
 	MUX_VAL(CP(DSS_DATA23),		(IDIS | PTD | DIS | M0)) \
 	/* CAMERA */\
-	MUX_VAL(CP(CAM_HS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_VS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_XCLKA),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_PCLK),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CAM_FLD),		(IDIS | PTD | DIS | M4)) /*GPIO_98*/\
-	MUX_VAL(CP(CAM_D0),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D1),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D2),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D3),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D4),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D5),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D6),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D7),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D8),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D9),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D10),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_D11),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_XCLKB),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(CAM_WEN),		(IEN  | PTD | DIS | M4)) /*GPIO_167*/\
-	MUX_VAL(CP(CAM_STROBE),		(IDIS | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DX0),		(IEN  | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DY0),		(IEN  | PTD | DIS | M0)) \
 	MUX_VAL(CP(CSI2_DX1),		(IEN  | PTD | DIS | M0)) \

@@ -209,6 +190,7 @@ const omap3_sysinfo sysinfo = {
 			/* GPIO_126: CardDetect */\
 	MUX_VAL(CP(MMC1_DAT5),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC1_DAT6),		(IEN  | PTU | EN  | M4)) \
+			/*GPIO_128 */ \
 	MUX_VAL(CP(MMC1_DAT7),		(IEN  | PTU | EN  | M4)) \
 	\
 	MUX_VAL(CP(MMC2_CLK),		(IEN  | PTU | EN | M0)) /*MMC2_CLK*/\

@@ -250,7 +232,7 @@ const omap3_sysinfo sysinfo = {
 	\
 	MUX_VAL(CP(MCBSP4_CLKX),	(IEN | PTD | DIS | M4)) \
 			/*GPIO_152: Ignition Sense */ \
-	MUX_VAL(CP(MCBSP4_DR),		(IDIS | PTD | DIS | M4)) \
+	MUX_VAL(CP(MCBSP4_DR),		(IEN | PTD | DIS | M4)) \
 			/*GPIO_153: Power Button Sense */ \
 	MUX_VAL(CP(MCBSP4_DX),		(IEN | PTU | DIS | M4)) \
 			/* GPIO_154: FPGA_DONE */ \

@@ -264,10 +246,14 @@ const omap3_sysinfo sysinfo = {
 			/* GPIO_150: USB status 1 */\
 	\
 	MUX_VAL(CP(UART1_RX),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(UART2_RTS),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M0)) \
-	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M2)) \
+			/* gpt9_pwm */\
+	MUX_VAL(CP(UART2_RTS),		(IEN | PTD | DIS | M2)) \
+			/* gpt10_pwm */\
+	MUX_VAL(CP(UART2_TX),		(IEN | PTD | DIS | M2)) \
+			/* gpt8_pwm */\
+	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M2)) \
+			/* gpt11_pwm */\
 	\
 	MUX_VAL(CP(UART3_CTS_RCTX),	(IDIS  | PTD | DIS | M4)) \
 			/*GPIO_163 : TS_PENIRQ*/ \

@@ -299,22 +285,24 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | EN  | M4)) \
 	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | EN  | M0)) \
 	/* CCDC */\
-	MUX_VAL(CP(CCDC_PCLK),		(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CCDC_PCLK),		(IEN  | PTU | EN  | M4)) \
+			/* GPIO94 */\
 	MUX_VAL(CP(CCDC_FIELD),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO95: #Enable Output */\
-	MUX_VAL(CP(CCDC_HD),		(IEN  | PTU | EN  | M0)) \
-	MUX_VAL(CP(CCDC_VD),		(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CCDC_HD),		(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(CCDC_VD),		(IEN  | PTU | EN  | M4)) \
 	MUX_VAL(CP(CCDC_WEN),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO 99: #SOM_PWR_OFF */\
-	MUX_VAL(CP(CCDC_DATA0),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CCDC_DATA0),		(IEN  | PTD | DIS | M4)) \
 	MUX_VAL(CP(CCDC_DATA1),		(IEN  | PTD | DIS | M4)) \
 			/* GPIO_100: #power out */\
-	MUX_VAL(CP(CCDC_DATA2),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA3),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA4),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA5),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA6),		(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(CCDC_DATA7),		(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CCDC_DATA2),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA3),		(IEN  | PTD | DIS | M4)) \
+			/* GPIO_102 */\
+	MUX_VAL(CP(CCDC_DATA4),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA5),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA6),		(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CCDC_DATA7),		(IEN  | PTD | DIS | M4)) \
 	/* RMII */\
 	MUX_VAL(CP(RMII_MDIO_DATA),	(IEN  |  M0)) \
 	MUX_VAL(CP(RMII_MDIO_CLK),	(M0)) \

@@ -363,7 +351,8 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(SYS_BOOT8),		(IEN  | PTD | EN  | M0)) \
 	\
 	MUX_VAL(CP(SYS_OFF_MODE),	(IEN  | PTD | DIS | M0)) \
-	MUX_VAL(CP(SYS_CLKOUT1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_CLKOUT1),	(IDIS | PTD | DIS | M4)) \
+			/* gpio_10 */\
 	MUX_VAL(CP(SYS_CLKOUT2),	(IEN  | PTU | EN  | M0)) \
 	/* JTAG */\
 	MUX_VAL(CP(JTAG_nTRST),		(IEN  | PTD | DIS | M0)) \

@@ -387,12 +376,15 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(ETK_D7_ES2),		(IEN  | PTU | EN  | M3)) \
 	MUX_VAL(CP(ETK_D8_ES2),		(IEN  | PTD | EN  | M3)) \
 	MUX_VAL(CP(ETK_D9_ES2),		(IEN  | PTD | EN  | M3)) \
-	MUX_VAL(CP(ETK_D10_ES2),	(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTD | EN  | M4)) \
+					/* gpio_24 */\
 	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTD | DIS | M4)) \
-	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M3)) \
+	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M4)) \
+					/* gpio_26 */\
 	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | DIS | M3)) \
-	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M3)) \
-	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M3)) \
+	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M4)) \
+					/* gpio_29 */\
 	/* Die to Die */\
 	MUX_VAL(CP(D2D_MCAD34),		(IEN  | PTD | EN  | M0)) \
 	MUX_VAL(CP(D2D_MCAD35),		(IEN  | PTD | EN  | M0)) \
Signature · 1 line
1.7.9.5
author
#33 lore raw

PATCH v3 4/9 OMAP3: mt_ventoux: activate GPIO4

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 include/configs/mt_ventoux.h |    1 +
 1 file changed, 1 insertion(+)
include/configs/mt_ventoux.h +1 -0
index 5db6d57..131670a 100644
@@ -31,6 +31,7 @@
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_AUTO_COMPLETE
 
+#define CONFIG_OMAP3_GPIO_4
 #define CONFIG_HOSTNAME mt_ventoux
 
 /*
Signature · 1 line
1.7.9.5
author
#34 lore raw

PATCH v3 5/9 OMAP3: mt_ventoux: read MAC address from EEPROM

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.c |   16 ++++++++++++++++
 1 file changed, 16 insertions(+)
board/teejet/mt_ventoux/mt_ventoux.c +16 -0
index 9fbaedd..b7744a9 100644
@@ -196,6 +196,22 @@ int board_init(void)
 	return 0;
 }
 
+int misc_init_r(void)
+{
+	char *eth_addr;
+
+	dieid_num_r();
+
+	eth_addr = getenv("ethaddr");
+	if (eth_addr)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+	return 0;
+}
+
 /*
  * Routine: set_muxconf_regs
  * Description: Setting up the configuration Mux registers specific to the
Signature · 1 line
1.7.9.5
author
#35 lore raw

PATCH v3 6/9 OMAP3: mt_ventoux: disable the buzzer at start-up

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.c |   14 ++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    4 ----
 2 files changed, 14 insertions(+), 4 deletions(-)
board/teejet/mt_ventoux/mt_ventoux.c +14 -0
index b7744a9..814e72f 100644
@@ -39,6 +39,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define BUZZER		140
+#define SPEAKER		141
+
 #ifndef CONFIG_FPGA
 #error "The Teejet mt_ventoux must have CONFIG_FPGA enabled"
 #endif

@@ -193,6 +196,17 @@ int board_init(void)
 
 	mt_ventoux_init_fpga();
 
+	/* GPIO_140: speaker #mute */
+	MUX_VAL(CP(MCBSP3_DX),		(IEN | PTU | EN | M4))
+	/* GPIO_141: Buzz Hi */
+	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTU | EN | M4))
+
+	/* Turning off the buzzer */
+	gpio_request(BUZZER, "BUZZER_MUTE");
+	gpio_request(SPEAKER, "SPEAKER");
+	gpio_direction_output(BUZZER, 0);
+	gpio_direction_output(SPEAKER, 0);
+
 	return 0;
 }
board/teejet/mt_ventoux/mt_ventoux.h +0 -4
index d1fee25..eadb8a5 100644
@@ -223,10 +223,6 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCBSP2_DX),		(IEN | PTD | EN | M4)) \
 			/* GPIO_119: FPGA_INIT */ \
 	\
-	MUX_VAL(CP(MCBSP3_DX),		(IEN | PTU | EN | M4)) \
-			/* GPIO_140: speaker #mute */\
-	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTU | EN | M4)) \
-			/* GPIO_141: Buzz Hi */\
 	MUX_VAL(CP(MCBSP3_CLKX),	(IEN  | PTU | EN | M4)) \
 	MUX_VAL(CP(MCBSP3_FSX),		(IEN  | PTU | EN | M4)) \
 	\
Signature · 1 line
1.7.9.5
author
#36 lore raw

PATCH v3 7/9 video: drop duplicate set of DISPC_CONFIG register

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 arch/arm/include/asm/arch-omap3/dss.h |    1 -
 drivers/video/omap3_dss.c             |    3 +--
 2 files changed, 1 insertion(+), 3 deletions(-)
arch/arm/include/asm/arch-omap3/dss.h +0 -1
index a830c43..8913a71 100644
@@ -142,7 +142,6 @@ struct venc_regs {
 };
 
 /* Few Register Offsets */
-#define FRAME_MODE_SHIFT			1
 #define TFTSTN_SHIFT				3
 #define DATALINES_SHIFT				8
drivers/video/omap3_dss.c +1 -2
index 6686718..b1424bf 100644
@@ -112,7 +112,7 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	writel(panel_cfg->pol_freq, &dispc->pol_freq);
 	writel(panel_cfg->divisor, &dispc->divisor);
 	writel(panel_cfg->lcd_size, &dispc->size_lcd);
-	writel(panel_cfg->load_mode << FRAME_MODE_SHIFT, &dispc->config);
+	writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
 	writel(panel_cfg->panel_type << TFTSTN_SHIFT |
 		panel_cfg->data_lines << DATALINES_SHIFT, &dispc->control);
 	writel(panel_cfg->panel_color, &dispc->default_color0);

@@ -121,7 +121,6 @@ void omap3_dss_panel_config(const struct panel_config *panel_cfg)
 	if (!panel_cfg->frame_buffer)
 		return;
 
-	writel(panel_cfg->load_mode << LOADMODE_SHIFT, &dispc->config);
 	writel(8 << GFX_FORMAT_SHIFT | GFX_ENABLE, &dispc->gfx_attributes);
 	writel(1, &dispc->gfx_row_inc);
 	writel(1, &dispc->gfx_pixel_inc);
Signature · 1 line
1.7.9.5
author
#37 lore raw

PATCH v3 8/9 OMAP3: video: add macros to set display parameters

In reply to Stefano Babic

Add a common macros to set the registers for horizontal and vertical timing.

Signed-off-by Stefano Babic <[email protected]>

---
Changes in v2:
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker)

Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)

 arch/arm/include/asm/arch-omap3/dss.h |   10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/include/asm/arch-omap3/dss.h +10 -0
index 8913a71..54add4b 100644
@@ -181,6 +181,16 @@ struct panel_config {
 	void *frame_buffer;
 };
 
+#define DSS_HBP(bp)    (((bp) - 1) << 20)
+#define DSS_HFP(fp)    (((fp) - 1) << 8)
+#define DSS_HSW(sw)    ((sw) - 1)
+#define DSS_VBP(bp)    ((bp) << 20)
+#define DSS_VFP(fp)    ((fp) << 8)
+#define DSS_VSW(sw)    ((sw) - 1)
+
+#define PANEL_TIMING_H(bp, fp, sw) (DSS_HBP(bp) | DSS_HFP(fp) | DSS_HSW(sw))
+#define PANEL_TIMING_V(bp, fp, sw) (DSS_VBP(bp) | DSS_VFP(fp) | DSS_VSW(sw))
+
 /* Generic DSS Functions */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
 			u32 height, u32 width);
Signature · 1 line
1.7.9.5
author
#38 lore raw

PATCH v3 9/9 OMAP3: mt_ventoux: added video support

In reply to Stefano Babic
Signed-off-by Stefano Babic <[email protected]>

---

 board/teejet/mt_ventoux/mt_ventoux.c |   83 ++++++++++++++++++++++++++++++++++
 board/teejet/mt_ventoux/mt_ventoux.h |    2 +-
 include/configs/mt_ventoux.h         |   16 +++++++
 3 files changed, 100 insertions(+), 1 deletion(-)
board/teejet/mt_ventoux/mt_ventoux.c +83 -0
index 814e72f..b8ad447 100644
@@ -21,13 +21,17 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <malloc.h>
 #include <fpga.h>
+#include <video_fb.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/omap_gpio.h>
 #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/dss.h>
+#include <asm/arch/clocks.h>
 #include <i2c.h>
 #include <spartan3.h>
 #include <asm/gpio.h>

@@ -53,6 +57,42 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FPGA_INIT	119
 #define FPGA_DONE	154
 
+#define LCD_PWR		138
+#define LCD_PON_PIN	139
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+static struct {
+	u32 xres;
+	u32 yres;
+} panel_resolution[] = {
+	{ 480, 272 },
+	{ 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+	{
+	.timing_h       = PANEL_TIMING_H(4, 8, 41),
+	.timing_v       = PANEL_TIMING_V(2, 4, 10),
+	.pol_freq       = 0x00000000, /* Pol Freq */
+	.divisor        = 0x0001000d, /* 33Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	},
+	{
+	.timing_h       = PANEL_TIMING_H(20, 192, 4),
+	.timing_v       = PANEL_TIMING_V(2, 20, 10),
+	.pol_freq       = 0x00004000, /* Pol Freq */
+	.divisor        = 0x0001000E, /* 36Mhz Pixel Clock */
+	.panel_type     = 0x01, /* TFT */
+	.data_lines     = 0x03, /* 24 Bit RGB */
+	.load_mode      = 0x02, /* Frame Mode */
+	.panel_color	= 0,
+	}
+};
+#endif
+
 /* Timing definitions for FPGA */
 static const u32 gpmc_fpga[] = {
 	FPGA_GPMC_CONFIG1,

@@ -254,3 +294,46 @@ int board_mmc_init(bd_t *bis)
 	return omap_mmc_init(0, 0, 0);
 }
 #endif
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+	struct panel_config *panel = &lcd_cfg[0];
+	char *s;
+	u32 index = 0;
+
+	void *fb;
+
+	fb = (void *)0x88000000;
+
+	s = getenv("panel");
+	if (s) {
+		index = simple_strtoul(s, NULL, 10);
+		if (index < ARRAY_SIZE(lcd_cfg))
+			panel = &lcd_cfg[index];
+		else
+			return 0;
+	}
+
+	panel->frame_buffer = fb;
+	printf("Panel: %dx%d\n", panel_resolution[index].xres,
+		panel_resolution[index].yres);
+	panel->lcd_size = (panel_resolution[index].yres - 1) << 16 |
+		(panel_resolution[index].xres - 1);
+
+	gpio_request(LCD_PWR, "LCD Power");
+	gpio_request(LCD_PON_PIN, "LCD Pon");
+	gpio_direction_output(LCD_PWR, 0);
+	gpio_direction_output(LCD_PON_PIN, 1);
+
+
+	setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+	setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+
+	omap3_dss_panel_config(panel);
+	omap3_dss_enable();
+
+	return 0;
+}
+#endif
board/teejet/mt_ventoux/mt_ventoux.h +1 -1
index eadb8a5..1cd7ec2 100644
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MMC2_DAT5),		(IDIS  | PTU | EN  | M4)) \
 	MUX_VAL(CP(MMC2_DAT6),		(IDIS  | PTU | EN  | M4)) \
 			/* GPIO_138: LCD_ENVD */\
-	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTU | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT7),		(IDIS  | PTD | EN  | M4)) \
 			/* GPIO_139: LCD_PON */\
 	/* McBSP */\
 	MUX_VAL(CP(MCBSP_CLKS),		(IEN  | PTU | DIS | M0)) \
include/configs/mt_ventoux.h +16 -0
index 131670a..8d35943 100644
@@ -2,6 +2,9 @@
  * Copyright (C) 2011
  * Stefano Babic, DENX Software Engineering, sbabic at denx.de.
  *
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
  * Copyright (C) 2009 TechNexion Ltd.
  *
  * This program is free software; you can redistribute it and/or modify

@@ -24,6 +27,10 @@
 
 #include "tam3517-common.h"
 
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10) + \
+					6 * 1024 * 1024)
+
 #define MACH_TYPE_AM3517_MT_VENTOUX	3832
 #define CONFIG_MACH_TYPE	MACH_TYPE_AM3517_MT_VENTOUX
 

@@ -63,6 +70,15 @@
 #define CONFIG_FPGA_DELAY() udelay(1)
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 
+#define CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
 #define	CONFIG_EXTRA_ENV_SETTINGS	CONFIG_TAM3517_SETTINGS \
 	"bootcmd=run net_nfs\0"
Signature · 1 line
1.7.9.5
#39 lore raw

v3 cover This patchset updates boards based on the TAM3517 SOM.

In reply to Stefano Babic
Quoted 11 lines · Stefano Babic

The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board.

Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)

Barring further comments, I plan to pick this up Friday for u-boot-ti/master, thanks!

Signature · 1 line
Tom
#40 lore raw

v3 cover This patchset updates boards based on the TAM3517 SOM.

Quoted 10 lines · Tom Rini
Quoted 9 lines · Stefano Babic

The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board.

Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

Quoted 5 lines
Quoted 2 lines

Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)

Barring further comments, I plan to pick this up Friday for u-boot-ti/master, thanks!

Applied to u-boot-ti/master, thanks!

Signature · 8 lines
Tom
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#41 lore raw

v3 cover This patchset updates boards based on the TAM3517 SOM.

In reply to Stefano Babic
Quoted 11 lines · Stefano Babic

The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board.

Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee)

Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)

I gave this a quick spin on Beagleboard / Beagleboard xM due to the video changes, and all is as good as before.

Tested-by Tom Rini <[email protected]>
Signature · 1 line
Tom