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ARM: Exynos4: Turn off clocks for NAND, OneNAND and TSI controllers

PATCH New Chander Kashyap 3 participants 3 messages Aug 24, 2012 – Aug 28, 2012

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#0 lore raw

PATCH 1/1 ARM: Exynos4: Turn off clocks for NAND, OneNAND and TSI controllers

The clocks for NAND, OneNAND and Transport Stream Interface(TSI) controllers could be either enabled or disabled at boot. To ensure that these are turned off until used, add them to the list of clocks to be turned off during boot.

---
 arch/arm/mach-exynos/clock-exynos4.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/mach-exynos/clock-exynos4.c +12 -0
index 2f51293..7cc5491 100644
@@ -501,6 +501,10 @@ static struct clk exynos4_init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_cam_ctrl,
 		.ctrlbit	= (1 << 3),
 	}, {
+		.name		= "tsi",
+		.enable		= exynos4_clk_ip_fsys_ctrl,
+		.ctrlbit	= (1 << 4),
+	}, {
 		.name		= "hsmmc",
 		.devname	= "exynos4-sdhci.0",
 		.parent		= &exynos4_clk_aclk_133.clk,
@@ -530,6 +534,14 @@ static struct clk exynos4_init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_fsys_ctrl,
 		.ctrlbit	= (1 << 9),
 	}, {
+		.name		= "onenand",
+		.enable		= exynos4_clk_ip_fsys_ctrl,
+		.ctrlbit	= (1 << 15),
+	}, {
+		.name		= "nfcon",
+		.enable		= exynos4_clk_ip_fsys_ctrl,
+		.ctrlbit	= (1 << 16),
+	}, {
 		.name		= "dac",
 		.devname	= "s5p-sdo",
 		.enable		= exynos4_clk_ip_tv_ctrl,
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/1 ARM: Exynos4: Turn off clocks for NAND, OneNAND and TSI controllers

Quoted 41 lines · Chander Kashyap

The clocks for NAND, OneNAND and Transport Stream Interface(TSI) controllers could be either enabled or disabled at boot. To ensure that these are turned off until used, add them to the list of clocks to be turned off during boot.

---
 arch/arm/mach-exynos/clock-exynos4.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/mach-exynos/clock-exynos4.c +12 -1
index 2f51293..7cc5491 100644
@@ -501,6 +501,10 @@ static struct clk exynos4_init_clocks_off[] = {
                .enable         = exynos4_clk_ip_cam_ctrl,
                .ctrlbit        = (1 << 3),
        }, {
+               .name           = "tsi",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1 << 4),
+       }, {
                .name           = "hsmmc",
                .devname        = "exynos4-sdhci.0",
                .parent         = &exynos4_clk_aclk_133.clk,
@@ -530,6 +534,14 @@ static struct clk exynos4_init_clocks_off[] = {
                .enable         = exynos4_clk_ip_fsys_ctrl,
                .ctrlbit        = (1 << 9),
        }, {
+               .name           = "onenand",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1 << 15),
+       }, {
+               .name           = "nfcon",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1 << 16),
+       }, {
                .name           = "dac",
                .devname        = "s5p-sdo",
                .enable         = exynos4_clk_ip_tv_ctrl,
--
Quoted 1 line

1.7.9.5

Applied
#2 lore raw

PATCH 1/1 ARM: Exynos4: Turn off clocks for NAND, OneNAND and TSI controllers

Quoted 37 lines · Thomas Abraham
Quoted 36 lines · Chander Kashyap

The clocks for NAND, OneNAND and Transport Stream Interface(TSI) controllers could be either enabled or disabled at boot. To ensure that these are turned off until used, add them to the list of clocks to be turned off during boot.

---
  arch/arm/mach-exynos/clock-exynos4.c |   12 ++++++++++++
  1 file changed, 12 insertions(+)
arch/arm/mach-exynos/clock-exynos4.c +11 -0
index 2f51293..7cc5491 100644
@@ -501,6 +501,10 @@ static struct clk exynos4_init_clocks_off[] = {
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1<<  3),
         }, {
+               .name           = "tsi",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1<<  4),
+       }, {
                 .name           = "hsmmc",
                 .devname        = "exynos4-sdhci.0",
                 .parent         =&exynos4_clk_aclk_133.clk,
@@ -530,6 +534,14 @@ static struct clk exynos4_init_clocks_off[] = {
                 .enable         = exynos4_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1<<  9),
         }, {
+               .name           = "onenand",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1<<  15),
+       }, {
+               .name           = "nfcon",
+               .enable         = exynos4_clk_ip_fsys_ctrl,
+               .ctrlbit        = (1<<  16),
Quoted 8 lines
Quoted 6 lines
arch/arm/mach-exynos/clock-exynos4.c +1 -1
+       }, {
                 .name           = "dac",
                 .devname        = "s5p-sdo",
                 .enable         = exynos4_clk_ip_tv_ctrl,
--

1.7.9.5

Applied, thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.