MX28: Add CONFIG_MX28_DEBUG
Subsystems (2)
PATCH 1/2 MX28: Add CONFIG_MX28_DEBUG
This functionality allows configuring SCRATCH0 and SCRATCH1 registers to special values, which make the SPL hang after the CPU was properly initialized.
This is for bootstrap purposes only and MUST BE DISABLED for normal operation.
--- arch/arm/cpu/arm926ejs/mxs/Makefile | 3 ++ arch/arm/cpu/arm926ejs/mxs/mxs_init.h | 6 +++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 2 + arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 63 ++++++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+) create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
arch/arm/cpu/arm926ejs/mxs/Makefile +3 -0
@@ -29,6 +29,9 @@ COBJS = clock.o mxs.o iomux.o timer.o ifdef CONFIG_SPL_BUILD COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o +ifdef CONFIG_MX28_DEBUG +COBJS += spl_debug.o +endif endif SRCS := $(START:.o=.S) $(COBJS:.o=.c)
arch/arm/cpu/arm926ejs/mxs/mxs_init.h +6 -0
@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);void mxs_lradc_init (void );void mxs_lradc_enable_batt_measurement (void ); +#ifdef CONFIG_MX28_DEBUG +void mx28_common_spl_debug_halt (void ); +#else +static inline void mx28_common_spl_debug_halt (void ) {} +#endif +#endif /* __M28_INIT_H__ */
arch/arm/cpu/arm926ejs/mxs/spl_boot.c +2 -0
@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, data->boot_mode_idx = bootmode; +mx28_common_spl_debug_halt (); +mxs_power_wait_pswitch (); }
arch/arm/cpu/arm926ejs/mxs/spl_debug.c new file +63 -0
63 lines not on this page · raw message
Signature · 1 line
1.7.10.4
PATCH 2/2 MX28: Add LRADC dump into SPL debug
This is useful if the power management on the chip isn't properly initialized. It's possible to use the internal LRADC to sample various power rails and debug the problem.
--- arch/arm/cpu/arm926ejs/mxs/mxs_init.h | 2 + arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 3 ++ arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 89 ++++++++++++++++++++++++++++++++ 3 files changed, 94 insertions(+)
arch/arm/cpu/arm926ejs/mxs/mxs_init.h +2 -0
@@ -44,8 +44,10 @@ void mxs_lradc_enable_batt_measurement(void);#ifdef CONFIG_MX28_DEBUG void mx28_common_spl_debug_halt (void ); +void mx28_read_lradc (void );#else static inline void mx28_common_spl_debug_halt (void ) {} +static inline void mx28_read_lradc (void ) {}#endif #endif /* __M28_INIT_H__ */
arch/arm/cpu/arm926ejs/mxs/spl_boot.c +3 -0
@@ -104,6 +104,9 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,mxs_power_init ();mxs_mem_init (); + +mx28_read_lradc (); + data->mem_dram_size =mxs_mem_get_size (); data->boot_mode_idx = bootmode;
arch/arm/cpu/arm926ejs/mxs/spl_debug.c +89 -0
92 lines not on this page · raw message
Signature · 1 line
1.7.10.4
PATCH 1/2 MX28: Add CONFIG_MX28_DEBUG
In reply to Marek VasutQuoted 4 lines · Marek Vasut
This functionality allows configuring SCRATCH0 and SCRATCH1 registers to special values, which make the SPL hang after the CPU was properly initialized.
Quoted 8 lines
This is for bootstrap purposes only and MUST BE DISABLED for normal operation.
Signed-off-by Marek Vasut <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Stefano Babic <[email protected]>Cc Fabio Estevam <[email protected]>---
Hi Marek,
Quoted 41 lines
arch/arm/cpu/arm926ejs/mxs/Makefile | 3 ++ arch/arm/cpu/arm926ejs/mxs/mxs_init.h | 6 +++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 2 + arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 63 ++++++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+) create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.carch/arm/cpu/arm926ejs/mxs/Makefile +3
-0@@ -29,6 +29,9 @@ COBJS = clock.o mxs.o iomux.o timer.o ifdef CONFIG_SPL_BUILD COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o +ifdef CONFIG_MX28_DEBUG +COBJS += spl_debug.o +endif endif SRCS := $(START:.o=.S) $(COBJS:.o=.c)arch/arm/cpu/arm926ejs/mxs/mxs_init.h +6
-0@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);void mxs_lradc_init (void );void mxs_lradc_enable_batt_measurement (void ); +#ifdef CONFIG_MX28_DEBUG +void mx28_common_spl_debug_halt (void ); +#else +static inline void mx28_common_spl_debug_halt (void ) {} +#endif +#endif /* __M28_INIT_H__ */ arch/arm/cpu/arm926ejs/mxs/spl_boot.c +0
-0
arch/arm/cpu/arm926ejs/mxs/spl_boot.c void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, · line 114
Quoted 7 lines
arch/arm/cpu/arm926ejs/mxs/spl_boot.c +2
-0@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, data->boot_mode_idx = bootmode; +mx28_common_spl_debug_halt (); +mxs_power_wait_pswitch (); }
I admit I use the same trick when the first initialization fails and I want to check what happens. Make the SOC hanging helps, sure.
However, this is part of the porting / development. Why should we introduce this code into mainline ? In the official configuration file CONFIG_MX28_DEBUG must be off, and then all this stuff is dead code.
Regards,
Stefano
Signature · 5 lines
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PATCH 1/2 MX28: Add CONFIG_MX28_DEBUG
Dear Stefano Babic,
Quoted 70 lines · Marek Vasut
Quoted 4 lines
This functionality allows configuring SCRATCH0 and SCRATCH1 registers to special values, which make the SPL hang after the CPU was properly initialized.
Quoted 8 lines
This is for bootstrap purposes only and MUST BE DISABLED for normal operation.
Signed-off-by Marek Vasut <[email protected]>Cc Wolfgang Denk <[email protected]>Cc Stefano Babic <[email protected]>Cc Fabio Estevam <[email protected]>---
Hi Marek,
Quoted 54 lines
arch/arm/cpu/arm926ejs/mxs/Makefile | 3 ++ arch/arm/cpu/arm926ejs/mxs/mxs_init.h | 6 +++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 2 + arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 63 ++++++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+) create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c(quoted diff) +0
-0b/arch/arm/cpu/arm926ejs/mxs/Makefile index eeecf89..e75eabd 100644
arch/arm/cpu/arm926ejs/mxs/Makefile +3
-0@@ -29,6 +29,9 @@ COBJS = clock.o mxs.o iomux.o timer.o ifdef CONFIG_SPL_BUILD COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o +ifdef CONFIG_MX28_DEBUG +COBJS += spl_debug.o +endif endifSRCS := $(START:.o=.S) $(COBJS:.o=.c)
(quoted diff) +0
-0
b/arch/arm/cpu/arm926ejs/mxs/mxs_init.hindex 2ddc5bc..e6f837c 100644arch/arm/cpu/arm926ejs/mxs/mxs_init.h +6
-0@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);void mxs_lradc_init (void );void mxs_lradc_enable_batt_measurement (void ); +#ifdef CONFIG_MX28_DEBUG +void mx28_common_spl_debug_halt (void ); +#else +static inline void mx28_common_spl_debug_halt (void ) {} +#endif +#endif /*
__M28_INIT_H__*/(quoted diff) +0
-0
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.cindex ad66c57..f4f0c09 100644arch/arm/cpu/arm926ejs/mxs/spl_boot.c +2
-0@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup, data->boot_mode_idx = bootmode; +mx28_common_spl_debug_halt (); +
Quoted 6 lines
Quoted 3 lines
arch/arm/cpu/arm926ejs/mxs/spl_boot.c +0
-0mxs_power_wait_pswitch ();}
I admit I use the same trick when the first initialization fails and I want to check what happens. Make the SOC hanging helps, sure.
Yea ... so either way if it's merged or not, I hope it might help someone :)
Quoted 3 lines
However, this is part of the porting / development. Why should we introduce this code into mainline ? In the official configuration file
CONFIG_MX28_DEBUGmust be off, and then all this stuff is dead code.
Indeed, I'll shift this decision on you ;-)
Quoted 3 lines
Regards,
Stefano
Best regards,
Marek Vasut