mmc: Add a quirk to add delay during completion of sdhci_send_cmd

PATCH New Tushar Behera 1 participant 2 messages Sep 4, 2012 MMC, SD and SDIO

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Tushar Behera

author

2012-09-04 11:37 UTC #0 lore raw

PATCH 1/1 mmc: Add a quirk to add delay during completion of sdhci_send_cmd

MMC host controller requires a delay between every sdhci_send_cmd() execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay of 1000us was provided after every mmc_send_cmd() call. Adding a quirk in current sdhci driver to replicate the behaviour.

Without this delay, MMC initialization on Origen board fails with following error messages.

Timeout for status update!
mmc fail to send stop cmd

CC Jaehoon Chung <[email protected]>

CC Andy Fleming <[email protected]>

Signed-off-by Tushar Behera <[email protected]>

---

This patch is applied on v2012.07 and Jaehoon Chung's following patchset. [PATCH v2 0/4] mmc: sdhci: fixed some problems for Exynos

 drivers/mmc/s5p_sdhci.c |    3 ++-
 drivers/mmc/sdhci.c     |    4 ++++
 include/sdhci.h         |    1 +
 3 files changed, 7 insertions(+), 1 deletions(-)

drivers/mmc/s5p_sdhci.c +2 -1

index b978236..dc49d37 100644
@@ -83,7 +83,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
 	host->ioaddr = (void *)regbase;
 
 	host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
-		SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR;
+		SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
+		SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);

drivers/mmc/sdhci.c +4 -0

index d0b8d24..823b1af 100644
@@ -233,12 +233,16 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	if (!ret && data)
 		ret = sdhci_transfer_data(host, data, start_addr);
 
+	if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)
+		udelay(1000);
+
 	stat = sdhci_readl(host, SDHCI_INT_STATUS);
 	sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
 	if (!ret) {
 		if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
 				!is_aligned && (data->flags == MMC_DATA_READ))
 			memcpy(data->dest, aligned_buffer, trans_bytes);
+
 		return 0;
 	}

include/sdhci.h +1 -0

index 4351a62..d38cfd4 100644
@@ -219,6 +219,7 @@
 #define SDHCI_QUIRK_BROKEN_R1B		(1 << 2)
 #define SDHCI_QUIRK_NO_HISPD_BIT	(1 << 3)
 #define SDHCI_QUIRK_BROKEN_VOLTAGE	(1 << 4)
+#define SDHCI_QUIRK_WAIT_SEND_CMD	(1 << 5)
 
 /* to make gcc happy */
 struct sdhci_host;

Signature · 1 line

1.7.4.1

Tushar Behera

author

2012-09-04 11:51 UTC #1 lore raw

PATCH 1/1 mmc: Add a quirk to add delay during completion of sdhci_send_cmd

Quoted 46 lines · Tushar Behera

MMC host controller requires a delay between every sdhci_send_cmd() execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay of 1000us was provided after every mmc_send_cmd() call. Adding a quirk in current sdhci driver to replicate the behaviour.
Without this delay, MMC initialization on Origen board fails with following error messages.
Timeout for status update!
mmc fail to send stop cmd
CC Jaehoon Chung <[email protected]>
CC Andy Fleming <[email protected]>
Signed-off-by Tushar Behera <[email protected]>
---
This patch is applied on v2012.07 and Jaehoon Chung's following patchset. [PATCH v2 0/4] mmc: sdhci: fixed some problems for Exynos
 drivers/mmc/s5p_sdhci.c |    3 ++-
 drivers/mmc/sdhci.c     |    4 ++++
 include/sdhci.h         |    1 +
 3 files changed, 7 insertions(+), 1 deletions(-)
drivers/mmc/s5p_sdhci.c +2 -1
index b978236..dc49d37 100644
@@ -83,7 +83,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
 	host->ioaddr = (void *)regbase;
 
 	host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
-		SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR;
+		SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
+		SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 
drivers/mmc/sdhci.c +0 -0
index d0b8d24..823b1af 100644
@@ -233,12 +233,16 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	if (!ret && data)
 		ret = sdhci_transfer_data(host, data, start_addr);
 

drivers/mmc/sdhci.c int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, · line 245

Quoted 10 lines

drivers/mmc/sdhci.c +4 -0

+	if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)
+		udelay(1000);
+
 	stat = sdhci_readl(host, SDHCI_INT_STATUS);
 	sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
 	if (!ret) {
 		if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
 				!is_aligned && (data->flags == MMC_DATA_READ))
 			memcpy(data->dest, aligned_buffer, trans_bytes);
+

Sorry for this blank line. Will remove that if a resend is required.

Quoted 16 lines

drivers/mmc/sdhci.c +0 -0

 		return 0;
 	}

include/sdhci.h +1 -0

index 4351a62..d38cfd4 100644
@@ -219,6 +219,7 @@
 #define SDHCI_QUIRK_BROKEN_R1B		(1 << 2)
 #define SDHCI_QUIRK_NO_HISPD_BIT	(1 << 3)
 #define SDHCI_QUIRK_BROKEN_VOLTAGE	(1 << 4)
+#define SDHCI_QUIRK_WAIT_SEND_CMD	(1 << 5)
 
 /* to make gcc happy */
 struct sdhci_host;

Signature · 1 line

Tushar Behera