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powerpc mpc85xx: Do not protect TLB entry for debuggging in AS1 against invalidation

PATCH New Joye Laurent 2 participants 2 messages Sep 7, 2012 PowerPC

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PATCH 1/1 powerpc mpc85xx: Do not protect TLB entry for debuggging in AS1 against invalidation

In case of booting from RAM (CONFIG_SYS_RAMBOOT), a TLB entry is created for IVPR + IVOR15 to map on valid OP code address.
This TLB entry shall not be protected against invalidation, because a new TLB entry to access RAM in AS0 will be created by cpu_init_early_f.
If this TLB entry is protected against invalidation, this will creates 2 TLB for the same address range (forbidden).

---
 arch/powerpc/cpu/mpc85xx/start.S |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
(quoted diff) +0 -0

b/arch/powerpc/cpu/mpc85xx/start.S
index 6aabc30..56c4ee7 100644

arch/powerpc/cpu/mpc85xx/start.S +0 -0
@@ -229,8 +229,8 @@ l2_disabled:
  * TLB entry is created for IVPR + IVOR15 to map on valid OP code

address
* because "nexti" will resize TLB to 4K
*/

-       lis     r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256K)@h
-       ori     r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256K)@l
+       lis     r7,FSL_BOOKE_MAS1(1, 0, 0, 0, BOOKE_PAGESZ_256K)@h
+       ori     r7,r7,FSL_BOOKE_MAS1(1, 0, 0, 0, BOOKE_PAGESZ_256K)@l
        lis     r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE, (MAS2_I))@h
        ori     r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_MONITOR_BASE,
Signature · 1 line
1.7.10.4
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PATCH 1/1 powerpc mpc85xx: Do not protect TLB entry for debuggging in AS1 against invalidation

Quoted 7 lines · Joye Laurent

In case of booting from RAM (CONFIG_SYS_RAMBOOT), a TLB entry is created for IVPR + IVOR15 to map on valid OP code address.
This TLB entry shall not be protected against invalidation, because a new TLB entry to access RAM in AS0 will be created by cpu_init_early_f.
If this TLB entry is protected against invalidation, this will creates 2 TLB for the same address range (forbidden).

Instead we should explicitly remove the debug TLB when it is no longer needed.

-Scott