ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

PATCH New Leela Krishna Amudala 3 participants 6 messages Sep 10, 2012 – Sep 12, 2012

Subsystems (3)

Arm (32-bit) Arm sub-architectures Arm Samsung Exynos

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Leela Krishna Amudala

author

2012-09-10 15:21 UTC #0 lore raw

PATCH 1/1 ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

This patch adds the bus clock for FIMD and changes the device name for lcd clock also sets mout_mpll_user as parent clock to fimd

Signed-off-by Leela Krishna Amudala <[email protected]>

---
 arch/arm/mach-exynos/clock-exynos5.c       |   34 +++++++++++++++++++--------
 arch/arm/plat-samsung/include/plat/clock.h |    2 +
 2 files changed, 26 insertions(+), 10 deletions(-)

arch/arm/mach-exynos/clock-exynos5.c +24 ~~-10~~

index 774533c..f1281cf 100644
@@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
 	.ctrlbit	= (1 << 4),
 };
 
+static struct clk exynos5_clk_fimd = {
+	.name		= "fimd",
+	.devname	= "exynos5-fb",
+	.enable		= exynos5_clk_ip_disp1_ctrl,
+	.ctrlbit	= (1 << 0),
+};
+
 struct clk *exynos5_clkset_group_list[] = {
 	[0] = &clk_ext_xtal_mux,
 	[1] = NULL,

@@ -1120,6 +1127,18 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
 	.reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
 };
 
+struct clksrc_clk exynos5_clk_sclk_fimd = {
+	.clk	= {
+		.name	        = "sclk_fimd",
+		.devname        = "exynos5-fb",
+		.enable         = exynos5_clksrc_mask_disp1_0_ctrl,
+		.ctrlbit        = (1 << 0),
+	},
+	.sources = &exynos5_clkset_group,
+	.reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
+	.reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
+};
+
 static struct clksrc_clk exynos5_clksrcs[] = {
 	{
 		.clk	= {

@@ -1131,16 +1150,6 @@ static struct clksrc_clk exynos5_clksrcs[] = {
 		.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 },
 	}, {
 		.clk	= {
-			.name		= "sclk_fimd",
-			.devname	= "s3cfb.1",
-			.enable		= exynos5_clksrc_mask_disp1_0_ctrl,
-			.ctrlbit	= (1 << 0),
-		},
-		.sources = &exynos5_clkset_group,
-		.reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
-		.reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "aclk_266_gscl",
 		},
 		.sources = &clk_src_gscl_266,

@@ -1240,12 +1249,14 @@ static struct clksrc_clk *exynos5_sysclks[] = {
 	&exynos5_clk_mdout_spi0,
 	&exynos5_clk_mdout_spi1,
 	&exynos5_clk_mdout_spi2,
+	&exynos5_clk_sclk_fimd,
 };
 
 static struct clk *exynos5_clk_cdev[] = {
 	&exynos5_clk_pdma0,
 	&exynos5_clk_pdma1,
 	&exynos5_clk_mdma1,
+	&exynos5_clk_fimd,
 };
 
 static struct clksrc_clk *exynos5_clksrc_cdev[] = {

@@ -1274,6 +1285,7 @@ static struct clk_lookup exynos5_clk_lookup[] = {
 	CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
 	CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
 	CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
+	CLKDEV_INIT("exynos5-fb", "lcd", &exynos5_clk_fimd),
 };
 
 static unsigned long exynos5_epll_get_rate(struct clk *clk)

@@ -1492,6 +1504,8 @@ void __init_or_cpufreq exynos5_setup_clocks(void)
 
 	clk_set_rate(&exynos5_clk_aclk_acp.clk, 267000000);
 	clk_set_rate(&exynos5_clk_pclk_acp.clk, 134000000);
+	clk_set_parent(&exynos5_clk_sclk_fimd.clk,
+			&exynos5_clk_mout_mpll_user.clk);
 
 	for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clksrcs); ptr++)
 		s3c_set_clksrc(&exynos5_clksrcs[ptr], true);

arch/arm/plat-samsung/include/plat/clock.h +2 -0

index a62753d..3d27783 100644
@@ -83,6 +83,8 @@ extern struct clk clk_ext;
 extern struct clksrc_clk clk_epllref;
 extern struct clksrc_clk clk_esysclk;
 
+extern struct clksrc_clk exynos5_clk_sclk_fimd;
+
 /* S3C64XX specific clocks */
 extern struct clk clk_h2;
 extern struct clk clk_27m;

Signature · 1 line

1.7.0.4

Jingoo Han

2012-09-11 00:22 UTC #1 lore raw

PATCH 1/1 ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

On Tuesday, September 11, 2012 5:11 AM Leela Krishna Amudala wrote

Quoted 15 lines

This patch adds the bus clock for FIMD and changes the device name for lcd clock also sets mout_mpll_user as parent clock to fimd
Signed-off-by Leela Krishna Amudala <[email protected]>
---
 arch/arm/mach-exynos/clock-exynos5.c       |   34 +++++++++++++++++++--------
 arch/arm/plat-samsung/include/plat/clock.h |    2 +
 2 files changed, 26 insertions(+), 10 deletions(-)
arch/arm/mach-exynos/clock-exynos5.c +0 -0
index 774533c..f1281cf 100644

arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 896

Quoted 6 lines

arch/arm/mach-exynos/clock-exynos5.c +3 -0

@@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
 	.ctrlbit	= (1 << 4),
 };
 
+static struct clk exynos5_clk_fimd = {
+	.name		= "fimd",
+	.devname	= "exynos5-fb",

Replace 'exynos5-fb' with 'exynos5-fb.1', as exynos4 fimd uses exynos4-fb.0 as devname. Exynos5 can use fimd0 or fimd1. Also, Exynos5250 uses fimd1.

Quoted 4 lines

arch/arm/mach-exynos/clock-exynos5.c +4 -0
+	.enable		= exynos5_clk_ip_disp1_ctrl,
+	.ctrlbit	= (1 << 0),
+};
+

Leela Krishna Amudala

author

2012-09-11 09:19 UTC #2 lore raw

PATCH 1/1 ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

Hello Jingoo Han,

Quoted 19 lines · Jingoo Han

On Tuesday, September 11, 2012 5:11 AM Leela Krishna Amudala wrote
Quoted 18 lines
This patch adds the bus clock for FIMD and changes the device name for lcd clock also sets mout_mpll_user as parent clock to fimd
Signed-off-by Leela Krishna Amudala <[email protected]>
---
 arch/arm/mach-exynos/clock-exynos5.c       |   34 +++++++++++++++++++--------
 arch/arm/plat-samsung/include/plat/clock.h |    2 +
 2 files changed, 26 insertions(+), 10 deletions(-)
arch/arm/mach-exynos/clock-exynos5.c +0 -0
index 774533c..f1281cf 100644
@@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
      .ctrlbit        = (1 << 4),
 };
 

Quoted 9 lines

arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 896
Quoted 3 lines
arch/arm/mach-exynos/clock-exynos5.c +3 -0
+static struct clk exynos5_clk_fimd = {
+     .name           = "fimd",
+     .devname        = "exynos5-fb",
Replace 'exynos5-fb' with 'exynos5-fb.1', as exynos4 fimd uses exynos4-fb.0 as devname. Exynos5 can use fimd0 or fimd1. Also, Exynos5250 uses fimd1.

Currently s3c-fb driver using "exynos5-fb" as device name, hence used the same name in the clock.
This code is tested with both drm-fimd and s3c-fb fimd and it is working fine showing the display on LCD.
If I change the device name in clock file then I have to change it in s3c-fb driver also.
So I feel it is better to keep the name as "exynos5-fb" in clock file instead of changing in the driver.

Thanks,
Leela Krishna Amudala.

Quoted 10 lines

arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 900
Quoted 4 lines
arch/arm/mach-exynos/clock-exynos5.c +4 -0
+     .enable         = exynos5_clk_ip_disp1_ctrl,
+     .ctrlbit        = (1 << 0),
+};
+
--
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Sylwester Nawrocki

2012-09-11 09:32 UTC #3 lore raw

PATCH 1/1 ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

Quoted 17 lines · Leela Krishna Amudala

Quoted 8 lines
Quoted 8 lines
arch/arm/mach-exynos/clock-exynos5.c +0 -0
index 774533c..f1281cf 100644
@@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
      .ctrlbit        = (1 << 4),
 };
 
Quoted 9 lines
arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 896
Quoted 3 lines
arch/arm/mach-exynos/clock-exynos5.c +3 -0
+static struct clk exynos5_clk_fimd = {
+     .name           = "fimd",
+     .devname        = "exynos5-fb",
Replace 'exynos5-fb' with 'exynos5-fb.1', as exynos4 fimd uses exynos4-fb.0 as devname. Exynos5 can use fimd0 or fimd1. Also, Exynos5250 uses fimd1.

Quoted 8 lines

Currently s3c-fb driver using "exynos5-fb" as device name, hence used the same name in the clock.
This code is tested with both drm-fimd and s3c-fb fimd and it is working fine showing the display on LCD.
If I change the device name in clock file then I have to change it in s3c-fb driver also.
So I feel it is better to keep the name as "exynos5-fb" in clock file instead of changing in the driver.

Yeah, makes sense. We can always add a clkdev entry with CLKDEV_INIT() if driver needs it. There is so much confusion now with having device name associated with platform clock name. It should be possible to freely define clock connection id and a platform clock association, not at the platform clock definition.

I guess we can now clean all this up only during conversion to common clock framework.

Regards,

Signature · 2 lines

Sylwester Nawrocki
Samsung Poland R&D Center

Jingoo Han

2012-09-12 01:58 UTC #4 lore raw

PATCH 1/1 ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

In reply to Leela Krishna Amudala

On Tuesday, September 11, 2012 6:20 PM Leela Krishna Amudala wrote

Quoted 32 lines

Hello Jingoo Han,
Quoted 19 lines · Jingoo Han
On Tuesday, September 11, 2012 5:11 AM Leela Krishna Amudala wrote
Quoted 18 lines
This patch adds the bus clock for FIMD and changes the device name for lcd clock also sets mout_mpll_user as parent clock to fimd
Signed-off-by Leela Krishna Amudala <[email protected]>
---
 arch/arm/mach-exynos/clock-exynos5.c       |   34 +++++++++++++++++++--------
 arch/arm/plat-samsung/include/plat/clock.h |    2 +
 2 files changed, 26 insertions(+), 10 deletions(-)
arch/arm/mach-exynos/clock-exynos5.c +0 -0
index 774533c..f1281cf 100644
@@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
      .ctrlbit        = (1 << 4),
 };
 
Quoted 9 lines
arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 896
Quoted 3 lines
arch/arm/mach-exynos/clock-exynos5.c +3 -0
+static struct clk exynos5_clk_fimd = {
+     .name           = "fimd",
+     .devname        = "exynos5-fb",
Replace 'exynos5-fb' with 'exynos5-fb.1', as exynos4 fimd uses exynos4-fb.0 as devname. Exynos5 can use fimd0 or fimd1. Also, Exynos5250 uses fimd1.

Quoted 8 lines

Currently s3c-fb driver using "exynos5-fb" as device name, hence used the same name in the clock.
This code is tested with both drm-fimd and s3c-fb fimd and it is working fine showing the display on LCD.
If I change the device name in clock file then I have to change it in s3c-fb driver also.
So I feel it is better to keep the name as "exynos5-fb" in clock file instead of changing in the driver.

No, there is no need to change the device name in s3c-fb driver.
Please refer to the patch that I sent 3 months ago.
http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg11002.html

Now, Exynos5250 has only 1 FIMD IP; however, other Exynos5 SoCs have 2 FIMD IPs. These SoCs have two different clock paths for 2 FIMD IPs. Therefore, we need to consider it.

Quoted 14 lines

Thanks,
Leela Krishna Amudala.
Quoted 10 lines
arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 900
Quoted 4 lines
arch/arm/mach-exynos/clock-exynos5.c +4 -0
+     .enable         = exynos5_clk_ip_disp1_ctrl,
+     .ctrlbit        = (1 << 0),
+};
+
--
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Leela Krishna Amudala

author

2012-09-12 06:14 UTC #5 lore raw

PATCH 1/1 ARM: EXYNOS5: Add bus clock and set parent clock for FIMD

Hi Jingoo han,

Quoted 42 lines · Jingoo Han

On Tuesday, September 11, 2012 6:20 PM Leela Krishna Amudala wrote
Quoted 32 lines
Hello Jingoo Han,
Quoted 19 lines · Jingoo Han
On Tuesday, September 11, 2012 5:11 AM Leela Krishna Amudala wrote
Quoted 18 lines
This patch adds the bus clock for FIMD and changes the device name for lcd clock also sets mout_mpll_user as parent clock to fimd
Signed-off-by Leela Krishna Amudala <[email protected]>
---
 arch/arm/mach-exynos/clock-exynos5.c       |   34 +++++++++++++++++++--------
 arch/arm/plat-samsung/include/plat/clock.h |    2 +
 2 files changed, 26 insertions(+), 10 deletions(-)
arch/arm/mach-exynos/clock-exynos5.c +0 -0
index 774533c..f1281cf 100644
@@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = {
      .ctrlbit        = (1 << 4),
 };
 
Quoted 9 lines
arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 896
Quoted 3 lines
arch/arm/mach-exynos/clock-exynos5.c +3 -0
+static struct clk exynos5_clk_fimd = {
+     .name           = "fimd",
+     .devname        = "exynos5-fb",
Replace 'exynos5-fb' with 'exynos5-fb.1', as exynos4 fimd uses exynos4-fb.0 as devname. Exynos5 can use fimd0 or fimd1. Also, Exynos5250 uses fimd1.
Quoted 8 lines
Currently s3c-fb driver using "exynos5-fb" as device name, hence used the same name in the clock.
This code is tested with both drm-fimd and s3c-fb fimd and it is working fine showing the display on LCD.
If I change the device name in clock file then I have to change it in s3c-fb driver also.
So I feel it is better to keep the name as "exynos5-fb" in clock file instead of changing in the driver.

Quoted 9 lines

No, there is no need to change the device name in s3c-fb driver.
Please refer to the patch that I sent 3 months ago.
http://www.mail-archive.com/linux-samsung-soc at vger.kernel.org/msg11002.html
Now, Exynos5250 has only 1 FIMD IP; however, other Exynos5 SoCs have 2 FIMD IPs. These SoCs have two different clock paths for 2 FIMD IPs. Therefore, we need to consider it.

Okay agreed, will change the devname to "exynos5-fb.1" in clock file. Tested with adding DT changes to s3c-fb and with devname "exynos5-fb.1" in clock file.
works fine for both drm-fimd and s3c-fb fimd. will post the next version patch soon.

Quoted 19 lines

Quoted 14 lines
Thanks,
Leela Krishna Amudala.
Quoted 10 lines
arch/arm/mach-exynos/clock-exynos5.c static struct clk exynos5_clk_mdma1 = { · line 900
Quoted 4 lines
arch/arm/mach-exynos/clock-exynos5.c +4 -0
+     .enable         = exynos5_clk_ip_disp1_ctrl,
+     .ctrlbit        = (1 << 0),
+};
+
--
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--
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