ARM: Remove mach-bcmring

Remove mach-bcmring as this is no longer maintained or used.

---
 MAINTAINERS                                        |    7 -
 arch/arm/Kconfig                                   |   14 -
 arch/arm/Makefile                                  |    1 -
 arch/arm/configs/bcmring_defconfig                 |   79 -
 arch/arm/mach-bcmring/Kconfig                      |   19 -
 arch/arm/mach-bcmring/Makefile                     |    8 -
 arch/arm/mach-bcmring/Makefile.boot                |    6 -
 arch/arm/mach-bcmring/arch.c                       |  199 ---
 arch/arm/mach-bcmring/clock.c                      |  223 ---
 arch/arm/mach-bcmring/clock.h                      |   33 -
 arch/arm/mach-bcmring/core.c                       |  228 ---
 arch/arm/mach-bcmring/core.h                       |   31 -
 arch/arm/mach-bcmring/csp/Makefile                 |    3 -
 arch/arm/mach-bcmring/csp/chipc/Makefile           |    1 -
 arch/arm/mach-bcmring/csp/chipc/chipcHw.c          |  776 ---------
 arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c     |  293 ----
 arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c    |  124 --
 arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c      |   64 -
 arch/arm/mach-bcmring/csp/dmac/Makefile            |    1 -
 arch/arm/mach-bcmring/csp/dmac/dmacHw.c            |  917 -----------
 arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c      | 1017 ------------
 arch/arm/mach-bcmring/csp/tmr/Makefile             |    1 -
 arch/arm/mach-bcmring/csp/tmr/tmrHw.c              |  576 -------
 arch/arm/mach-bcmring/dma.c                        | 1518 
------------------
 arch/arm/mach-bcmring/dma_device.c                 |  593 -------
 arch/arm/mach-bcmring/include/cfg_global.h         |   13 -
 arch/arm/mach-bcmring/include/cfg_global_defines.h |   40 -
 arch/arm/mach-bcmring/include/csp/cache.h          |   35 -
 arch/arm/mach-bcmring/include/csp/delay.h          |   36 -
 arch/arm/mach-bcmring/include/csp/dmacHw.h         |  596 -------
 arch/arm/mach-bcmring/include/csp/errno.h          |   32 -
 arch/arm/mach-bcmring/include/csp/intcHw.h         |   40 -
 arch/arm/mach-bcmring/include/csp/module.h         |   32 -
 arch/arm/mach-bcmring/include/csp/reg.h            |  114 --
 arch/arm/mach-bcmring/include/csp/secHw.h          |   65 -
 arch/arm/mach-bcmring/include/csp/stdint.h         |   30 -
 arch/arm/mach-bcmring/include/csp/string.h         |   34 -
 arch/arm/mach-bcmring/include/csp/tmrHw.h          |  263 ---
 arch/arm/mach-bcmring/include/mach/csp/cap.h       |   63 -
 .../arm/mach-bcmring/include/mach/csp/cap_inline.h |  409 -----
 .../mach-bcmring/include/mach/csp/chipcHw_def.h    | 1123 -------------
 .../mach-bcmring/include/mach/csp/chipcHw_inline.h | 1673 
--------------------
 .../mach-bcmring/include/mach/csp/chipcHw_reg.h    |  530 -------
 arch/arm/mach-bcmring/include/mach/csp/ddrcReg.h   |  872 ----------
 .../mach-bcmring/include/mach/csp/dmacHw_priv.h    |  145 --
 .../arm/mach-bcmring/include/mach/csp/dmacHw_reg.h |  406 -----
 arch/arm/mach-bcmring/include/mach/csp/hw_cfg.h    |   73 -
 .../arm/mach-bcmring/include/mach/csp/intcHw_reg.h |  246 ---
 arch/arm/mach-bcmring/include/mach/csp/mm_addr.h   |  101 --
 arch/arm/mach-bcmring/include/mach/csp/mm_io.h     |  147 --
 arch/arm/mach-bcmring/include/mach/csp/secHw_def.h |  100 --
 .../mach-bcmring/include/mach/csp/secHw_inline.h   |   79 -
 arch/arm/mach-bcmring/include/mach/csp/tmrHw_reg.h |   82 -
 arch/arm/mach-bcmring/include/mach/dma.h           |  630 --------
 arch/arm/mach-bcmring/include/mach/entry-macro.S   |   76 -
 arch/arm/mach-bcmring/include/mach/hardware.h      |   57 -
 arch/arm/mach-bcmring/include/mach/irqs.h          |  132 --
 .../mach-bcmring/include/mach/memory_settings.h    |   67 -
 arch/arm/mach-bcmring/include/mach/reg_nand.h      |   66 -
 arch/arm/mach-bcmring/include/mach/reg_umi.h       |  237 ---
 arch/arm/mach-bcmring/include/mach/timer.h         |   77 -
 arch/arm/mach-bcmring/include/mach/timex.h         |   25 -
 arch/arm/mach-bcmring/include/mach/uncompress.h    |   43 -
 arch/arm/mach-bcmring/irq.c                        |  126 --
 arch/arm/mach-bcmring/mm.c                         |   60 -
 arch/arm/mach-bcmring/timer.c                      |   61 -
 66 files changed, 0 insertions(+), 15768 deletions(-)
 delete mode 100644 arch/arm/configs/bcmring_defconfig
 delete mode 100644 arch/arm/mach-bcmring/Kconfig
 delete mode 100644 arch/arm/mach-bcmring/Makefile
 delete mode 100644 arch/arm/mach-bcmring/Makefile.boot
 delete mode 100644 arch/arm/mach-bcmring/arch.c
 delete mode 100644 arch/arm/mach-bcmring/clock.c
 delete mode 100644 arch/arm/mach-bcmring/clock.h
 delete mode 100644 arch/arm/mach-bcmring/core.c
 delete mode 100644 arch/arm/mach-bcmring/core.h
 delete mode 100644 arch/arm/mach-bcmring/csp/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw.c
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c
 delete mode 100644 arch/arm/mach-bcmring/csp/dmac/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/dmac/dmacHw.c
 delete mode 100644 arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
 delete mode 100644 arch/arm/mach-bcmring/csp/tmr/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/tmr/tmrHw.c
 delete mode 100644 arch/arm/mach-bcmring/dma.c
 delete mode 100644 arch/arm/mach-bcmring/dma_device.c
 delete mode 100644 arch/arm/mach-bcmring/include/cfg_global.h
 delete mode 100644 arch/arm/mach-bcmring/include/cfg_global_defines.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/cache.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/delay.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/dmacHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/errno.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/intcHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/module.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/secHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/stdint.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/string.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/tmrHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/cap.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/cap_inline.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/chipcHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/ddrcReg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/hw_cfg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/mm_io.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/secHw_def.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/secHw_inline.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/tmrHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/dma.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/entry-macro.S
 delete mode 100644 arch/arm/mach-bcmring/include/mach/hardware.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/irqs.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/memory_settings.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/reg_nand.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/reg_umi.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/timer.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/timex.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/uncompress.h
 delete mode 100644 arch/arm/mach-bcmring/irq.c
 delete mode 100644 arch/arm/mach-bcmring/mm.c
 delete mode 100644 arch/arm/mach-bcmring/timer.c

index 36da5f9..a4b166c 100644
@@ -658,13 +658,6 @@ W:	http://www.linux4sam.org
 S:	Supported
 F:	arch/arm/mach-at91/
 -ARM/BCMRING ARM ARCHITECTURE
-M:	Jiandong Zheng <[email protected]>
-M:	Scott Branden <[email protected]>
-L:	[email protected] (moderated for non-subscribers)
-S:	Maintained
-F:	arch/arm/mach-bcmring
-
 ARM/CALXEDA HIGHBANK ARCHITECTURE
 M:	Rob Herring <[email protected]>
 L:	[email protected] (moderated for non-subscribers)

index c5f9ae5..e99177a 100644
@@ -350,18 +350,6 @@ config ARCH_AT91
 	  This enables support for systems based on Atmel
 	  AT91RM9200 and AT91SAM9* processors.
 -config ARCH_BCMRING
-	bool "Broadcom BCMRING"
-	depends on MMU
-	select CPU_V6
-	select ARM_AMBA
-	select ARM_TIMER_SP804
-	select CLKDEV_LOOKUP
-	select GENERIC_CLOCKEVENTS
-	select ARCH_WANT_OPTIONAL_GPIOLIB
-	help
-	  Support for Broadcom's BCMRing platform.
-
 config ARCH_HIGHBANK
 	bool "Calxeda Highbank-based"
 	select ARCH_WANT_OPTIONAL_GPIOLIB

@@ -1031,8 +1019,6 @@ source "arch/arm/mach-mvebu/Kconfig"
  source "arch/arm/mach-at91/Kconfig"
 -source "arch/arm/mach-bcmring/Kconfig"
-
 source "arch/arm/mach-clps711x/Kconfig"
  source "arch/arm/mach-cns3xxx/Kconfig"

index 30eae87..8383e2e 100644
@@ -136,7 +136,6 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
 machine-$(CONFIG_ARCH_AT91)		:= at91
-machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)		:= cns3xxx
 machine-$(CONFIG_ARCH_DAVINCI)		:= davinci

deleted file mode 100644
index 9170d16..0000000
@@ -1,19 +0,0 @@
-choice
-	prompt "Processor selection in BCMRING family of devices"
-	depends on ARCH_BCMRING
-	default ARCH_BCM11107
-
-config ARCH_FPGA11107
-	bool "FPGA11107"
-
-config ARCH_BCM11107
-	bool "BCM11107"
-endchoice
-
-menu "BCMRING Options"
-	depends on ARCH_BCMRING
-
-config BCM_ZRELADDR
-	hex "Compressed ZREL ADDR"
-
-endmenu

deleted file mode 100644
index f8d9fce..0000000
@@ -1,8 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y := arch.o mm.o irq.o clock.o core.o timer.o dma.o
-obj-y += csp/

deleted file mode 100644
index aef2467..0000000
@@ -1,6 +0,0 @@
-# Address where decompressor will be written and eventually executed.
-#
-# default to SDRAM
-zreladdr-y      += $(CONFIG_BCM_ZRELADDR)
-params_phys-y   := 0x00000800
-

deleted file mode 100644
index 5e0b981..0000000
@@ -1,33 +0,0 @@
-/*****************************************************************************
-* Copyright 2001 - 2009 Broadcom Corporation.  All rights reserved.
-*
-* Unless you and Broadcom execute a separate written software license
-* agreement governing use of this software, this software is licensed to you
-* under the terms of the GNU General Public License version 2, available at
-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
-*
-* Notwithstanding the above, under no circumstances may you combine this
-* software in any way with any other Broadcom software provided under a
-* license other than the GPL, without Broadcom's express prior written
-* consent.
-*****************************************************************************/
-#include <mach/csp/chipcHw_def.h>
-
-#define CLK_TYPE_PRIMARY         1	/* primary clock must NOT have a parent */
-#define CLK_TYPE_PLL1            2	/* PPL1 */
-#define CLK_TYPE_PLL2            4	/* PPL2 */
-#define CLK_TYPE_PROGRAMMABLE    8	/* programmable clock rate */
-#define CLK_TYPE_BYPASSABLE      16	/* parent can be changed */
-
-#define CLK_MODE_XTAL            1	/* clock source is from crystal */
-
-struct clk {
-	const char *name;	/* clock name */
-	unsigned int type;	/* clock type */
-	unsigned int mode;	/* current mode */
-	volatile int use_bypass;	/* indicate if it's in bypass mode */
-	chipcHw_CLOCK_e csp_id;	/* clock ID for CSP CHIPC */
-	unsigned long rate_hz;	/* clock rate in Hz */
-	unsigned int use_cnt;	/* usage count */
-	struct clk *parent;	/* parent clock */
-};

deleted file mode 100644
index adbfb19..0000000
@@ -1,228 +0,0 @@
-/*
- *  derived from linux/arch/arm/mach-versatile/core.c
- *  linux/arch/arm/mach-bcmring/core.c
- *
- *  Copyright (C) 1999 - 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 

USA
- */
-/* Portions copyright Broadcom 2008 */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/amba/bus.h>
-#include <linux/clkdev.h>
-
-#include <mach/csp/mm_addr.h>
-#include <mach/hardware.h>
-#include <linux/io.h>
-#include <asm/irq.h>
-#include <asm/hardware/arm_timer.h>
-#include <asm/hardware/timer-sp.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-#include <cfg_global.h>
-
-#include "clock.h"
-
-#include <csp/secHw.h>
-#include <mach/csp/secHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-#include <mach/csp/tmrHw_reg.h>
-
-static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL); -static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL); -
-static struct clk pll1_clk = {
- .name = "PLL1",
- .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL1,
- .rate_hz = 2000000000,
- .use_cnt = 7,
-};
-
-static struct clk uart_clk = {
- .name = "UART",
- .type = CLK_TYPE_PROGRAMMABLE,
- .csp_id = chipcHw_CLOCK_UART,
- .rate_hz = HW_CFG_UART_CLK_HZ,
- .parent = &pll1_clk,
-};
-
-static struct clk dummy_apb_pclk = {
- .name = "BUSCLK",
- .type = CLK_TYPE_PRIMARY,
- .mode = CLK_MODE_XTAL,
-};
-
-/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically 150-166 MHz */ -#if defined(CONFIG_ARCH_FPGA11107)
-/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */ -/* slow down Linux's sense of time */

-#define TIMER0_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
-#define TIMER1_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
-#define TIMER3_FREQUENCY_MHZ  (tmrHw_HIGH_FREQUENCY_MHZ * 30)
-#define TIMER3_FREQUENCY_KHZ   (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
-#else
-#define TIMER0_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
-#define TIMER1_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
-#define TIMER3_FREQUENCY_MHZ  tmrHw_HIGH_FREQUENCY_MHZ
-#define TIMER3_FREQUENCY_KHZ  (tmrHw_HIGH_FREQUENCY_HZ / 1000)

-#endif
-
-static struct clk sp804_timer012_clk = {
- .name = "sp804-timer-0,1,2",
- .type = CLK_TYPE_PRIMARY,
- .mode = CLK_MODE_XTAL,
- .rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
-};
-
-static struct clk sp804_timer3_clk = {
- .name = "sp804-timer-3",
- .type = CLK_TYPE_PRIMARY,
- .mode = CLK_MODE_XTAL,
- .rate_hz = TIMER3_FREQUENCY_KHZ * 1000,
-};
-
-static struct clk_lookup lookups[] = {
- { /* Bus clock */
- .con_id = "apb_pclk",
- .clk = &dummy_apb_pclk,
- }, { /* UART0 */
- .dev_id = "uarta",
- .clk = &uart_clk,
- }, { /* UART1 */
- .dev_id = "uartb",
- .clk = &uart_clk,
- }, { /* SP804 timer 0 */
- .dev_id = "sp804",
- .con_id = "timer0",
- .clk = &sp804_timer012_clk,
- }, { /* SP804 timer 1 */
- .dev_id = "sp804",
- .con_id = "timer1",
- .clk = &sp804_timer012_clk,
- }, { /* SP804 timer 3 */
- .dev_id = "sp804",
- .con_id = "timer3",
- .clk = &sp804_timer3_clk,
- }
-};
-
-static struct amba_device *amba_devs[] __initdata = {
- &uartA_device,
- &uartB_device,
-};
-
-void __init bcmring_amba_init(void)
-{
- int i;
- u32 bus_clock;
-
-/* Linux is run initially in non-secure mode. Secure peripherals */ -/* generate FIQ, and must be handled in secure mode. Until we have */ -/* a linux security monitor implementation, keep everything in */ -/* non-secure mode. */
- chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU);
- secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL |

-			  secHw_BLK_MASK_KEY_SCAN |
-			  secHw_BLK_MASK_TOUCH_SCREEN |
-			  secHw_BLK_MASK_UART0 |
-			  secHw_BLK_MASK_UART1 |
-			  secHw_BLK_MASK_WATCHDOG |
-			  secHw_BLK_MASK_SPUM |
-			  secHw_BLK_MASK_DDR2 |
-			  secHw_BLK_MASK_SPU |
-			  secHw_BLK_MASK_PKA |
-			  secHw_BLK_MASK_RNG |
-			  secHw_BLK_MASK_RTC |
-			  secHw_BLK_MASK_OTP |
-			  secHw_BLK_MASK_BOOT |
-			  secHw_BLK_MASK_MPU |
-			  secHw_BLK_MASK_TZCTRL | secHw_BLK_MASK_INTR);

-
- /* Only the devices attached to the AMBA bus are enabled just before the bus is */
- /* scanned and the drivers are loaded. The clocks need to be on for the AMBA bus */
- /* driver to access these blocks. The bus is probed, and the drivers are loaded. */
- /* FIXME Need to remove enable of PIF once CLCD clock enable used properly in FPGA. */
- bus_clock = chipcHw_REG_BUS_CLOCK_GE
- | chipcHw_REG_BUS_CLOCK_SDIO0 | chipcHw_REG_BUS_CLOCK_SDIO1;
-
- chipcHw_busInterfaceClockEnable(bus_clock);
-
- for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
- struct amba_device *d = amba_devs[i];
- amba_device_register(d, &iomem_resource);
- }
-}
-
-/*
- * Where is the timer (VA)?
- */
-#define TIMER0_VA_BASE ((void __iomem *)MM_IO_BASE_TMR)
-#define TIMER1_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x20))
-#define TIMER2_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x40))
-#define TIMER3_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x60))
-
-static int __init bcmring_clocksource_init(void)
-{
- /* setup timer1 as free-running clocksource */
- sp804_clocksource_init(TIMER1_VA_BASE, "timer1");
-
- /* setup timer3 as free-running clocksource */
- sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
-
- return 0;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init bcmring_init_timer(void)
-{
- printk(KERN_INFO "bcmring_init_timer\n");
- /*
- * Initialise to a known state (all timers off)
- */
- writel(0, TIMER0_VA_BASE + TIMER_CTRL);
- writel(0, TIMER1_VA_BASE + TIMER_CTRL);
- writel(0, TIMER2_VA_BASE + TIMER_CTRL);
- writel(0, TIMER3_VA_BASE + TIMER_CTRL);
-
- /*
- * Make irqs happen for the system timer
- */
- bcmring_clocksource_init();
-
- sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
-}
-
-struct sys_timer bcmring_timer = {
- .init = bcmring_init_timer,
-};
-
-void __init bcmring_init_early(void)
-{
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-}

deleted file mode 100644
index e0e02c4..0000000
@@ -1,31 +0,0 @@
-/*
- *  linux/arch/arm/mach-versatile/core.h
- *
- *  Copyright (C) 2004 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 

USA
- */
-/* Portions copyright Broadcom 2008 */
-#ifndef __ASM_ARCH_BCMRING_H
-#define __ASM_ARCH_BCMRING_H
-
-void __init bcmring_amba_init(void);
-void __init bcmring_map_io(void);
-void __init bcmring_init_irq(void);
-void __init bcmring_init_early(void);
-
-extern struct sys_timer bcmring_timer;
-#endif

deleted file mode 100644
index 648c037..0000000
@@ -1,3 +0,0 @@
-obj-y += dmac/
-obj-y += tmr/
-obj-y += chipc/

deleted file mode 100644
index 6739527..0000000
@@ -1 +0,0 @@
-obj-y += chipcHw.o chipcHw_str.o chipcHw_reset.o chipcHw_init.o

\n\t"
- " nop \n\t"
-#if defined(__KERNEL__) && !defined(STANDALONE)

-		" MRC      p15,#0x0,r0,c1,c0,#0                                  \n\t"
-		" BIC      r0,r0,#0xd                                            \n\t"
-		" MCR      p15,#0x0,r0,c1,c0,#0                                  \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"

-#endif
- " nop \n\t"
- " nop \n\t"
-/* Bypass the ARM clock and switch to XTAL clock */

-		" MOV      r2,#0x80000000                                        \n\t"
-		" LDR      r3,[r2,#8]                                            \n\t"
-		" ORR      r3,r3,#0x20000                                        \n\t"
-		" STR      r3,[r2,#8]                                            \n\t"
-
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-/* Issue reset */
-		" MOV      r3,#0x2                                               \n\t"
-		" STR      r3,[r2,#0x80]                                         \n\t"

-/* End here */
- " MOV pc,pc \n\t");
-/* 0xe1a0f00f == asm ("mov r15, r15"); */
-}

deleted file mode 100644
index fb1104f..0000000
@@ -1 +0,0 @@
-obj-y += dmacHw.o dmacHw_extra.o
\ No newline at end of file

deleted file mode 100644
index 244a61a..0000000

[ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in milli-second */
-) {
- ResetTimer(timerId);
-
- /* Set timer mode periodic */
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-
- return SetTimerPeriod(timerId, msec);
-}
- -/****************************************************************************/ -/**
-* @brief Configures a periodic timer to generate timer interrupt just once
-* after certain time interval
-*
-* This function initializes a periodic timer to generate a single ticks after -* certain time interval in millisecond
-*
-* @return On success: Effective interval set in milli-second
-* On failure: 0
-*
-*/ -/****************************************************************************/
-tmrHw_INTERVAL_t tmrHw_setOneshotTimerInterval(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in milli-second */
-) {
- ResetTimer(timerId);
-
- /* Set timer mode oneshot */
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
- pTmrHw[timerId].Control |= tmrHw_CONTROL_ONESHOT;
-
- return SetTimerPeriod(timerId, msec);
-}
- -/****************************************************************************/ -/**
-* @brief Configures a timer to run as a free running timer
-*
-* This function initializes a timer to run as a free running timer -*
-* @return Timer resolution (count / sec)
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_setFreeRunningTimer(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- uint32_t divider /* [ IN ] Dividing the clock frequency */
-) {
- uint32_t scale = 0;
-
- ResetTimer(timerId);
- /* Set timer as free running mode */
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_PERIODIC;
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-
- if (divider >= 64) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
- scale = 256;
- } else if (divider >= 8) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
- scale = 16;
- } else {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
- scale = 1;
- }
-
- if (timerId == 0 || timerId == 1) {
- return tmrHw_divide(tmrHw_LOW_RESOLUTION_CLOCK, scale);
- } else if (timerId == 2 || timerId == 3) {
- return tmrHw_divide(tmrHw_HIGH_RESOLUTION_CLOCK, scale);
- }
-
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Starts a timer
-*
-* This function starts a preconfigured timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*
-*/ -/****************************************************************************/
-int tmrHw_startTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_TIMER_ENABLE;
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Stops a timer
-*
-* This function stops a running timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*
-*/ -/****************************************************************************/
-int tmrHw_stopTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_TIMER_ENABLE;
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Gets current timer count
-*
-* This function returns the current timer value
-*
-* @return Current downcounting timer value
-*
-*/ -/****************************************************************************/
-uint32_t tmrHw_GetCurrentCount(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- /* return 32 bit timer value */
- switch (pTmrHw[timerId].Control & tmrHw_CONTROL_MODE_MASK) {
- case tmrHw_CONTROL_FREE_RUNNING:
- if (pTmrHw[timerId].CurrentValue) {
- return tmrHw_MAX_COUNT - pTmrHw[timerId].CurrentValue;
- }
- break;
- case tmrHw_CONTROL_PERIODIC:
- case tmrHw_CONTROL_ONESHOT:
- return pTmrHw[timerId].BackgroundLoad -
- pTmrHw[timerId].CurrentValue;
- }
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Gets timer count rate
-*
-* This function returns the number of counts per second
-*
-* @return Count rate
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_getCountRate(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- uint32_t divider = 0;
-
- switch (pTmrHw[timerId].Control & tmrHw_CONTROL_PRESCALE_MASK) {
- case tmrHw_CONTROL_PRESCALE_1:
- divider = 1;
- break;
- case tmrHw_CONTROL_PRESCALE_16:
- divider = 16;
- break;
- case tmrHw_CONTROL_PRESCALE_256:
- divider = 256;
- break;
- default:
- tmrHw_ASSERT(0);
- }
-
- if (timerId == 0 || timerId == 1) {
- return tmrHw_divide(tmrHw_LOW_RESOLUTION_CLOCK, divider);
- } else {
- return tmrHw_divide(tmrHw_HIGH_RESOLUTION_CLOCK, divider);
- }
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Enables timer interrupt
-*
-* This function enables the timer interrupt
-*
-* @return N/A
-*
-*/ -/****************************************************************************/
-void tmrHw_enableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_INTERRUPT_ENABLE;
-}
- -/****************************************************************************/ -/**
-* @brief Disables timer interrupt
-*
-* This function disable the timer interrupt
-*
-* @return N/A
-*
-*/ -/****************************************************************************/
-void tmrHw_disableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_INTERRUPT_ENABLE;
-}
- -/****************************************************************************/ -/**
-* @brief Clears the interrupt
-*
-* This function clears the timer interrupt
-*
-* @return N/A
-*
-* @note
-* Must be called under the context of ISR
-*/ -/****************************************************************************/
-void tmrHw_clearInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].InterruptClear = 0x1;
-}
- -/****************************************************************************/ -/**
-* @brief Gets the interrupt status
-*
-* This function returns timer interrupt status
-*
-* @return Interrupt status
-*/ -/****************************************************************************/
-tmrHw_INTERRUPT_STATUS_e tmrHw_getInterruptStatus(tmrHw_ID_t timerId /*
[ IN ] Timer id */
-) {
- if (pTmrHw[timerId].InterruptStatus) {
- return tmrHw_INTERRUPT_STATUS_SET;
- } else {
- return tmrHw_INTERRUPT_STATUS_UNSET;
- }
-}
- -/****************************************************************************/ -/**
-* @brief Indentifies a timer causing interrupt
-*
-* This functions returns a timer causing interrupt
-*
-* @return 0xFFFFFFFF : No timer causing an interrupt
-* ! 0xFFFFFFFF : timer causing an interrupt
-* @note
-* tmrHw_clearIntrrupt() must be called with a valid timer id after calling this function
-*/ -/****************************************************************************/
-tmrHw_ID_t tmrHw_getInterruptSource(void /* void */
-) {
- int i;
-
- for (i = 0; i < tmrHw_TIMER_NUM_COUNT; i++) {
- if (pTmrHw[i].InterruptStatus) {
- return i;
- }
- }
-
- return 0xFFFFFFFF;
-}
- -/****************************************************************************/ -/**
-* @brief Displays specific timer registers
-*
-*
-* @return void
-*
-*/ -/****************************************************************************/
-void tmrHw_printDebugInfo(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- int (*fpPrint) (const char *, ...) /* [ IN ] Print callback function */
-) {
- (*fpPrint) ("Displaying register contents \n\n");
- (*fpPrint) ("Timer %d: Load value 0x%X\n", timerId,
- pTmrHw[timerId].LoadValue);
- (*fpPrint) ("Timer %d: Background load value 0x%X\n", timerId,
- pTmrHw[timerId].BackgroundLoad);
- (*fpPrint) ("Timer %d: Control 0x%X\n", timerId,
- pTmrHw[timerId].Control);
- (*fpPrint) ("Timer %d: Interrupt clear 0x%X\n", timerId,
- pTmrHw[timerId].InterruptClear);
- (*fpPrint) ("Timer %d: Interrupt raw interrupt 0x%X\n", timerId,
- pTmrHw[timerId].RawInterruptStatus);
- (*fpPrint) ("Timer %d: Interrupt status 0x%X\n", timerId,
- pTmrHw[timerId].InterruptStatus);
-}
- -/****************************************************************************/ -/**
-* @brief Use a timer to perform a busy wait delay for a number of usecs.
-*
-* @return N/A
-*/ -/****************************************************************************/
-void tmrHw_udelay(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- unsigned long usecs /* [ IN ] usec to delay */
-) {
- tmrHw_RATE_t usec_tick_rate;
- tmrHw_COUNT_t start_time;
- tmrHw_COUNT_t delta_time;
-
- start_time = tmrHw_GetCurrentCount(timerId);
- usec_tick_rate = tmrHw_divide(tmrHw_getCountRate(timerId), 1000000);
- delta_time = usecs * usec_tick_rate;
-
- /* Busy wait */
- while (delta_time > (tmrHw_GetCurrentCount(timerId) - start_time))
- ;
-}
- -/****************************************************************************/ -/**
-* @brief Local Divide function
-*
-* This function does the divide
-*
-* @return divide value
-*
-*/ -/****************************************************************************/ -static int tmrHw_divide(int num, int denom)
-{
- int r;
- int t = 1;
-
- /* Shift denom and t up to the largest value to optimize algorithm */
- /* t contains the units of each divide */
- while ((denom & 0x40000000) == 0) { /* fails if denom=0 */
- denom = denom << 1;
- t = t << 1;
- }
-
- /* Initialize the result */
- r = 0;
-
- do {
- /* Determine if there exists a positive remainder */
- if ((num - denom) >= 0) {
- /* Accumlate t to the result and calculate a new remainder */
- num = num - denom;
- r = r + t;
- }
- /* Continue to shift denom and shift t down to 0 */
- denom = denom >> 1;
- t = t >> 1;
- } while (t != 0);
- return r;
-}

deleted file mode 100644
index f01da87..0000000

deleted file mode 100644
index b5beb0b..0000000

deleted file mode 100644
index caa20e5..0000000

deleted file mode 100644
index 8b3d803..0000000

deleted file mode 100644
index 51357dd..0000000

deleted file mode 100644
index 1c639c8..0000000

deleted file mode 100644
index c30d2a5..0000000

deleted file mode 100644
index 3a8718b..0000000

deleted file mode 100644
index ad9e400..0000000

[ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in mili-second */
-);
- -/****************************************************************************/ -/**
-* @brief Configures a periodic timer to generate timer interrupt just once
-* after certain time interval
-*
-* This function initializes a periodic timer to generate a single ticks after -* certain time interval in millisecond
-*
-* @return On success: Effective interval set in mili-second
-* On failure: 0
-*
-*/ -/****************************************************************************/
-tmrHw_INTERVAL_t tmrHw_setOneshotTimerInterval(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in mili-second */
-);
- -/****************************************************************************/ -/**
-* @brief Configures a timer to run as a free running timer
-*
-* This function initializes a timer to run as a free running timer -*
-* @return Timer resolution (count / sec)
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_setFreeRunningTimer(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- uint32_t divider /* [ IN ] Dividing the clock frequency */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Starts a timer
-*
-* This function starts a preconfigured timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*/ -/****************************************************************************/
-int tmrHw_startTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Stops a timer
-*
-* This function stops a running timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*/ -/****************************************************************************/
-int tmrHw_stopTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Gets current timer count
-*
-* This function returns the current timer value
-*
-* @return Current downcounting timer value
-*
-*/ -/****************************************************************************/
-tmrHw_COUNT_t tmrHw_GetCurrentCount(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Gets timer count rate
-*
-* This function returns the number of counts per second
-*
-* @return Count rate
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_getCountRate(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Enables timer interrupt
-*
-* This function enables the timer interrupt
-*
-* @return N/A
-*
-*/ -/****************************************************************************/
-void tmrHw_enableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Disables timer interrupt
-*
-* This function disable the timer interrupt
-*
-* @return N/A
-*/ -/****************************************************************************/
-void tmrHw_disableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Clears the interrupt
-*
-* This function clears the timer interrupt
-*
-* @return N/A
-*
-* @note
-* Must be called under the context of ISR
-*/ -/****************************************************************************/
-void tmrHw_clearInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Gets the interrupt status
-*
-* This function returns timer interrupt status
-*
-* @return Interrupt status
-*/ -/****************************************************************************/
-tmrHw_INTERRUPT_STATUS_e tmrHw_getInterruptStatus(tmrHw_ID_t timerId /*
[ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Indentifies a timer causing interrupt
-*
-* This functions returns a timer causing interrupt
-*
-* @return 0xFFFFFFFF : No timer causing an interrupt
-* ! 0xFFFFFFFF : timer causing an interrupt
-* @note
-* tmrHw_clearIntrrupt() must be called with a valid timer id after calling this function
-*/ -/****************************************************************************/ -tmrHw_ID_t tmrHw_getInterruptSource(void);
- -/****************************************************************************/ -/**
-* @brief Displays specific timer registers
-*
-*
-* @return void
-*
-*/ -/****************************************************************************/
-void tmrHw_printDebugInfo(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- int (*fpPrint) (const char *, ...) /* [ IN ] Print callback function */
-);
- -/****************************************************************************/ -/**
-* @brief Use a timer to perform a busy wait delay for a number of usecs.
-*
-* @return N/A
-*/ -/****************************************************************************/
-void tmrHw_udelay(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- unsigned long usecs /* [ IN ] usec to delay */
-) __attribute__ ((section(".aramtext")));
-
-#endif /* _TMRHW_H */

[ IN ] Configurable clock */
- );
- -/****************************************************************************/ -/**
-* @brief Get Numeric Chip ID
-*
-* This function returns Chip ID that includes the revison number
-*
-* @return Complete numeric Chip ID
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getChipId(void);
- -/****************************************************************************/ -/**
-* @brief Get Chip Product ID
-*
-* This function returns Chip Product ID
-*
-* @return Chip Product ID
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getChipProductId(void);
- -/****************************************************************************/ -/**
-* @brief Get revision number
-*
-* This function returns revision number of the chip
-*
-* @return Revision number
-*/ -/****************************************************************************/ -static inline chipcHw_REV_NUMBER_e chipcHw_getChipRevisionNumber(void); - -/****************************************************************************/ -/**
-* @brief Enables bus interface clock
-*
-* Enables bus interface clock of various device
-*
-* @return void
-*
-* @note use chipcHw_REG_BUS_CLOCK_XXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_busInterfaceClockEnable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_BUS_CLOCK_XXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Disables bus interface clock
-*
-* Disables bus interface clock of various device
-*
-* @return void
-*
-* @note use chipcHw_REG_BUS_CLOCK_XXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_busInterfaceClockDisable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_BUS_CLOCK_XXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Enables various audio channels
-*
-* Enables audio channel
-*
-* @return void
-*
-* @note use chipcHw_REG_AUDIO_CHANNEL_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_audioChannelEnable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_AUDIO_CHANNEL_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Disables various audio channels
-*
-* Disables audio channel
-*
-* @return void
-*
-* @note use chipcHw_REG_AUDIO_CHANNEL_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_audioChannelDisable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_AUDIO_CHANNEL_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Soft resets devices
-*
-* Soft resets various devices
-*
-* @return void
-*
-* @note use chipcHw_REG_SOFT_RESET_XXXXXX defines
-*/ -/****************************************************************************/
-static inline void chipcHw_softReset(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_SOFT_RESET_XXXXXX */
- );
-
-static inline void chipcHw_softResetDisable(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_SOFT_RESET_XXXXXX */
- );
-
-static inline void chipcHw_softResetEnable(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_SOFT_RESET_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Configures misc CHIP functionality
-*
-* Configures CHIP functionality
-*
-* @return void
-*
-* @note use chipcHw_REG_MISC_CTRL_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_miscControl(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_MISC_CTRL_XXXXXX */
- );
-
-static inline void chipcHw_miscControlDisable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_MISC_CTRL_XXXXXX */
- );
-
-static inline void chipcHw_miscControlEnable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_MISC_CTRL_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Set OTP options
-*
-* Set OTP options
-*
-* @return void
-*
-* @note use chipcHw_REG_OTP_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_setOTPOption(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_OTP_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Get sticky bits
-*
-* @return Sticky bit options of type chipcHw_REG_STICKY_XXXXXX
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getStickyBits(void);
- -/****************************************************************************/ -/**
-* @brief Set sticky bits
-*
-* @return void
-*
-* @note use chipcHw_REG_STICKY_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_setStickyBits(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_STICKY_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Clear sticky bits
-*
-* @return void
-*
-* @note use chipcHw_REG_STICKY_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_clearStickyBits(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_STICKY_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Get software override strap options
-*
-* Retrieves software override strap options
-*
-* @return Software override strap value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getSoftStraps(void);
- -/****************************************************************************/ -/**
-* @brief Set software override strap options
-*
-* set software override strap options
-*
-* @return nothing
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_setSoftStraps(uint32_t strapOptions);
- -/****************************************************************************/ -/**
-* @brief Get pin strap options
-*
-* Retrieves pin strap options
-*
-* @return Pin strap value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getPinStraps(void);
- -/****************************************************************************/ -/**
-* @brief Get valid pin strap options
-*
-* Retrieves valid pin strap options
-*
-* @return valid Pin strap value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getValidStraps(void);
- -/****************************************************************************/ -/**
-* @brief Initialize valid pin strap options
-*
-* Retrieves valid pin strap options by copying HW strap options to soft register -* (if chipcHw_STRAPS_SOFT_OVERRIDE not set)
-*
-* @return nothing
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_initValidStraps(void);
- -/****************************************************************************/ -/**
-* @brief Get status (enabled/disabled) of bus interface clock
-*
-* This function returns the status of devices' bus interface clock -*
-* @return Bus interface clock
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getBusInterfaceClockStatus(void);
- -/****************************************************************************/ -/**
-* @brief Get boot device
-*
-* This function returns the device type used in booting the system -*
-* @return Boot device of type chipcHw_BOOT_DEVICE_e
-*
-*/ -/****************************************************************************/ -static inline chipcHw_BOOT_DEVICE_e chipcHw_getBootDevice(void);
- -/****************************************************************************/ -/**
-* @brief Get boot mode
-*
-* This function returns the way the system was booted
-*
-* @return Boot mode of type chipcHw_BOOT_MODE_e
-*
-*/ -/****************************************************************************/ -static inline chipcHw_BOOT_MODE_e chipcHw_getBootMode(void);
- -/****************************************************************************/ -/**
-* @brief Get NAND flash page size
-*
-* This function returns the NAND device page size
-*
-* @return Boot NAND device page size
-*
-*/ -/****************************************************************************/ -static inline chipcHw_NAND_PAGESIZE_e chipcHw_getNandPageSize(void); - -/****************************************************************************/ -/**
-* @brief Get NAND flash address cycle configuration
-*
-* This function returns the NAND flash address cycle configuration -*
-* @return 0 = Do not extra address cycle, 1 = Add extra cycle
-*
-*/ -/****************************************************************************/ -static inline int chipcHw_getNandExtraCycle(void);
- -/****************************************************************************/ -/**
-* @brief Activates PIF interface
-*
-* This function activates PIF interface by taking control of LCD pins -*
-* @note
-* When activated, LCD pins will be defined as follows for PIF operation
-*

-*       CLD[17:0]  = pif_data[17:0]
-*       CLD[23:18] = pif_address[5:0]
-*       CLPOWER    = pif_wr_str
-*       CLCP       = pif_rd_str
-*       CLAC       = pif_hat1
-*       CLFP       = pif_hrdy1
-*       CLLP       = pif_hat2
-*       GPIO[42]   = pif_hrdy2

-*
-* In PIF mode, "pif_hrdy2" overrides other shared function for GPIO[42] pin
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_activatePifInterface(void);
- -/****************************************************************************/ -/**
-* @brief Activates LCD interface
-*
-* This function activates LCD interface
-*
-* @note
-* When activated, LCD pins will be defined as follows
-*

-*       CLD[17:0]  = LCD data
-*       CLD[23:18] = LCD data
-*       CLPOWER    = LCD power
-*       CLCP       =
-*       CLAC       = LCD ack
-*       CLFP       =
-*       CLLP       =

-*/ -/****************************************************************************/ -static inline void chipcHw_activateLcdInterface(void);
- -/****************************************************************************/ -/**
-* @brief Deactivates PIF/LCD interface
-*
-* This function deactivates PIF/LCD interface
-*
-* @note
-* When deactivated LCD pins will be in rti-stated
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_deactivatePifLcdInterface(void);
- -/****************************************************************************/ -/**
-* @brief Get to know the configuration of GPIO pin
-*
-*/ -/****************************************************************************/
-static inline chipcHw_GPIO_FUNCTION_e chipcHw_getGpioPinFunction(int pin /* GPIO Pin number */
- );
- -/****************************************************************************/ -/**
-* @brief Configure GPIO pin function
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setGpioPinFunction(int pin, /* GPIO Pin number */
- chipcHw_GPIO_FUNCTION_e func /* Configuration function */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin slew rate
-*
-* This function sets the slew of individual pin
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinSlewRate(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_SLEW_RATE_e slewRate /* Pin slew rate */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin output drive current
-*
-* This function sets output drive current of individual pin
-*
-* Note: Avoid the use of the word 'current' since linux headers define this
-* to be the current task.
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinOutputCurrent(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_CURRENT_STRENGTH_e curr /* Pin current rating */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin pullup register
-*
-* This function sets pullup register of individual pin
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinPullup(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_PULL_e pullup /* Pullup register settings */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin input type
-*
-* This function sets input type of individual Pin
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinInputType(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_INPUTTYPE_e inputType /* Pin input type */
- );
- -/****************************************************************************/ -/**
-* @brief Retrieves a string representation of the mux setting for a pin.
-*
-* @return Pointer to a character string.
-*/ -/****************************************************************************/ -
-const char *chipcHw_getGpioPinFunctionStr(int pin);
- -/****************************************************************************/ -/** @brief issue warmReset
- */ -/****************************************************************************/ -void chipcHw_reset(uint32_t mask);
- -/****************************************************************************/ -/** @brief clock reconfigure
- */ -/****************************************************************************/ -void chipcHw_clockReconfig(uint32_t busHz, uint32_t armRatio, uint32_t vpmRatio,
- uint32_t ddrRatio);
- -/****************************************************************************/ -/**
-* @brief Enable Spread Spectrum
-*
-* @note chipcHw_Init() must be called earlier
-*/ -/****************************************************************************/ -static inline void chipcHw_enableSpreadSpectrum(void);
- -/****************************************************************************/ -/**
-* @brief Disable Spread Spectrum
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_disableSpreadSpectrum(void);
- -/****************************************************************************/ -/** @brief Checks if software strap is enabled
- *
- * @return 1 : When enable
- * 0 : When disable
- */ -/****************************************************************************/ -static inline int chipcHw_isSoftwareStrapsEnable(void);
- -/****************************************************************************/ -/** @brief Enable software strap
- */ -/****************************************************************************/ -static inline void chipcHw_softwareStrapsEnable(void);
- -/****************************************************************************/ -/** @brief Disable software strap
- */ -/****************************************************************************/ -static inline void chipcHw_softwareStrapsDisable(void);
- -/****************************************************************************/ -/** @brief PLL test enable
- */ -/****************************************************************************/ -static inline void chipcHw_pllTestEnable(void);
- -/****************************************************************************/ -/** @brief PLL2 test enable
- */ -/****************************************************************************/ -static inline void chipcHw_pll2TestEnable(void);
- -/****************************************************************************/ -/** @brief PLL test disable
- */ -/****************************************************************************/ -static inline void chipcHw_pllTestDisable(void);
- -/****************************************************************************/ -/** @brief PLL2 test disable
- */ -/****************************************************************************/ -static inline void chipcHw_pll2TestDisable(void);
- -/****************************************************************************/ -/** @brief Get PLL test status
- */ -/****************************************************************************/ -static inline int chipcHw_isPllTestEnable(void);
- -/****************************************************************************/ -/** @brief Get PLL2 test status
- */ -/****************************************************************************/ -static inline int chipcHw_isPll2TestEnable(void);
- -/****************************************************************************/ -/** @brief PLL test select
- */ -/****************************************************************************/ -static inline void chipcHw_pllTestSelect(uint32_t val);
- -/****************************************************************************/ -/** @brief PLL2 test select
- */ -/****************************************************************************/ -static inline void chipcHw_pll2TestSelect(uint32_t val);
- -/****************************************************************************/ -/** @brief Get PLL test selected option
- */ -/****************************************************************************/ -static inline uint8_t chipcHw_getPllTestSelected(void);
- -/****************************************************************************/ -/** @brief Get PLL2 test selected option
- */ -/****************************************************************************/ -static inline uint8_t chipcHw_getPll2TestSelected(void);
- -/****************************************************************************/ -/**
-* @brief Enables DDR SW phase alignment interrupt
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrPhaseAlignInterruptEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disables DDR SW phase alignment interrupt
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrPhaseAlignInterruptDisable(void);
- -/****************************************************************************/ -/**
-* @brief Set VPM SW phase alignment interrupt mode
-*
-* This function sets VPM phase alignment interrupt
-*
-*/ -/****************************************************************************/ -static inline void -chipcHw_vpmPhaseAlignInterruptMode(chipcHw_VPM_HW_PHASE_INTR_e mode); - -/****************************************************************************/ -/**
-* @brief Enable DDR phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrSwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable DDR phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrSwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Enable DDR phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable DDR phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Enable VPM phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmSwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable VPM phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmSwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Enable VPM phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable VPM phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Set DDR phase alignment margin in hardware
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setDdrHwPhaseAlignMargin(chipcHw_DDR_HW_PHASE_MARGIN_e margin /* Margin alinging DDR phase */
- );
- -/****************************************************************************/ -/**
-* @brief Set VPM phase alignment margin in hardware
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setVpmHwPhaseAlignMargin(chipcHw_VPM_HW_PHASE_MARGIN_e margin /* Margin alinging VPM phase */
- );
- -/****************************************************************************/ -/**
-* @brief Checks DDR phase aligned status done by HW
-*
-* @return 1: When aligned
-* 0: When not aligned
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_isDdrHwPhaseAligned(void);
- -/****************************************************************************/ -/**
-* @brief Checks VPM phase aligned status done by HW
-*
-* @return 1: When aligned
-* 0: When not aligned
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_isVpmHwPhaseAligned(void);
- -/****************************************************************************/ -/**
-* @brief Get DDR phase aligned status done by HW
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getDdrHwPhaseAlignStatus(void);
- -/****************************************************************************/ -/**
-* @brief Get VPM phase aligned status done by HW
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getVpmHwPhaseAlignStatus(void);
- -/****************************************************************************/ -/**
-* @brief Get DDR phase control value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getDdrPhaseControl(void);
- -/****************************************************************************/ -/**
-* @brief Get VPM phase control value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getVpmPhaseControl(void);
- -/****************************************************************************/ -/**
-* @brief DDR phase alignment timeout count
-*
-* @note If HW fails to perform the phase alignment, it will trigger
-* a DDR phase alignment timeout interrupt.
-*/ -/****************************************************************************/
-static inline void chipcHw_ddrHwPhaseAlignTimeout(uint32_t busCycle /* Timeout in bus cycle */
- );
- -/****************************************************************************/ -/**
-* @brief VPM phase alignment timeout count
-*
-* @note If HW fails to perform the phase alignment, it will trigger
-* a VPM phase alignment timeout interrupt.
-*/ -/****************************************************************************/
-static inline void chipcHw_vpmHwPhaseAlignTimeout(uint32_t busCycle /* Timeout in bus cycle */
- );
- -/****************************************************************************/ -/**
-* @brief DDR phase alignment timeout interrupt enable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignTimeoutInterruptEnable(void); - -/****************************************************************************/ -/**
-* @brief VPM phase alignment timeout interrupt enable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignTimeoutInterruptEnable(void); - -/****************************************************************************/ -/**
-* @brief DDR phase alignment timeout interrupt disable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignTimeoutInterruptDisable(void); - -/****************************************************************************/ -/**
-* @brief VPM phase alignment timeout interrupt disable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignTimeoutInterruptDisable(void); - -/****************************************************************************/ -/**
-* @brief Clear DDR phase alignment timeout interrupt
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignTimeoutInterruptClear(void); - -/****************************************************************************/ -/**
-* @brief Clear VPM phase alignment timeout interrupt
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignTimeoutInterruptClear(void); -
-/* ---- Private Constants and Types -------------------------------------- */ -
-#endif /* CHIPC_DEF_H */

deleted file mode 100644
index 6ae20a6..0000000

USA
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <asm/sizes.h>
-#include <cfg_global.h>
-#include <mach/csp/mm_io.h>
-
-/* Hardware addresses of major areas.

- *  *_START is the physical address
- *  *_SIZE  is the size of the region
- *  *_BASE  is the virtual address

- */
-#define RAM_START PHYS_OFFSET
-
-#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
-#define RAM_BASE PAGE_OFFSET
-
-/* Macros to make managing spinlocks a bit more controlled in terms of naming. */ -/* See reg_gpio.h, reg_irq.h, arch.c, gpio.c for example usage. */
-#if defined(__KERNEL__)
-#define HW_DECLARE_SPINLOCK(name) DEFINE_SPINLOCK(bcmring_##name##_reg_lock);
-#define HW_EXTERN_SPINLOCK(name) extern spinlock_t bcmring_##name##_reg_lock;
-#define HW_IRQ_SAVE(name, val) spin_lock_irqsave(&bcmring_##name##_reg_lock, (val)) -#define HW_IRQ_RESTORE(name, val) spin_unlock_irqrestore(&bcmring_##name##_reg_lock, (val)) -#else
-#define HW_DECLARE_SPINLOCK(name)
-#define HW_EXTERN_SPINLOCK(name)
-#define HW_IRQ_SAVE(name, val) {(void)(name); (void)(val); }
-#define HW_IRQ_RESTORE(name, val) {(void)(name); (void)(val); }
-#endif
-
-#ifndef HW_IO_PHYS_TO_VIRT
-#define HW_IO_PHYS_TO_VIRT MM_IO_PHYS_TO_VIRT
-#endif
-#define HW_IO_VIRT_TO_PHYS MM_IO_VIRT_TO_PHYS
-
-#endif

deleted file mode 100644
index b279b82..0000000

USA
- */
-
-#if !defined(ARCH_BCMRING_IRQS_H)
-#define ARCH_BCMRING_IRQS_H
-
-/* INTC0 - interrupt controller 0 */

-#define IRQ_INTC0_START     0
-#define IRQ_DMA0C0          0	/* DMA0 channel 0 interrupt */
-#define IRQ_DMA0C1          1	/* DMA0 channel 1 interrupt */
-#define IRQ_DMA0C2          2	/* DMA0 channel 2 interrupt */
-#define IRQ_DMA0C3          3	/* DMA0 channel 3 interrupt */
-#define IRQ_DMA0C4          4	/* DMA0 channel 4 interrupt */
-#define IRQ_DMA0C5          5	/* DMA0 channel 5 interrupt */
-#define IRQ_DMA0C6          6	/* DMA0 channel 6 interrupt */
-#define IRQ_DMA0C7          7	/* DMA0 channel 7 interrupt */
-#define IRQ_DMA1C0          8	/* DMA1 channel 0 interrupt */
-#define IRQ_DMA1C1          9	/* DMA1 channel 1 interrupt */
-#define IRQ_DMA1C2         10	/* DMA1 channel 2 interrupt */
-#define IRQ_DMA1C3         11	/* DMA1 channel 3 interrupt */
-#define IRQ_DMA1C4         12	/* DMA1 channel 4 interrupt */
-#define IRQ_DMA1C5         13	/* DMA1 channel 5 interrupt */
-#define IRQ_DMA1C6         14	/* DMA1 channel 6 interrupt */
-#define IRQ_DMA1C7         15	/* DMA1 channel 7 interrupt */
-#define IRQ_VPM            16	/* Voice process module interrupt */
-#define IRQ_USBHD2         17	/* USB host2/device2 interrupt */
-#define IRQ_USBH1          18	/* USB1 host interrupt */
-#define IRQ_USBD           19	/* USB device interrupt */
-#define IRQ_SDIOH0         20	/* SDIO0 host interrupt */
-#define IRQ_SDIOH1         21	/* SDIO1 host interrupt */
-#define IRQ_TIMER0         22	/* Timer0 interrupt */
-#define IRQ_TIMER1         23	/* Timer1 interrupt */
-#define IRQ_TIMER2         24	/* Timer2 interrupt */
-#define IRQ_TIMER3         25	/* Timer3 interrupt */
-#define IRQ_SPIH           26	/* SPI host interrupt */
-#define IRQ_ESW            27	/* Ethernet switch interrupt */
-#define IRQ_APM            28	/* Audio process module interrupt */
-#define IRQ_GE             29	/* Graphic engine interrupt */
-#define IRQ_CLCD           30	/* LCD Controller interrupt */
-#define IRQ_PIF            31	/* Peripheral interface interrupt */
-#define IRQ_INTC0_END      31
-
-/* INTC1 - interrupt controller 1 */
-#define IRQ_INTC1_START    32
-#define IRQ_GPIO0          32	/*  0 GPIO bit 31//0 combined interrupt */
-#define IRQ_GPIO1          33	/*  1 GPIO bit 64//32 combined interrupt */
-#define IRQ_I2S0           34	/*  2 I2S0 interrupt */
-#define IRQ_I2S1           35	/*  3 I2S1 interrupt */
-#define IRQ_I2CH           36	/*  4 I2C host interrupt */
-#define IRQ_I2CS           37	/*  5 I2C slave interrupt */
-#define IRQ_SPIS           38	/*  6 SPI slave interrupt */
-#define IRQ_GPHY           39	/*  7 Gigabit Phy interrupt */
-#define IRQ_FLASHC         40	/*  8 Flash controller interrupt */
-#define IRQ_COMMTX         41	/*  9 ARM DDC transmit interrupt */
-#define IRQ_COMMRX         42	/* 10 ARM DDC receive interrupt */
-#define IRQ_PMUIRQ         43	/* 11 ARM performance monitor interrupt */
-#define IRQ_UARTB          44	/* 12 UARTB */
-#define IRQ_WATCHDOG       45	/* 13 Watchdog timer interrupt */
-#define IRQ_UARTA          46	/* 14 UARTA */
-#define IRQ_TSC            47	/* 15 Touch screen controller interrupt */
-#define IRQ_KEYC           48	/* 16 Key pad controller interrupt */
-#define IRQ_DMPU           49	/* 17 DDR2 memory partition interrupt */
-#define IRQ_VMPU           50	/* 18 VRAM memory partition interrupt */
-#define IRQ_FMPU           51	/* 19 Flash memory parition unit interrupt */
-#define IRQ_RNG            52	/* 20 Random number generator interrupt */
-#define IRQ_RTC0           53	/* 21 Real time clock periodic interrupt */
-#define IRQ_RTC1           54	/* 22 Real time clock one-shot interrupt */
-#define IRQ_SPUM           55	/* 23 Secure process module interrupt */
-#define IRQ_VDEC           56	/* 24 Hantro video decoder interrupt */
-#define IRQ_RTC2           57	/* 25 Real time clock tamper interrupt */
-#define IRQ_DDRP           58	/* 26 DDR Panic interrupt */
-#define IRQ_INTC1_END      58
-
-/* SINTC secure int controller */
-#define IRQ_SINTC_START    59
-#define IRQ_SEC_WATCHDOG   59	/*  0 Watchdog timer interrupt */
-#define IRQ_SEC_UARTA      60	/*  1 UARTA interrupt */
-#define IRQ_SEC_TSC        61	/*  2 Touch screen controller interrupt */
-#define IRQ_SEC_KEYC       62	/*  3 Key pad controller interrupt */
-#define IRQ_SEC_DMPU       63	/*  4 DDR2 memory partition interrupt */
-#define IRQ_SEC_VMPU       64	/*  5 VRAM memory partition interrupt */
-#define IRQ_SEC_FMPU       65	/*  6 Flash memory parition unit interrupt */
-#define IRQ_SEC_RNG        66	/*  7 Random number generator interrupt */
-#define IRQ_SEC_RTC0       67	/*  8 Real time clock periodic interrupt */
-#define IRQ_SEC_RTC1       68	/*  9 Real time clock one-shot interrupt */
-#define IRQ_SEC_SPUM       69	/* 10 Secure process module interrupt */
-#define IRQ_SEC_TIMER0     70	/* 11 Secure timer0 interrupt */
-#define IRQ_SEC_TIMER1     71	/* 12 Secure timer1 interrupt */
-#define IRQ_SEC_TIMER2     72	/* 13 Secure timer2 interrupt */
-#define IRQ_SEC_TIMER3     73	/* 14 Secure timer3 interrupt */
-#define IRQ_SEC_RTC2       74	/* 15 Real time clock tamper interrupt */

-
-#define IRQ_SINTC_END 74
-
-/* Note: there are 3 INTC registers of 32 bits each. So internal IRQs could go from 0-95 */
-/* Since IRQs are typically viewed in decimal, we start the gpio based IRQs off at 100 */
-/* to make the mapping easy for humans to decipher. */
-
-#define IRQ_GPIO_0 100
-
-#define NUM_INTERNAL_IRQS (IRQ_SINTC_END+1)
-
-/* I couldn't get the gpioHw_reg.h file to be included cleanly, so I hardcoded it */
-/* define NUM_GPIO_IRQS GPIOHW_TOTAL_NUM_PINS */
-#define NUM_GPIO_IRQS 62
-
-#define NR_IRQS (IRQ_GPIO_0 + NUM_GPIO_IRQS)
-
-#define IRQ_UNKNOWN -1
-
-/* Tune these bits to preclude noisy or unsupported interrupt sources as required. */

-#define IRQ_INTC0_VALID_MASK        0xffffffff
-#define IRQ_INTC1_VALID_MASK        0x07ffffff
-#define IRQ_SINTC_VALID_MASK        0x0000ffff

-
-#endif /* ARCH_BCMRING_IRQS_H */

deleted file mode 100644
index ce5cd16..0000000

                            (DNA)      */
-#define HW_CFG_NOR_TWP       (6 << 11)	/* Write pulse width cycle (n+1) 
                           (35ns)     */
-#define HW_CFG_NOR_TWR       (0 << 9)	/* Write recovery cycle (n+1) 
                           (0ns)      */
-#define HW_CFG_NOR_TAS       (0 << 7)	/* Write address setup cycle (n+1)                          (0ns)      */
-#define HW_CFG_NOR_TOE       (0 << 5)	/* Output enable delay cycle (n) 
                           (max 25ns) */
-#define HW_CFG_NOR_TRC_TLC   (0x10 << 0)	/* Read access cycle / Burst read latency (n+2 / n+1)       (100ns)    */
-
-#define HW_CFG_FLASH0_TCR (HW_CFG_NOR_TPRC_TWLC \
-	| HW_CFG_NOR_TBTA      \
-	| HW_CFG_NOR_TWP       \
-	| HW_CFG_NOR_TWR       \
-	| HW_CFG_NOR_TAS       \
-	| HW_CFG_NOR_TOE       \
-	| HW_CFG_NOR_TRC_TLC)

-
-#define HW_CFG_FLASH1_TCR HW_CFG_FLASH0_TCR
-#define HW_CFG_FLASH2_TCR HW_CFG_FLASH0_TCR
-
-/* SDRAM Settings */

-/* #define HW_CFG_SDRAM_CAS_LATENCY        5    Default 5, Values [3..6] */
-/* #define HW_CFG_SDRAM_CHIP_SELECT_CNT    1    Default 1, Vaules [1..2] */
-/* #define HW_CFG_SDRAM_SPEED_GRADE        667  Default 667, Values [400,533,667,800] */
-/* #define HW_CFG_SDRAM_WIDTH_BITS         16   Default 16, Vaules [8,16] */

-#define HW_CFG_SDRAM_SIZE_BYTES 0x10000000 /* Total memory, not per device size */
-
-/* ---- Variable Externs ------------------------------------- */ -/* ---- Function Prototypes ---------------------------------- */ -
-#endif /* MEMORY_SETTINGS_H */

deleted file mode 100644
index 40d033e..0000000

USA
- */
-
-/*
- * Specifies the number of ticks per second
- */
-#define CLOCK_TICK_RATE 100000 /* REG_SMT_TICKS_PER_SEC */

deleted file mode 100644
index 437fa68..0000000

USA
- */
-#include <linux/init.h>
-#include <linux/stddef.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-
-#include <asm/mach/irq.h>
-#include <mach/csp/intcHw_reg.h>
-#include <mach/csp/mm_io.h>
-
-static void bcmring_mask_irq0(struct irq_data *d)
-{
- writel(1 << (d->irq - IRQ_INTC0_START),
- MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
-}
-
-static void bcmring_unmask_irq0(struct irq_data *d) -{
- writel(1 << (d->irq - IRQ_INTC0_START),
- MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
-}
-
-static void bcmring_mask_irq1(struct irq_data *d)
-{
- writel(1 << (d->irq - IRQ_INTC1_START),
- MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
-}
-
-static void bcmring_unmask_irq1(struct irq_data *d) -{
- writel(1 << (d->irq - IRQ_INTC1_START),
- MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
-}
-
-static void bcmring_mask_irq2(struct irq_data *d)
-{
- writel(1 << (d->irq - IRQ_SINTC_START),
- MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
-}
-
-static void bcmring_unmask_irq2(struct irq_data *d) -{
- writel(1 << (d->irq - IRQ_SINTC_START),
- MM_IO_BASE_SINTC + INTCHW_INTENABLE);
-}
-
-static struct irq_chip bcmring_irq0_chip = {
- .name = "ARM-INTC0",
- .irq_ack = bcmring_mask_irq0,
- .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
- .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
-};
-
-static struct irq_chip bcmring_irq1_chip = {
- .name = "ARM-INTC1",
- .irq_ack = bcmring_mask_irq1,
- .irq_mask = bcmring_mask_irq1,
- .irq_unmask = bcmring_unmask_irq1,
-};
-
-static struct irq_chip bcmring_irq2_chip = {
- .name = "ARM-SINTC",
- .irq_ack = bcmring_mask_irq2,
- .irq_mask = bcmring_mask_irq2,
- .irq_unmask = bcmring_unmask_irq2,
-};
-
-static void vic_init(void __iomem *base, struct irq_chip *chip,
- unsigned int irq_start, unsigned int vic_sources)
-{
- unsigned int i;
- for (i = 0; i < 32; i++) {
- unsigned int irq = irq_start + i;
- irq_set_chip(irq, chip);
- irq_set_chip_data(irq, base);
-
- if (vic_sources & (1 << i)) {
- irq_set_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
- }
- writel(0, base + INTCHW_INTSELECT);
- writel(0, base + INTCHW_INTENABLE);
- writel(~0, base + INTCHW_INTENCLEAR);
- writel(0, base + INTCHW_IRQSTATUS);
- writel(~0, base + INTCHW_SOFTINTCLEAR);
-}
-
-void __init bcmring_init_irq(void)
-{
- vic_init((void __iomem *)MM_IO_BASE_INTC0, &bcmring_irq0_chip,
- IRQ_INTC0_START, IRQ_INTC0_VALID_MASK);
- vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
- IRQ_INTC1_START, IRQ_INTC1_VALID_MASK);
- vic_init((void __iomem *)MM_IO_BASE_SINTC, &bcmring_irq2_chip,
- IRQ_SINTC_START, IRQ_SINTC_VALID_MASK);
-
- /* special cases */
- if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
- irq_set_handler(IRQ_GPIO0, handle_simple_irq);
- }
- if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
- irq_set_handler(IRQ_GPIO1, handle_simple_irq);
- }
-}

1.7.1






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From: Christian Daudt <[email protected]>
To: csd <[email protected]>
CC: Christian Daudt <[email protected]>
Subject: [PATCH 2/2] ARM: Remove mach-bcmring
Date: Wed, 12 Sep 2012 22:48:55 -0700
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Remove mach-bcmring as this is no longer maintained or used.

Signed-off-by: Christian Daudt <[email protected]>
---
 MAINTAINERS                                        |    7 -
 arch/arm/Kconfig                                   |   14 -
 arch/arm/Makefile                                  |    1 -
 arch/arm/configs/bcmring_defconfig                 |   79 -
 arch/arm/mach-bcmring/Kconfig                      |   19 -
 arch/arm/mach-bcmring/Makefile                     |    8 -
 arch/arm/mach-bcmring/Makefile.boot                |    6 -
 arch/arm/mach-bcmring/arch.c                       |  199 ---
 arch/arm/mach-bcmring/clock.c                      |  223 ---
 arch/arm/mach-bcmring/clock.h                      |   33 -
 arch/arm/mach-bcmring/core.c                       |  228 ---
 arch/arm/mach-bcmring/core.h                       |   31 -
 arch/arm/mach-bcmring/csp/Makefile                 |    3 -
 arch/arm/mach-bcmring/csp/chipc/Makefile           |    1 -
 arch/arm/mach-bcmring/csp/chipc/chipcHw.c          |  776 ---------
 arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c     |  293 ----
 arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c    |  124 --
 arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c      |   64 -
 arch/arm/mach-bcmring/csp/dmac/Makefile            |    1 -
 arch/arm/mach-bcmring/csp/dmac/dmacHw.c            |  917 -----------
 arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c      | 1017 ------------
 arch/arm/mach-bcmring/csp/tmr/Makefile             |    1 -
 arch/arm/mach-bcmring/csp/tmr/tmrHw.c              |  576 -------
 arch/arm/mach-bcmring/dma.c                        | 1518 
------------------
 arch/arm/mach-bcmring/dma_device.c                 |  593 -------
 arch/arm/mach-bcmring/include/cfg_global.h         |   13 -
 arch/arm/mach-bcmring/include/cfg_global_defines.h |   40 -
 arch/arm/mach-bcmring/include/csp/cache.h          |   35 -
 arch/arm/mach-bcmring/include/csp/delay.h          |   36 -
 arch/arm/mach-bcmring/include/csp/dmacHw.h         |  596 -------
 arch/arm/mach-bcmring/include/csp/errno.h          |   32 -
 arch/arm/mach-bcmring/include/csp/intcHw.h         |   40 -
 arch/arm/mach-bcmring/include/csp/module.h         |   32 -
 arch/arm/mach-bcmring/include/csp/reg.h            |  114 --
 arch/arm/mach-bcmring/include/csp/secHw.h          |   65 -
 arch/arm/mach-bcmring/include/csp/stdint.h         |   30 -
 arch/arm/mach-bcmring/include/csp/string.h         |   34 -
 arch/arm/mach-bcmring/include/csp/tmrHw.h          |  263 ---
 arch/arm/mach-bcmring/include/mach/csp/cap.h       |   63 -
 .../arm/mach-bcmring/include/mach/csp/cap_inline.h |  409 -----
 .../mach-bcmring/include/mach/csp/chipcHw_def.h    | 1123 -------------
 .../mach-bcmring/include/mach/csp/chipcHw_inline.h | 1673 
--------------------
 .../mach-bcmring/include/mach/csp/chipcHw_reg.h    |  530 -------
 arch/arm/mach-bcmring/include/mach/csp/ddrcReg.h   |  872 ----------
 .../mach-bcmring/include/mach/csp/dmacHw_priv.h    |  145 --
 .../arm/mach-bcmring/include/mach/csp/dmacHw_reg.h |  406 -----
 arch/arm/mach-bcmring/include/mach/csp/hw_cfg.h    |   73 -
 .../arm/mach-bcmring/include/mach/csp/intcHw_reg.h |  246 ---
 arch/arm/mach-bcmring/include/mach/csp/mm_addr.h   |  101 --
 arch/arm/mach-bcmring/include/mach/csp/mm_io.h     |  147 --
 arch/arm/mach-bcmring/include/mach/csp/secHw_def.h |  100 --
 .../mach-bcmring/include/mach/csp/secHw_inline.h   |   79 -
 arch/arm/mach-bcmring/include/mach/csp/tmrHw_reg.h |   82 -
 arch/arm/mach-bcmring/include/mach/dma.h           |  630 --------
 arch/arm/mach-bcmring/include/mach/entry-macro.S   |   76 -
 arch/arm/mach-bcmring/include/mach/hardware.h      |   57 -
 arch/arm/mach-bcmring/include/mach/irqs.h          |  132 --
 .../mach-bcmring/include/mach/memory_settings.h    |   67 -
 arch/arm/mach-bcmring/include/mach/reg_nand.h      |   66 -
 arch/arm/mach-bcmring/include/mach/reg_umi.h       |  237 ---
 arch/arm/mach-bcmring/include/mach/timer.h         |   77 -
 arch/arm/mach-bcmring/include/mach/timex.h         |   25 -
 arch/arm/mach-bcmring/include/mach/uncompress.h    |   43 -
 arch/arm/mach-bcmring/irq.c                        |  126 --
 arch/arm/mach-bcmring/mm.c                         |   60 -
 arch/arm/mach-bcmring/timer.c                      |   61 -
 66 files changed, 0 insertions(+), 15768 deletions(-)
 delete mode 100644 arch/arm/configs/bcmring_defconfig
 delete mode 100644 arch/arm/mach-bcmring/Kconfig
 delete mode 100644 arch/arm/mach-bcmring/Makefile
 delete mode 100644 arch/arm/mach-bcmring/Makefile.boot
 delete mode 100644 arch/arm/mach-bcmring/arch.c
 delete mode 100644 arch/arm/mach-bcmring/clock.c
 delete mode 100644 arch/arm/mach-bcmring/clock.h
 delete mode 100644 arch/arm/mach-bcmring/core.c
 delete mode 100644 arch/arm/mach-bcmring/core.h
 delete mode 100644 arch/arm/mach-bcmring/csp/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw.c
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw_init.c
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c
 delete mode 100644 arch/arm/mach-bcmring/csp/chipc/chipcHw_str.c
 delete mode 100644 arch/arm/mach-bcmring/csp/dmac/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/dmac/dmacHw.c
 delete mode 100644 arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
 delete mode 100644 arch/arm/mach-bcmring/csp/tmr/Makefile
 delete mode 100644 arch/arm/mach-bcmring/csp/tmr/tmrHw.c
 delete mode 100644 arch/arm/mach-bcmring/dma.c
 delete mode 100644 arch/arm/mach-bcmring/dma_device.c
 delete mode 100644 arch/arm/mach-bcmring/include/cfg_global.h
 delete mode 100644 arch/arm/mach-bcmring/include/cfg_global_defines.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/cache.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/delay.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/dmacHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/errno.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/intcHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/module.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/secHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/stdint.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/string.h
 delete mode 100644 arch/arm/mach-bcmring/include/csp/tmrHw.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/cap.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/cap_inline.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/chipcHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/ddrcReg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/hw_cfg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/mm_addr.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/mm_io.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/secHw_def.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/secHw_inline.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/csp/tmrHw_reg.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/dma.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/entry-macro.S
 delete mode 100644 arch/arm/mach-bcmring/include/mach/hardware.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/irqs.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/memory_settings.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/reg_nand.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/reg_umi.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/timer.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/timex.h
 delete mode 100644 arch/arm/mach-bcmring/include/mach/uncompress.h
 delete mode 100644 arch/arm/mach-bcmring/irq.c
 delete mode 100644 arch/arm/mach-bcmring/mm.c
 delete mode 100644 arch/arm/mach-bcmring/timer.c

index 36da5f9..a4b166c 100644

index c5f9ae5..e99177a 100644

index 30eae87..8383e2e 100644

deleted file mode 100644
index 9170d16..0000000

deleted file mode 100644
index f8d9fce..0000000

deleted file mode 100644
index aef2467..0000000

deleted file mode 100644
index 5e0b981..0000000

deleted file mode 100644
index adbfb19..0000000

USA
- */
-/* Portions copyright Broadcom 2008 */
-
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/amba/bus.h>
-#include <linux/clkdev.h>
-
-#include <mach/csp/mm_addr.h>
-#include <mach/hardware.h>
-#include <linux/io.h>
-#include <asm/irq.h>
-#include <asm/hardware/arm_timer.h>
-#include <asm/hardware/timer-sp.h>
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-#include <cfg_global.h>
-
-#include "clock.h"
-
-#include <csp/secHw.h>
-#include <mach/csp/secHw_def.h>
-#include <mach/csp/chipcHw_inline.h>
-#include <mach/csp/tmrHw_reg.h>
-
-static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL); -static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL); -
-static struct clk pll1_clk = {
- .name = "PLL1",
- .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL1,
- .rate_hz = 2000000000,
- .use_cnt = 7,
-};
-
-static struct clk uart_clk = {
- .name = "UART",
- .type = CLK_TYPE_PROGRAMMABLE,
- .csp_id = chipcHw_CLOCK_UART,
- .rate_hz = HW_CFG_UART_CLK_HZ,
- .parent = &pll1_clk,
-};
-
-static struct clk dummy_apb_pclk = {
- .name = "BUSCLK",
- .type = CLK_TYPE_PRIMARY,
- .mode = CLK_MODE_XTAL,
-};
-
-/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically 150-166 MHz */ -#if defined(CONFIG_ARCH_FPGA11107)
-/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */ -/* slow down Linux's sense of time */

-#define TIMER0_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
-#define TIMER1_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
-#define TIMER3_FREQUENCY_MHZ  (tmrHw_HIGH_FREQUENCY_MHZ * 30)
-#define TIMER3_FREQUENCY_KHZ   (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
-#else
-#define TIMER0_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
-#define TIMER1_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
-#define TIMER3_FREQUENCY_MHZ  tmrHw_HIGH_FREQUENCY_MHZ
-#define TIMER3_FREQUENCY_KHZ  (tmrHw_HIGH_FREQUENCY_HZ / 1000)

-#endif
-
-static struct clk sp804_timer012_clk = {
- .name = "sp804-timer-0,1,2",
- .type = CLK_TYPE_PRIMARY,
- .mode = CLK_MODE_XTAL,
- .rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
-};
-
-static struct clk sp804_timer3_clk = {
- .name = "sp804-timer-3",
- .type = CLK_TYPE_PRIMARY,
- .mode = CLK_MODE_XTAL,
- .rate_hz = TIMER3_FREQUENCY_KHZ * 1000,
-};
-
-static struct clk_lookup lookups[] = {
- { /* Bus clock */
- .con_id = "apb_pclk",
- .clk = &dummy_apb_pclk,
- }, { /* UART0 */
- .dev_id = "uarta",
- .clk = &uart_clk,
- }, { /* UART1 */
- .dev_id = "uartb",
- .clk = &uart_clk,
- }, { /* SP804 timer 0 */
- .dev_id = "sp804",
- .con_id = "timer0",
- .clk = &sp804_timer012_clk,
- }, { /* SP804 timer 1 */
- .dev_id = "sp804",
- .con_id = "timer1",
- .clk = &sp804_timer012_clk,
- }, { /* SP804 timer 3 */
- .dev_id = "sp804",
- .con_id = "timer3",
- .clk = &sp804_timer3_clk,
- }
-};
-
-static struct amba_device *amba_devs[] __initdata = {
- &uartA_device,
- &uartB_device,
-};
-
-void __init bcmring_amba_init(void)
-{
- int i;
- u32 bus_clock;
-
-/* Linux is run initially in non-secure mode. Secure peripherals */ -/* generate FIQ, and must be handled in secure mode. Until we have */ -/* a linux security monitor implementation, keep everything in */ -/* non-secure mode. */
- chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU);
- secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL |

-			  secHw_BLK_MASK_KEY_SCAN |
-			  secHw_BLK_MASK_TOUCH_SCREEN |
-			  secHw_BLK_MASK_UART0 |
-			  secHw_BLK_MASK_UART1 |
-			  secHw_BLK_MASK_WATCHDOG |
-			  secHw_BLK_MASK_SPUM |
-			  secHw_BLK_MASK_DDR2 |
-			  secHw_BLK_MASK_SPU |
-			  secHw_BLK_MASK_PKA |
-			  secHw_BLK_MASK_RNG |
-			  secHw_BLK_MASK_RTC |
-			  secHw_BLK_MASK_OTP |
-			  secHw_BLK_MASK_BOOT |
-			  secHw_BLK_MASK_MPU |
-			  secHw_BLK_MASK_TZCTRL | secHw_BLK_MASK_INTR);

-
- /* Only the devices attached to the AMBA bus are enabled just before the bus is */
- /* scanned and the drivers are loaded. The clocks need to be on for the AMBA bus */
- /* driver to access these blocks. The bus is probed, and the drivers are loaded. */
- /* FIXME Need to remove enable of PIF once CLCD clock enable used properly in FPGA. */
- bus_clock = chipcHw_REG_BUS_CLOCK_GE
- | chipcHw_REG_BUS_CLOCK_SDIO0 | chipcHw_REG_BUS_CLOCK_SDIO1;
-
- chipcHw_busInterfaceClockEnable(bus_clock);
-
- for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
- struct amba_device *d = amba_devs[i];
- amba_device_register(d, &iomem_resource);
- }
-}
-
-/*
- * Where is the timer (VA)?
- */
-#define TIMER0_VA_BASE ((void __iomem *)MM_IO_BASE_TMR)
-#define TIMER1_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x20))
-#define TIMER2_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x40))
-#define TIMER3_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x60))
-
-static int __init bcmring_clocksource_init(void)
-{
- /* setup timer1 as free-running clocksource */
- sp804_clocksource_init(TIMER1_VA_BASE, "timer1");
-
- /* setup timer3 as free-running clocksource */
- sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
-
- return 0;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init bcmring_init_timer(void)
-{
- printk(KERN_INFO "bcmring_init_timer\n");
- /*
- * Initialise to a known state (all timers off)
- */
- writel(0, TIMER0_VA_BASE + TIMER_CTRL);
- writel(0, TIMER1_VA_BASE + TIMER_CTRL);
- writel(0, TIMER2_VA_BASE + TIMER_CTRL);
- writel(0, TIMER3_VA_BASE + TIMER_CTRL);
-
- /*
- * Make irqs happen for the system timer
- */
- bcmring_clocksource_init();
-
- sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
-}
-
-struct sys_timer bcmring_timer = {
- .init = bcmring_init_timer,
-};
-
-void __init bcmring_init_early(void)
-{
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-}

deleted file mode 100644
index e0e02c4..0000000

USA
- */
-/* Portions copyright Broadcom 2008 */
-#ifndef __ASM_ARCH_BCMRING_H
-#define __ASM_ARCH_BCMRING_H
-
-void __init bcmring_amba_init(void);
-void __init bcmring_map_io(void);
-void __init bcmring_init_irq(void);
-void __init bcmring_init_early(void);
-
-extern struct sys_timer bcmring_timer;
-#endif

deleted file mode 100644
index 648c037..0000000

deleted file mode 100644
index 6739527..0000000

\n\t"
- " nop \n\t"
-#if defined(__KERNEL__) && !defined(STANDALONE)

-		" MRC      p15,#0x0,r0,c1,c0,#0                                  \n\t"
-		" BIC      r0,r0,#0xd                                            \n\t"
-		" MCR      p15,#0x0,r0,c1,c0,#0                                  \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"

-#endif
- " nop \n\t"
- " nop \n\t"
-/* Bypass the ARM clock and switch to XTAL clock */

-		" MOV      r2,#0x80000000                                        \n\t"
-		" LDR      r3,[r2,#8]                                            \n\t"
-		" ORR      r3,r3,#0x20000                                        \n\t"
-		" STR      r3,[r2,#8]                                            \n\t"
-
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-		" nop                                                            \n\t"
-/* Issue reset */
-		" MOV      r3,#0x2                                               \n\t"
-		" STR      r3,[r2,#0x80]                                         \n\t"

-/* End here */
- " MOV pc,pc \n\t");
-/* 0xe1a0f00f == asm ("mov r15, r15"); */
-}

deleted file mode 100644
index fb1104f..0000000

deleted file mode 100644
index 244a61a..0000000

[ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in milli-second */
-) {
- ResetTimer(timerId);
-
- /* Set timer mode periodic */
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-
- return SetTimerPeriod(timerId, msec);
-}
- -/****************************************************************************/ -/**
-* @brief Configures a periodic timer to generate timer interrupt just once
-* after certain time interval
-*
-* This function initializes a periodic timer to generate a single ticks after -* certain time interval in millisecond
-*
-* @return On success: Effective interval set in milli-second
-* On failure: 0
-*
-*/ -/****************************************************************************/
-tmrHw_INTERVAL_t tmrHw_setOneshotTimerInterval(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in milli-second */
-) {
- ResetTimer(timerId);
-
- /* Set timer mode oneshot */
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
- pTmrHw[timerId].Control |= tmrHw_CONTROL_ONESHOT;
-
- return SetTimerPeriod(timerId, msec);
-}
- -/****************************************************************************/ -/**
-* @brief Configures a timer to run as a free running timer
-*
-* This function initializes a timer to run as a free running timer -*
-* @return Timer resolution (count / sec)
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_setFreeRunningTimer(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- uint32_t divider /* [ IN ] Dividing the clock frequency */
-) {
- uint32_t scale = 0;
-
- ResetTimer(timerId);
- /* Set timer as free running mode */
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_PERIODIC;
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
-
- if (divider >= 64) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
- scale = 256;
- } else if (divider >= 8) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
- scale = 16;
- } else {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
- scale = 1;
- }
-
- if (timerId == 0 || timerId == 1) {
- return tmrHw_divide(tmrHw_LOW_RESOLUTION_CLOCK, scale);
- } else if (timerId == 2 || timerId == 3) {
- return tmrHw_divide(tmrHw_HIGH_RESOLUTION_CLOCK, scale);
- }
-
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Starts a timer
-*
-* This function starts a preconfigured timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*
-*/ -/****************************************************************************/
-int tmrHw_startTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_TIMER_ENABLE;
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Stops a timer
-*
-* This function stops a running timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*
-*/ -/****************************************************************************/
-int tmrHw_stopTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_TIMER_ENABLE;
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Gets current timer count
-*
-* This function returns the current timer value
-*
-* @return Current downcounting timer value
-*
-*/ -/****************************************************************************/
-uint32_t tmrHw_GetCurrentCount(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- /* return 32 bit timer value */
- switch (pTmrHw[timerId].Control & tmrHw_CONTROL_MODE_MASK) {
- case tmrHw_CONTROL_FREE_RUNNING:
- if (pTmrHw[timerId].CurrentValue) {
- return tmrHw_MAX_COUNT - pTmrHw[timerId].CurrentValue;
- }
- break;
- case tmrHw_CONTROL_PERIODIC:
- case tmrHw_CONTROL_ONESHOT:
- return pTmrHw[timerId].BackgroundLoad -
- pTmrHw[timerId].CurrentValue;
- }
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Gets timer count rate
-*
-* This function returns the number of counts per second
-*
-* @return Count rate
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_getCountRate(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- uint32_t divider = 0;
-
- switch (pTmrHw[timerId].Control & tmrHw_CONTROL_PRESCALE_MASK) {
- case tmrHw_CONTROL_PRESCALE_1:
- divider = 1;
- break;
- case tmrHw_CONTROL_PRESCALE_16:
- divider = 16;
- break;
- case tmrHw_CONTROL_PRESCALE_256:
- divider = 256;
- break;
- default:
- tmrHw_ASSERT(0);
- }
-
- if (timerId == 0 || timerId == 1) {
- return tmrHw_divide(tmrHw_LOW_RESOLUTION_CLOCK, divider);
- } else {
- return tmrHw_divide(tmrHw_HIGH_RESOLUTION_CLOCK, divider);
- }
- return 0;
-}
- -/****************************************************************************/ -/**
-* @brief Enables timer interrupt
-*
-* This function enables the timer interrupt
-*
-* @return N/A
-*
-*/ -/****************************************************************************/
-void tmrHw_enableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control |= tmrHw_CONTROL_INTERRUPT_ENABLE;
-}
- -/****************************************************************************/ -/**
-* @brief Disables timer interrupt
-*
-* This function disable the timer interrupt
-*
-* @return N/A
-*
-*/ -/****************************************************************************/
-void tmrHw_disableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].Control &= ~tmrHw_CONTROL_INTERRUPT_ENABLE;
-}
- -/****************************************************************************/ -/**
-* @brief Clears the interrupt
-*
-* This function clears the timer interrupt
-*
-* @return N/A
-*
-* @note
-* Must be called under the context of ISR
-*/ -/****************************************************************************/
-void tmrHw_clearInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) {
- pTmrHw[timerId].InterruptClear = 0x1;
-}
- -/****************************************************************************/ -/**
-* @brief Gets the interrupt status
-*
-* This function returns timer interrupt status
-*
-* @return Interrupt status
-*/ -/****************************************************************************/
-tmrHw_INTERRUPT_STATUS_e tmrHw_getInterruptStatus(tmrHw_ID_t timerId /*
[ IN ] Timer id */
-) {
- if (pTmrHw[timerId].InterruptStatus) {
- return tmrHw_INTERRUPT_STATUS_SET;
- } else {
- return tmrHw_INTERRUPT_STATUS_UNSET;
- }
-}
- -/****************************************************************************/ -/**
-* @brief Indentifies a timer causing interrupt
-*
-* This functions returns a timer causing interrupt
-*
-* @return 0xFFFFFFFF : No timer causing an interrupt
-* ! 0xFFFFFFFF : timer causing an interrupt
-* @note
-* tmrHw_clearIntrrupt() must be called with a valid timer id after calling this function
-*/ -/****************************************************************************/
-tmrHw_ID_t tmrHw_getInterruptSource(void /* void */
-) {
- int i;
-
- for (i = 0; i < tmrHw_TIMER_NUM_COUNT; i++) {
- if (pTmrHw[i].InterruptStatus) {
- return i;
- }
- }
-
- return 0xFFFFFFFF;
-}
- -/****************************************************************************/ -/**
-* @brief Displays specific timer registers
-*
-*
-* @return void
-*
-*/ -/****************************************************************************/
-void tmrHw_printDebugInfo(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- int (*fpPrint) (const char *, ...) /* [ IN ] Print callback function */
-) {
- (*fpPrint) ("Displaying register contents \n\n");
- (*fpPrint) ("Timer %d: Load value 0x%X\n", timerId,
- pTmrHw[timerId].LoadValue);
- (*fpPrint) ("Timer %d: Background load value 0x%X\n", timerId,
- pTmrHw[timerId].BackgroundLoad);
- (*fpPrint) ("Timer %d: Control 0x%X\n", timerId,
- pTmrHw[timerId].Control);
- (*fpPrint) ("Timer %d: Interrupt clear 0x%X\n", timerId,
- pTmrHw[timerId].InterruptClear);
- (*fpPrint) ("Timer %d: Interrupt raw interrupt 0x%X\n", timerId,
- pTmrHw[timerId].RawInterruptStatus);
- (*fpPrint) ("Timer %d: Interrupt status 0x%X\n", timerId,
- pTmrHw[timerId].InterruptStatus);
-}
- -/****************************************************************************/ -/**
-* @brief Use a timer to perform a busy wait delay for a number of usecs.
-*
-* @return N/A
-*/ -/****************************************************************************/
-void tmrHw_udelay(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- unsigned long usecs /* [ IN ] usec to delay */
-) {
- tmrHw_RATE_t usec_tick_rate;
- tmrHw_COUNT_t start_time;
- tmrHw_COUNT_t delta_time;
-
- start_time = tmrHw_GetCurrentCount(timerId);
- usec_tick_rate = tmrHw_divide(tmrHw_getCountRate(timerId), 1000000);
- delta_time = usecs * usec_tick_rate;
-
- /* Busy wait */
- while (delta_time > (tmrHw_GetCurrentCount(timerId) - start_time))
- ;
-}
- -/****************************************************************************/ -/**
-* @brief Local Divide function
-*
-* This function does the divide
-*
-* @return divide value
-*
-*/ -/****************************************************************************/ -static int tmrHw_divide(int num, int denom)
-{
- int r;
- int t = 1;
-
- /* Shift denom and t up to the largest value to optimize algorithm */
- /* t contains the units of each divide */
- while ((denom & 0x40000000) == 0) { /* fails if denom=0 */
- denom = denom << 1;
- t = t << 1;
- }
-
- /* Initialize the result */
- r = 0;
-
- do {
- /* Determine if there exists a positive remainder */
- if ((num - denom) >= 0) {
- /* Accumlate t to the result and calculate a new remainder */
- num = num - denom;
- r = r + t;
- }
- /* Continue to shift denom and shift t down to 0 */
- denom = denom >> 1;
- t = t >> 1;
- } while (t != 0);
- return r;
-}

deleted file mode 100644
index f01da87..0000000

deleted file mode 100644
index b5beb0b..0000000

deleted file mode 100644
index caa20e5..0000000

deleted file mode 100644
index 8b3d803..0000000

deleted file mode 100644
index 51357dd..0000000

deleted file mode 100644
index 1c639c8..0000000

deleted file mode 100644
index c30d2a5..0000000

deleted file mode 100644
index 3a8718b..0000000

deleted file mode 100644
index ad9e400..0000000

[ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in mili-second */
-);
- -/****************************************************************************/ -/**
-* @brief Configures a periodic timer to generate timer interrupt just once
-* after certain time interval
-*
-* This function initializes a periodic timer to generate a single ticks after -* certain time interval in millisecond
-*
-* @return On success: Effective interval set in mili-second
-* On failure: 0
-*
-*/ -/****************************************************************************/
-tmrHw_INTERVAL_t tmrHw_setOneshotTimerInterval(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- tmrHw_INTERVAL_t msec /* [ IN ] Interval in mili-second */
-);
- -/****************************************************************************/ -/**
-* @brief Configures a timer to run as a free running timer
-*
-* This function initializes a timer to run as a free running timer -*
-* @return Timer resolution (count / sec)
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_setFreeRunningTimer(tmrHw_ID_t timerId, /* [ IN ] Timer Id */
- uint32_t divider /* [ IN ] Dividing the clock frequency */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Starts a timer
-*
-* This function starts a preconfigured timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*/ -/****************************************************************************/
-int tmrHw_startTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Stops a timer
-*
-* This function stops a running timer
-*
-* @return -1 - On Failure
-* 0 - On Success
-*/ -/****************************************************************************/
-int tmrHw_stopTimer(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Gets current timer count
-*
-* This function returns the current timer value
-*
-* @return Current downcounting timer value
-*
-*/ -/****************************************************************************/
-tmrHw_COUNT_t tmrHw_GetCurrentCount(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Gets timer count rate
-*
-* This function returns the number of counts per second
-*
-* @return Count rate
-*
-*/ -/****************************************************************************/
-tmrHw_RATE_t tmrHw_getCountRate(tmrHw_ID_t timerId /* [ IN ] Timer id */
-) __attribute__ ((section(".aramtext")));
- -/****************************************************************************/ -/**
-* @brief Enables timer interrupt
-*
-* This function enables the timer interrupt
-*
-* @return N/A
-*
-*/ -/****************************************************************************/
-void tmrHw_enableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Disables timer interrupt
-*
-* This function disable the timer interrupt
-*
-* @return N/A
-*/ -/****************************************************************************/
-void tmrHw_disableInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Clears the interrupt
-*
-* This function clears the timer interrupt
-*
-* @return N/A
-*
-* @note
-* Must be called under the context of ISR
-*/ -/****************************************************************************/
-void tmrHw_clearInterrupt(tmrHw_ID_t timerId /* [ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Gets the interrupt status
-*
-* This function returns timer interrupt status
-*
-* @return Interrupt status
-*/ -/****************************************************************************/
-tmrHw_INTERRUPT_STATUS_e tmrHw_getInterruptStatus(tmrHw_ID_t timerId /*
[ IN ] Timer id */
-);
- -/****************************************************************************/ -/**
-* @brief Indentifies a timer causing interrupt
-*
-* This functions returns a timer causing interrupt
-*
-* @return 0xFFFFFFFF : No timer causing an interrupt
-* ! 0xFFFFFFFF : timer causing an interrupt
-* @note
-* tmrHw_clearIntrrupt() must be called with a valid timer id after calling this function
-*/ -/****************************************************************************/ -tmrHw_ID_t tmrHw_getInterruptSource(void);
- -/****************************************************************************/ -/**
-* @brief Displays specific timer registers
-*
-*
-* @return void
-*
-*/ -/****************************************************************************/
-void tmrHw_printDebugInfo(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- int (*fpPrint) (const char *, ...) /* [ IN ] Print callback function */
-);
- -/****************************************************************************/ -/**
-* @brief Use a timer to perform a busy wait delay for a number of usecs.
-*
-* @return N/A
-*/ -/****************************************************************************/
-void tmrHw_udelay(tmrHw_ID_t timerId, /* [ IN ] Timer id */
- unsigned long usecs /* [ IN ] usec to delay */
-) __attribute__ ((section(".aramtext")));
-
-#endif /* _TMRHW_H */

[ IN ] Configurable clock */
- );
- -/****************************************************************************/ -/**
-* @brief Get Numeric Chip ID
-*
-* This function returns Chip ID that includes the revison number
-*
-* @return Complete numeric Chip ID
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getChipId(void);
- -/****************************************************************************/ -/**
-* @brief Get Chip Product ID
-*
-* This function returns Chip Product ID
-*
-* @return Chip Product ID
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getChipProductId(void);
- -/****************************************************************************/ -/**
-* @brief Get revision number
-*
-* This function returns revision number of the chip
-*
-* @return Revision number
-*/ -/****************************************************************************/ -static inline chipcHw_REV_NUMBER_e chipcHw_getChipRevisionNumber(void); - -/****************************************************************************/ -/**
-* @brief Enables bus interface clock
-*
-* Enables bus interface clock of various device
-*
-* @return void
-*
-* @note use chipcHw_REG_BUS_CLOCK_XXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_busInterfaceClockEnable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_BUS_CLOCK_XXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Disables bus interface clock
-*
-* Disables bus interface clock of various device
-*
-* @return void
-*
-* @note use chipcHw_REG_BUS_CLOCK_XXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_busInterfaceClockDisable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_BUS_CLOCK_XXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Enables various audio channels
-*
-* Enables audio channel
-*
-* @return void
-*
-* @note use chipcHw_REG_AUDIO_CHANNEL_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_audioChannelEnable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_AUDIO_CHANNEL_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Disables various audio channels
-*
-* Disables audio channel
-*
-* @return void
-*
-* @note use chipcHw_REG_AUDIO_CHANNEL_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_audioChannelDisable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_AUDIO_CHANNEL_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Soft resets devices
-*
-* Soft resets various devices
-*
-* @return void
-*
-* @note use chipcHw_REG_SOFT_RESET_XXXXXX defines
-*/ -/****************************************************************************/
-static inline void chipcHw_softReset(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_SOFT_RESET_XXXXXX */
- );
-
-static inline void chipcHw_softResetDisable(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_SOFT_RESET_XXXXXX */
- );
-
-static inline void chipcHw_softResetEnable(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_SOFT_RESET_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Configures misc CHIP functionality
-*
-* Configures CHIP functionality
-*
-* @return void
-*
-* @note use chipcHw_REG_MISC_CTRL_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_miscControl(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_MISC_CTRL_XXXXXX */
- );
-
-static inline void chipcHw_miscControlDisable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_MISC_CTRL_XXXXXX */
- );
-
-static inline void chipcHw_miscControlEnable(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_MISC_CTRL_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Set OTP options
-*
-* Set OTP options
-*
-* @return void
-*
-* @note use chipcHw_REG_OTP_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_setOTPOption(uint64_t mask /* [ IN ] Bit map of type chipcHw_REG_OTP_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Get sticky bits
-*
-* @return Sticky bit options of type chipcHw_REG_STICKY_XXXXXX
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getStickyBits(void);
- -/****************************************************************************/ -/**
-* @brief Set sticky bits
-*
-* @return void
-*
-* @note use chipcHw_REG_STICKY_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_setStickyBits(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_STICKY_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Clear sticky bits
-*
-* @return void
-*
-* @note use chipcHw_REG_STICKY_XXXXXX
-*/ -/****************************************************************************/
-static inline void chipcHw_clearStickyBits(uint32_t mask /* [ IN ] Bit map of type chipcHw_REG_STICKY_XXXXXX */
- );
- -/****************************************************************************/ -/**
-* @brief Get software override strap options
-*
-* Retrieves software override strap options
-*
-* @return Software override strap value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getSoftStraps(void);
- -/****************************************************************************/ -/**
-* @brief Set software override strap options
-*
-* set software override strap options
-*
-* @return nothing
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_setSoftStraps(uint32_t strapOptions);
- -/****************************************************************************/ -/**
-* @brief Get pin strap options
-*
-* Retrieves pin strap options
-*
-* @return Pin strap value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getPinStraps(void);
- -/****************************************************************************/ -/**
-* @brief Get valid pin strap options
-*
-* Retrieves valid pin strap options
-*
-* @return valid Pin strap value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getValidStraps(void);
- -/****************************************************************************/ -/**
-* @brief Initialize valid pin strap options
-*
-* Retrieves valid pin strap options by copying HW strap options to soft register -* (if chipcHw_STRAPS_SOFT_OVERRIDE not set)
-*
-* @return nothing
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_initValidStraps(void);
- -/****************************************************************************/ -/**
-* @brief Get status (enabled/disabled) of bus interface clock
-*
-* This function returns the status of devices' bus interface clock -*
-* @return Bus interface clock
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getBusInterfaceClockStatus(void);
- -/****************************************************************************/ -/**
-* @brief Get boot device
-*
-* This function returns the device type used in booting the system -*
-* @return Boot device of type chipcHw_BOOT_DEVICE_e
-*
-*/ -/****************************************************************************/ -static inline chipcHw_BOOT_DEVICE_e chipcHw_getBootDevice(void);
- -/****************************************************************************/ -/**
-* @brief Get boot mode
-*
-* This function returns the way the system was booted
-*
-* @return Boot mode of type chipcHw_BOOT_MODE_e
-*
-*/ -/****************************************************************************/ -static inline chipcHw_BOOT_MODE_e chipcHw_getBootMode(void);
- -/****************************************************************************/ -/**
-* @brief Get NAND flash page size
-*
-* This function returns the NAND device page size
-*
-* @return Boot NAND device page size
-*
-*/ -/****************************************************************************/ -static inline chipcHw_NAND_PAGESIZE_e chipcHw_getNandPageSize(void); - -/****************************************************************************/ -/**
-* @brief Get NAND flash address cycle configuration
-*
-* This function returns the NAND flash address cycle configuration -*
-* @return 0 = Do not extra address cycle, 1 = Add extra cycle
-*
-*/ -/****************************************************************************/ -static inline int chipcHw_getNandExtraCycle(void);
- -/****************************************************************************/ -/**
-* @brief Activates PIF interface
-*
-* This function activates PIF interface by taking control of LCD pins -*
-* @note
-* When activated, LCD pins will be defined as follows for PIF operation
-*

-*       CLD[17:0]  = pif_data[17:0]
-*       CLD[23:18] = pif_address[5:0]
-*       CLPOWER    = pif_wr_str
-*       CLCP       = pif_rd_str
-*       CLAC       = pif_hat1
-*       CLFP       = pif_hrdy1
-*       CLLP       = pif_hat2
-*       GPIO[42]   = pif_hrdy2

-*
-* In PIF mode, "pif_hrdy2" overrides other shared function for GPIO[42] pin
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_activatePifInterface(void);
- -/****************************************************************************/ -/**
-* @brief Activates LCD interface
-*
-* This function activates LCD interface
-*
-* @note
-* When activated, LCD pins will be defined as follows
-*

-*       CLD[17:0]  = LCD data
-*       CLD[23:18] = LCD data
-*       CLPOWER    = LCD power
-*       CLCP       =
-*       CLAC       = LCD ack
-*       CLFP       =
-*       CLLP       =

-*/ -/****************************************************************************/ -static inline void chipcHw_activateLcdInterface(void);
- -/****************************************************************************/ -/**
-* @brief Deactivates PIF/LCD interface
-*
-* This function deactivates PIF/LCD interface
-*
-* @note
-* When deactivated LCD pins will be in rti-stated
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_deactivatePifLcdInterface(void);
- -/****************************************************************************/ -/**
-* @brief Get to know the configuration of GPIO pin
-*
-*/ -/****************************************************************************/
-static inline chipcHw_GPIO_FUNCTION_e chipcHw_getGpioPinFunction(int pin /* GPIO Pin number */
- );
- -/****************************************************************************/ -/**
-* @brief Configure GPIO pin function
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setGpioPinFunction(int pin, /* GPIO Pin number */
- chipcHw_GPIO_FUNCTION_e func /* Configuration function */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin slew rate
-*
-* This function sets the slew of individual pin
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinSlewRate(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_SLEW_RATE_e slewRate /* Pin slew rate */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin output drive current
-*
-* This function sets output drive current of individual pin
-*
-* Note: Avoid the use of the word 'current' since linux headers define this
-* to be the current task.
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinOutputCurrent(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_CURRENT_STRENGTH_e curr /* Pin current rating */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin pullup register
-*
-* This function sets pullup register of individual pin
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinPullup(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_PULL_e pullup /* Pullup register settings */
- );
- -/****************************************************************************/ -/**
-* @brief Set Pin input type
-*
-* This function sets input type of individual Pin
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setPinInputType(uint32_t pin, /* Pin of type chipcHw_PIN_XXXXX */
- chipcHw_PIN_INPUTTYPE_e inputType /* Pin input type */
- );
- -/****************************************************************************/ -/**
-* @brief Retrieves a string representation of the mux setting for a pin.
-*
-* @return Pointer to a character string.
-*/ -/****************************************************************************/ -
-const char *chipcHw_getGpioPinFunctionStr(int pin);
- -/****************************************************************************/ -/** @brief issue warmReset
- */ -/****************************************************************************/ -void chipcHw_reset(uint32_t mask);
- -/****************************************************************************/ -/** @brief clock reconfigure
- */ -/****************************************************************************/ -void chipcHw_clockReconfig(uint32_t busHz, uint32_t armRatio, uint32_t vpmRatio,
- uint32_t ddrRatio);
- -/****************************************************************************/ -/**
-* @brief Enable Spread Spectrum
-*
-* @note chipcHw_Init() must be called earlier
-*/ -/****************************************************************************/ -static inline void chipcHw_enableSpreadSpectrum(void);
- -/****************************************************************************/ -/**
-* @brief Disable Spread Spectrum
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_disableSpreadSpectrum(void);
- -/****************************************************************************/ -/** @brief Checks if software strap is enabled
- *
- * @return 1 : When enable
- * 0 : When disable
- */ -/****************************************************************************/ -static inline int chipcHw_isSoftwareStrapsEnable(void);
- -/****************************************************************************/ -/** @brief Enable software strap
- */ -/****************************************************************************/ -static inline void chipcHw_softwareStrapsEnable(void);
- -/****************************************************************************/ -/** @brief Disable software strap
- */ -/****************************************************************************/ -static inline void chipcHw_softwareStrapsDisable(void);
- -/****************************************************************************/ -/** @brief PLL test enable
- */ -/****************************************************************************/ -static inline void chipcHw_pllTestEnable(void);
- -/****************************************************************************/ -/** @brief PLL2 test enable
- */ -/****************************************************************************/ -static inline void chipcHw_pll2TestEnable(void);
- -/****************************************************************************/ -/** @brief PLL test disable
- */ -/****************************************************************************/ -static inline void chipcHw_pllTestDisable(void);
- -/****************************************************************************/ -/** @brief PLL2 test disable
- */ -/****************************************************************************/ -static inline void chipcHw_pll2TestDisable(void);
- -/****************************************************************************/ -/** @brief Get PLL test status
- */ -/****************************************************************************/ -static inline int chipcHw_isPllTestEnable(void);
- -/****************************************************************************/ -/** @brief Get PLL2 test status
- */ -/****************************************************************************/ -static inline int chipcHw_isPll2TestEnable(void);
- -/****************************************************************************/ -/** @brief PLL test select
- */ -/****************************************************************************/ -static inline void chipcHw_pllTestSelect(uint32_t val);
- -/****************************************************************************/ -/** @brief PLL2 test select
- */ -/****************************************************************************/ -static inline void chipcHw_pll2TestSelect(uint32_t val);
- -/****************************************************************************/ -/** @brief Get PLL test selected option
- */ -/****************************************************************************/ -static inline uint8_t chipcHw_getPllTestSelected(void);
- -/****************************************************************************/ -/** @brief Get PLL2 test selected option
- */ -/****************************************************************************/ -static inline uint8_t chipcHw_getPll2TestSelected(void);
- -/****************************************************************************/ -/**
-* @brief Enables DDR SW phase alignment interrupt
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrPhaseAlignInterruptEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disables DDR SW phase alignment interrupt
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrPhaseAlignInterruptDisable(void);
- -/****************************************************************************/ -/**
-* @brief Set VPM SW phase alignment interrupt mode
-*
-* This function sets VPM phase alignment interrupt
-*
-*/ -/****************************************************************************/ -static inline void -chipcHw_vpmPhaseAlignInterruptMode(chipcHw_VPM_HW_PHASE_INTR_e mode); - -/****************************************************************************/ -/**
-* @brief Enable DDR phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrSwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable DDR phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrSwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Enable DDR phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable DDR phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Enable VPM phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmSwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable VPM phase alignment in software
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmSwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Enable VPM phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignEnable(void);
- -/****************************************************************************/ -/**
-* @brief Disable VPM phase alignment in hardware
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignDisable(void);
- -/****************************************************************************/ -/**
-* @brief Set DDR phase alignment margin in hardware
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setDdrHwPhaseAlignMargin(chipcHw_DDR_HW_PHASE_MARGIN_e margin /* Margin alinging DDR phase */
- );
- -/****************************************************************************/ -/**
-* @brief Set VPM phase alignment margin in hardware
-*
-*/ -/****************************************************************************/
-static inline void chipcHw_setVpmHwPhaseAlignMargin(chipcHw_VPM_HW_PHASE_MARGIN_e margin /* Margin alinging VPM phase */
- );
- -/****************************************************************************/ -/**
-* @brief Checks DDR phase aligned status done by HW
-*
-* @return 1: When aligned
-* 0: When not aligned
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_isDdrHwPhaseAligned(void);
- -/****************************************************************************/ -/**
-* @brief Checks VPM phase aligned status done by HW
-*
-* @return 1: When aligned
-* 0: When not aligned
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_isVpmHwPhaseAligned(void);
- -/****************************************************************************/ -/**
-* @brief Get DDR phase aligned status done by HW
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getDdrHwPhaseAlignStatus(void);
- -/****************************************************************************/ -/**
-* @brief Get VPM phase aligned status done by HW
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getVpmHwPhaseAlignStatus(void);
- -/****************************************************************************/ -/**
-* @brief Get DDR phase control value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getDdrPhaseControl(void);
- -/****************************************************************************/ -/**
-* @brief Get VPM phase control value
-*
-*/ -/****************************************************************************/ -static inline uint32_t chipcHw_getVpmPhaseControl(void);
- -/****************************************************************************/ -/**
-* @brief DDR phase alignment timeout count
-*
-* @note If HW fails to perform the phase alignment, it will trigger
-* a DDR phase alignment timeout interrupt.
-*/ -/****************************************************************************/
-static inline void chipcHw_ddrHwPhaseAlignTimeout(uint32_t busCycle /* Timeout in bus cycle */
- );
- -/****************************************************************************/ -/**
-* @brief VPM phase alignment timeout count
-*
-* @note If HW fails to perform the phase alignment, it will trigger
-* a VPM phase alignment timeout interrupt.
-*/ -/****************************************************************************/
-static inline void chipcHw_vpmHwPhaseAlignTimeout(uint32_t busCycle /* Timeout in bus cycle */
- );
- -/****************************************************************************/ -/**
-* @brief DDR phase alignment timeout interrupt enable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignTimeoutInterruptEnable(void); - -/****************************************************************************/ -/**
-* @brief VPM phase alignment timeout interrupt enable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignTimeoutInterruptEnable(void); - -/****************************************************************************/ -/**
-* @brief DDR phase alignment timeout interrupt disable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignTimeoutInterruptDisable(void); - -/****************************************************************************/ -/**
-* @brief VPM phase alignment timeout interrupt disable
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignTimeoutInterruptDisable(void); - -/****************************************************************************/ -/**
-* @brief Clear DDR phase alignment timeout interrupt
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_ddrHwPhaseAlignTimeoutInterruptClear(void); - -/****************************************************************************/ -/**
-* @brief Clear VPM phase alignment timeout interrupt
-*
-*/ -/****************************************************************************/ -static inline void chipcHw_vpmHwPhaseAlignTimeoutInterruptClear(void); -
-/* ---- Private Constants and Types -------------------------------------- */ -
-#endif /* CHIPC_DEF_H */

deleted file mode 100644
index 6ae20a6..0000000

USA
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <asm/sizes.h>
-#include <cfg_global.h>
-#include <mach/csp/mm_io.h>
-
-/* Hardware addresses of major areas.

- *  *_START is the physical address
- *  *_SIZE  is the size of the region
- *  *_BASE  is the virtual address

- */
-#define RAM_START PHYS_OFFSET
-
-#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
-#define RAM_BASE PAGE_OFFSET
-
-/* Macros to make managing spinlocks a bit more controlled in terms of naming. */ -/* See reg_gpio.h, reg_irq.h, arch.c, gpio.c for example usage. */
-#if defined(__KERNEL__)
-#define HW_DECLARE_SPINLOCK(name) DEFINE_SPINLOCK(bcmring_##name##_reg_lock);
-#define HW_EXTERN_SPINLOCK(name) extern spinlock_t bcmring_##name##_reg_lock;
-#define HW_IRQ_SAVE(name, val) spin_lock_irqsave(&bcmring_##name##_reg_lock, (val)) -#define HW_IRQ_RESTORE(name, val) spin_unlock_irqrestore(&bcmring_##name##_reg_lock, (val)) -#else
-#define HW_DECLARE_SPINLOCK(name)
-#define HW_EXTERN_SPINLOCK(name)
-#define HW_IRQ_SAVE(name, val) {(void)(name); (void)(val); }
-#define HW_IRQ_RESTORE(name, val) {(void)(name); (void)(val); }
-#endif
-
-#ifndef HW_IO_PHYS_TO_VIRT
-#define HW_IO_PHYS_TO_VIRT MM_IO_PHYS_TO_VIRT
-#endif
-#define HW_IO_VIRT_TO_PHYS MM_IO_VIRT_TO_PHYS
-
-#endif

deleted file mode 100644
index b279b82..0000000

USA
- */
-
-#if !defined(ARCH_BCMRING_IRQS_H)
-#define ARCH_BCMRING_IRQS_H
-
-/* INTC0 - interrupt controller 0 */

-#define IRQ_INTC0_START     0
-#define IRQ_DMA0C0          0	/* DMA0 channel 0 interrupt */
-#define IRQ_DMA0C1          1	/* DMA0 channel 1 interrupt */
-#define IRQ_DMA0C2          2	/* DMA0 channel 2 interrupt */
-#define IRQ_DMA0C3          3	/* DMA0 channel 3 interrupt */
-#define IRQ_DMA0C4          4	/* DMA0 channel 4 interrupt */
-#define IRQ_DMA0C5          5	/* DMA0 channel 5 interrupt */
-#define IRQ_DMA0C6          6	/* DMA0 channel 6 interrupt */
-#define IRQ_DMA0C7          7	/* DMA0 channel 7 interrupt */
-#define IRQ_DMA1C0          8	/* DMA1 channel 0 interrupt */
-#define IRQ_DMA1C1          9	/* DMA1 channel 1 interrupt */
-#define IRQ_DMA1C2         10	/* DMA1 channel 2 interrupt */
-#define IRQ_DMA1C3         11	/* DMA1 channel 3 interrupt */
-#define IRQ_DMA1C4         12	/* DMA1 channel 4 interrupt */
-#define IRQ_DMA1C5         13	/* DMA1 channel 5 interrupt */
-#define IRQ_DMA1C6         14	/* DMA1 channel 6 interrupt */
-#define IRQ_DMA1C7         15	/* DMA1 channel 7 interrupt */
-#define IRQ_VPM            16	/* Voice process module interrupt */
-#define IRQ_USBHD2         17	/* USB host2/device2 interrupt */
-#define IRQ_USBH1          18	/* USB1 host interrupt */
-#define IRQ_USBD           19	/* USB device interrupt */
-#define IRQ_SDIOH0         20	/* SDIO0 host interrupt */
-#define IRQ_SDIOH1         21	/* SDIO1 host interrupt */
-#define IRQ_TIMER0         22	/* Timer0 interrupt */
-#define IRQ_TIMER1         23	/* Timer1 interrupt */
-#define IRQ_TIMER2         24	/* Timer2 interrupt */
-#define IRQ_TIMER3         25	/* Timer3 interrupt */
-#define IRQ_SPIH           26	/* SPI host interrupt */
-#define IRQ_ESW            27	/* Ethernet switch interrupt */
-#define IRQ_APM            28	/* Audio process module interrupt */
-#define IRQ_GE             29	/* Graphic engine interrupt */
-#define IRQ_CLCD           30	/* LCD Controller interrupt */
-#define IRQ_PIF            31	/* Peripheral interface interrupt */
-#define IRQ_INTC0_END      31
-
-/* INTC1 - interrupt controller 1 */
-#define IRQ_INTC1_START    32
-#define IRQ_GPIO0          32	/*  0 GPIO bit 31//0 combined interrupt */
-#define IRQ_GPIO1          33	/*  1 GPIO bit 64//32 combined interrupt */
-#define IRQ_I2S0           34	/*  2 I2S0 interrupt */
-#define IRQ_I2S1           35	/*  3 I2S1 interrupt */
-#define IRQ_I2CH           36	/*  4 I2C host interrupt */
-#define IRQ_I2CS           37	/*  5 I2C slave interrupt */
-#define IRQ_SPIS           38	/*  6 SPI slave interrupt */
-#define IRQ_GPHY           39	/*  7 Gigabit Phy interrupt */
-#define IRQ_FLASHC         40	/*  8 Flash controller interrupt */
-#define IRQ_COMMTX         41	/*  9 ARM DDC transmit interrupt */
-#define IRQ_COMMRX         42	/* 10 ARM DDC receive interrupt */
-#define IRQ_PMUIRQ         43	/* 11 ARM performance monitor interrupt */
-#define IRQ_UARTB          44	/* 12 UARTB */
-#define IRQ_WATCHDOG       45	/* 13 Watchdog timer interrupt */
-#define IRQ_UARTA          46	/* 14 UARTA */
-#define IRQ_TSC            47	/* 15 Touch screen controller interrupt */
-#define IRQ_KEYC           48	/* 16 Key pad controller interrupt */
-#define IRQ_DMPU           49	/* 17 DDR2 memory partition interrupt */
-#define IRQ_VMPU           50	/* 18 VRAM memory partition interrupt */
-#define IRQ_FMPU           51	/* 19 Flash memory parition unit interrupt */
-#define IRQ_RNG            52	/* 20 Random number generator interrupt */
-#define IRQ_RTC0           53	/* 21 Real time clock periodic interrupt */
-#define IRQ_RTC1           54	/* 22 Real time clock one-shot interrupt */
-#define IRQ_SPUM           55	/* 23 Secure process module interrupt */
-#define IRQ_VDEC           56	/* 24 Hantro video decoder interrupt */
-#define IRQ_RTC2           57	/* 25 Real time clock tamper interrupt */
-#define IRQ_DDRP           58	/* 26 DDR Panic interrupt */
-#define IRQ_INTC1_END      58
-
-/* SINTC secure int controller */
-#define IRQ_SINTC_START    59
-#define IRQ_SEC_WATCHDOG   59	/*  0 Watchdog timer interrupt */
-#define IRQ_SEC_UARTA      60	/*  1 UARTA interrupt */
-#define IRQ_SEC_TSC        61	/*  2 Touch screen controller interrupt */
-#define IRQ_SEC_KEYC       62	/*  3 Key pad controller interrupt */
-#define IRQ_SEC_DMPU       63	/*  4 DDR2 memory partition interrupt */
-#define IRQ_SEC_VMPU       64	/*  5 VRAM memory partition interrupt */
-#define IRQ_SEC_FMPU       65	/*  6 Flash memory parition unit interrupt */
-#define IRQ_SEC_RNG        66	/*  7 Random number generator interrupt */
-#define IRQ_SEC_RTC0       67	/*  8 Real time clock periodic interrupt */
-#define IRQ_SEC_RTC1       68	/*  9 Real time clock one-shot interrupt */
-#define IRQ_SEC_SPUM       69	/* 10 Secure process module interrupt */
-#define IRQ_SEC_TIMER0     70	/* 11 Secure timer0 interrupt */
-#define IRQ_SEC_TIMER1     71	/* 12 Secure timer1 interrupt */
-#define IRQ_SEC_TIMER2     72	/* 13 Secure timer2 interrupt */
-#define IRQ_SEC_TIMER3     73	/* 14 Secure timer3 interrupt */
-#define IRQ_SEC_RTC2       74	/* 15 Real time clock tamper interrupt */

-
-#define IRQ_SINTC_END 74
-
-/* Note: there are 3 INTC registers of 32 bits each. So internal IRQs could go from 0-95 */
-/* Since IRQs are typically viewed in decimal, we start the gpio based IRQs off at 100 */
-/* to make the mapping easy for humans to decipher. */
-
-#define IRQ_GPIO_0 100
-
-#define NUM_INTERNAL_IRQS (IRQ_SINTC_END+1)
-
-/* I couldn't get the gpioHw_reg.h file to be included cleanly, so I hardcoded it */
-/* define NUM_GPIO_IRQS GPIOHW_TOTAL_NUM_PINS */
-#define NUM_GPIO_IRQS 62
-
-#define NR_IRQS (IRQ_GPIO_0 + NUM_GPIO_IRQS)
-
-#define IRQ_UNKNOWN -1
-
-/* Tune these bits to preclude noisy or unsupported interrupt sources as required. */

-#define IRQ_INTC0_VALID_MASK        0xffffffff
-#define IRQ_INTC1_VALID_MASK        0x07ffffff
-#define IRQ_SINTC_VALID_MASK        0x0000ffff

-
-#endif /* ARCH_BCMRING_IRQS_H */

deleted file mode 100644
index ce5cd16..0000000

                            (DNA)      */
-#define HW_CFG_NOR_TWP       (6 << 11)	/* Write pulse width cycle (n+1) 
                           (35ns)     */
-#define HW_CFG_NOR_TWR       (0 << 9)	/* Write recovery cycle (n+1) 
                           (0ns)      */
-#define HW_CFG_NOR_TAS       (0 << 7)	/* Write address setup cycle (n+1)                          (0ns)      */
-#define HW_CFG_NOR_TOE       (0 << 5)	/* Output enable delay cycle (n) 
                           (max 25ns) */
-#define HW_CFG_NOR_TRC_TLC   (0x10 << 0)	/* Read access cycle / Burst read latency (n+2 / n+1)       (100ns)    */
-
-#define HW_CFG_FLASH0_TCR (HW_CFG_NOR_TPRC_TWLC \
-	| HW_CFG_NOR_TBTA      \
-	| HW_CFG_NOR_TWP       \
-	| HW_CFG_NOR_TWR       \
-	| HW_CFG_NOR_TAS       \
-	| HW_CFG_NOR_TOE       \
-	| HW_CFG_NOR_TRC_TLC)

-
-#define HW_CFG_FLASH1_TCR HW_CFG_FLASH0_TCR
-#define HW_CFG_FLASH2_TCR HW_CFG_FLASH0_TCR
-
-/* SDRAM Settings */

-/* #define HW_CFG_SDRAM_CAS_LATENCY        5    Default 5, Values [3..6] */
-/* #define HW_CFG_SDRAM_CHIP_SELECT_CNT    1    Default 1, Vaules [1..2] */
-/* #define HW_CFG_SDRAM_SPEED_GRADE        667  Default 667, Values [400,533,667,800] */
-/* #define HW_CFG_SDRAM_WIDTH_BITS         16   Default 16, Vaules [8,16] */

-#define HW_CFG_SDRAM_SIZE_BYTES 0x10000000 /* Total memory, not per device size */
-
-/* ---- Variable Externs ------------------------------------- */ -/* ---- Function Prototypes ---------------------------------- */ -
-#endif /* MEMORY_SETTINGS_H */

deleted file mode 100644
index 40d033e..0000000

USA
- */
-
-/*
- * Specifies the number of ticks per second
- */
-#define CLOCK_TICK_RATE 100000 /* REG_SMT_TICKS_PER_SEC */

deleted file mode 100644
index 437fa68..0000000

USA
- */
-#include <linux/init.h>
-#include <linux/stddef.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-
-#include <asm/mach/irq.h>
-#include <mach/csp/intcHw_reg.h>
-#include <mach/csp/mm_io.h>
-
-static void bcmring_mask_irq0(struct irq_data *d)
-{
- writel(1 << (d->irq - IRQ_INTC0_START),
- MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR);
-}
-
-static void bcmring_unmask_irq0(struct irq_data *d) -{
- writel(1 << (d->irq - IRQ_INTC0_START),
- MM_IO_BASE_INTC0 + INTCHW_INTENABLE);
-}
-
-static void bcmring_mask_irq1(struct irq_data *d)
-{
- writel(1 << (d->irq - IRQ_INTC1_START),
- MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
-}
-
-static void bcmring_unmask_irq1(struct irq_data *d) -{
- writel(1 << (d->irq - IRQ_INTC1_START),
- MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
-}
-
-static void bcmring_mask_irq2(struct irq_data *d)
-{
- writel(1 << (d->irq - IRQ_SINTC_START),
- MM_IO_BASE_SINTC + INTCHW_INTENCLEAR);
-}
-
-static void bcmring_unmask_irq2(struct irq_data *d) -{
- writel(1 << (d->irq - IRQ_SINTC_START),
- MM_IO_BASE_SINTC + INTCHW_INTENABLE);
-}
-
-static struct irq_chip bcmring_irq0_chip = {
- .name = "ARM-INTC0",
- .irq_ack = bcmring_mask_irq0,
- .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */
- .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */
-};
-
-static struct irq_chip bcmring_irq1_chip = {
- .name = "ARM-INTC1",
- .irq_ack = bcmring_mask_irq1,
- .irq_mask = bcmring_mask_irq1,
- .irq_unmask = bcmring_unmask_irq1,
-};
-
-static struct irq_chip bcmring_irq2_chip = {
- .name = "ARM-SINTC",
- .irq_ack = bcmring_mask_irq2,
- .irq_mask = bcmring_mask_irq2,
- .irq_unmask = bcmring_unmask_irq2,
-};
-
-static void vic_init(void __iomem *base, struct irq_chip *chip,
- unsigned int irq_start, unsigned int vic_sources)
-{
- unsigned int i;
- for (i = 0; i < 32; i++) {
- unsigned int irq = irq_start + i;
- irq_set_chip(irq, chip);
- irq_set_chip_data(irq, base);
-
- if (vic_sources & (1 << i)) {
- irq_set_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
- }
- }
- writel(0, base + INTCHW_INTSELECT);
- writel(0, base + INTCHW_INTENABLE);
- writel(~0, base + INTCHW_INTENCLEAR);
- writel(0, base + INTCHW_IRQSTATUS);
- writel(~0, base + INTCHW_SOFTINTCLEAR);
-}
-
-void __init bcmring_init_irq(void)
-{
- vic_init((void __iomem *)MM_IO_BASE_INTC0, &bcmring_irq0_chip,
- IRQ_INTC0_START, IRQ_INTC0_VALID_MASK);
- vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
- IRQ_INTC1_START, IRQ_INTC1_VALID_MASK);
- vic_init((void __iomem *)MM_IO_BASE_SINTC, &bcmring_irq2_chip,
- IRQ_SINTC_START, IRQ_SINTC_VALID_MASK);
-
- /* special cases */
- if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
- irq_set_handler(IRQ_GPIO0, handle_simple_irq);
- }
- if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
- irq_set_handler(IRQ_GPIO1, handle_simple_irq);
- }
-}

1.7.1

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Hi,

It looks like your patch has been line wrapped so it can't be applied.

Did you use git send-email to send it, or some other way? Check Documentation/email-clients.txt for some guidance on how to configure other mail readers, but by far easiest is to use send-email.

-Olof