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gpio: mvebu: new gpio driver for mvebu platforms

PATCH Superseded Thomas Petazzoni 7 participants 17 messages Sep 13, 2012 – Sep 16, 2012

Subsystems (5)
Device tree bindings Arm (32-bit) Arm sub-architectures GPIO +1 more subsystems
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Thomas Petazzoni

author
#0 lore raw

PATCH v4 1/1 gpio: mvebu: new gpio driver for mvebu platforms

Grant,

This patch set adds a new GPIO driver for Marvell EBU SoCs, which aims at replacing the existing GPIO driver from plat-orion/gpio.c. The driver comes with the necessary DT changes to make it work on Armada 370 and Armada XP, and it has been tested successfully by Sebastian Hesselbarth on Dove.

It should also work flawlessly on other Marvell EBU SoCs (Kirkwood, Orion, Discovery), but this remains to be tested by the relevant maintainers. This isn't however a problem, as those older platforms need to explictly be converted over to the new pinctrl-mvebu driver and the new gpio driver. Until that, they will happily continue to use the old, known-working, gpio driver. So this patch set has no chance to break any of the existing Marvell platforms. The old gpio driver is scheduled to be removed once all Marvell SoCs have switched to the new driver.

This new driver reuses a lot of code from the existing plat-orion/gpio.c driver, but has a number of advantages:

*) Support for Armada 370 and Armada XP
*) It is integrated with the mvebu pinctrl driver so that GPIO pins
are properly muxed, and the GPIO driver knows which GPIO pins are output-only or input-only.
*) Properly placed in drivers/gpio
*) More extensible mechanism to support platform differences. The
plat-orion driver uses a simple mask-offset DT property, which works fine for Discovery MV78200 but not for Armada XP. The new driver uses different compatible strings to identify the different variants of the GPIO controllers.

This patch set should be applied on top of the pinctrl-mvebu patch set v4 from Sebastian Hesselbarth, as it depends on it.

Changes since v2:
* Use inline functions for the register accessors, and rename them lower-case since they are functions, as suggested by Jean-Christophe Plagnol-Villard.
* Use _relaxed() variants of readl/writel, as suggested by Jean-Christophe Plagnol-Villard.
* Use switch() instead of long list of if() conditions in mvebu_gpio_irq_set_type(), as suggested by Jean-Christophe Plagnol-Villard.
* Add DT aliases gpio0, gpio1, gpio2, and then use of_alias_get_id() to get the number of GPIO bank, and deduce the GPIO base from it. We don't use automatic allocation because we really want the internal SoC GPIOs to have 0-31, 32-63, 64-... numbers (while automatic allocation allocates 224... for the first bank 202... for the second bank, etc.). This strategy was recommended by Uwe Kleine-Koenig and is already used in gpio-mxs.c.
* Use gpio-cells = <2> instead of gpio-cells = <1>, as suggested by Olof Johansson. This allows to re-use the default .xlate() function, and therefore make the GPIO DT binding actually work (it was broken in previous versions of this patch set).
* Use dev_name() to fill the gpio_chip->name field, instead of manually computing a name. This allows to get rid of the global variable counting GPIO chips.
* Rebase on top of the latest pinctrl work from Sebastian Hesselbarth.
* Added the Acked-by from Linus Walleij on the DT binding documentation patch.

Changes since v1:
* Added fixes for Dove from Sebastian Hesselbarth, and his Tested-by on the driver patch.

Thanks,

Thomas

author
#1 lore raw

PATCH v3 1/5 gpio: introduce gpio-mvebu driver for Marvell SoCs

This driver aims at replacing the arch/arm/plat-orion/gpio.c driver, and is designed to be compatible with all Marvell EBU SoCs: Orion, Kirkwood, Dove, Armada 370/XP and Discovery.

It has been successfully tested on Dove and Armada XP at the moment.

Compared to the plat-orion driver, this new driver has the following added benefits:

*) Support for Armada 370 and Armada XP
*) It is integrated with the mvebu pinctrl driver so that GPIO pins
are properly muxed, and the GPIO driver knows which GPIO pins are output-only or input-only.
*) Properly placed in drivers/gpio
*) More extensible mechanism to support platform differences. The
plat-orion driver uses a simple mask-offset DT property, which works fine for Discovery MV78200 but not for Armada XP. The new driver uses different compatible strings to identify the different variants of the GPIO controllers.

Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>
Tested-by Sebastian Hesselbarth <[email protected]>
---
 drivers/gpio/Kconfig      |    6 +
 drivers/gpio/Makefile     |    1 +
 drivers/gpio/gpio-mvebu.c |  679 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 686 insertions(+)
 create mode 100644 drivers/gpio/gpio-mvebu.c
drivers/gpio/Kconfig +6 -0
index b16c8a7..993b0c4 100644
@@ -150,6 +150,12 @@ config GPIO_MSM_V2
 	  Qualcomm MSM chips.  Most of the pins on the MSM can be
 	  selected for GPIO, and are controlled by this driver.
 
+config GPIO_MVEBU
+	def_bool y
+	depends on ARCH_MVEBU
+	select GPIO_GENERIC
+	select GENERIC_IRQ_CHIP
+
 config GPIO_MXC
 	def_bool y
 	depends on ARCH_MXC
drivers/gpio/Makefile +1 -0
index 153cace..1a33e67 100644
@@ -41,6 +41,7 @@ obj-$(CONFIG_GPIO_MPC8XXX)	+= gpio-mpc8xxx.o
 obj-$(CONFIG_GPIO_MSIC)		+= gpio-msic.o
 obj-$(CONFIG_GPIO_MSM_V1)	+= gpio-msm-v1.o
 obj-$(CONFIG_GPIO_MSM_V2)	+= gpio-msm-v2.o
+obj-$(CONFIG_GPIO_MVEBU)        += gpio-mvebu.o
 obj-$(CONFIG_GPIO_MXC)		+= gpio-mxc.o
 obj-$(CONFIG_GPIO_MXS)		+= gpio-mxs.o
 obj-$(CONFIG_ARCH_OMAP)		+= gpio-omap.o
drivers/gpio/gpio-mvebu.c new file +679 -0

679 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#2 lore raw

PATCH v3 1/5 gpio: introduce gpio-mvebu driver for Marvell SoCs

Quoted 20 lines · Thomas Petazzoni

This driver aims at replacing the arch/arm/plat-orion/gpio.c driver, and is designed to be compatible with all Marvell EBU SoCs: Orion, Kirkwood, Dove, Armada 370/XP and Discovery.

It has been successfully tested on Dove and Armada XP at the moment.

Compared to the plat-orion driver, this new driver has the following added benefits:

*) Support for Armada 370 and Armada XP
*) It is integrated with the mvebu pinctrl driver so that GPIO pins
are properly muxed, and the GPIO driver knows which GPIO pins are output-only or input-only.
*) Properly placed in drivers/gpio
*) More extensible mechanism to support platform differences. The
plat-orion driver uses a simple mask-offset DT property, which works fine for Discovery MV78200 but not for Armada XP. The new driver uses different compatible strings to identify the different variants of the GPIO controllers.

Quoted 7 lines
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>
Tested-by Sebastian Hesselbarth <[email protected]>

This looks very good to me, I'm probably unable to see any further mistakes at this point:

Reviewed-by Linus Walleij <[email protected]>

Yours,
Linus Walleij

author
#3 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

In reply to Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>
---
 .../devicetree/bindings/gpio/gpio-mvebu.txt        |   45 ++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt new file +45 -0
new file mode 100644
index 0000000..595be9e
@@ -0,0 +1,45 @@
+* Marvell EBU GPIO controller
+
+Required properties:
+
+- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio"
+  or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for
+  Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada
+  370. "marvell,mv78200-gpio" should be used for the Discovery
+  MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP
+  SoCs (MV78230, MV78260, MV78460).
+
+- reg: Address and length of the register set for the device. Only one
+  entry is expected, except for the "marvell,armadaxp-gpio" variant
+  for which two entries are expected: one for the general registers,
+  one for the per-cpu registers.
+
+- interrupts: The list of interrupts that are used for all the pins
+  managed by this GPIO bank. There can be more than one interrupt
+  (example: 1 interrupt per 8 pins on Armada XP, which means 4
+  interrupts per bank of 32 GPIOs).
+
+- interrupt-controller: identifies the node as an interrupt controller
+
+- #interrupt-cells: specifies the number of celles needed to encode an
+   interrupt source
+
+- gpio-controller: marks the device node as a gpio controller
+
+- ngpios: number of GPIOs this controller has
+
+- #gpio-cells: Should be two. The first is the pin number. The second
+   is reserved for flags, unused at the moment.
+
+Example:
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
Signature · 1 line
1.7.9.5
#4 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Quoted 7 lines · Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>

---

Grant is pretty much offline right now.

Acked-by Rob Herring <[email protected]>
Quoted 56 lines
 .../devicetree/bindings/gpio/gpio-mvebu.txt        |   45 ++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt new file +45 -0
new file mode 100644
index 0000000..595be9e
@@ -0,0 +1,45 @@
+* Marvell EBU GPIO controller
+
+Required properties:
+
+- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio"
+  or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for
+  Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada
+  370. "marvell,mv78200-gpio" should be used for the Discovery
+  MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP
+  SoCs (MV78230, MV78260, MV78460).
+
+- reg: Address and length of the register set for the device. Only one
+  entry is expected, except for the "marvell,armadaxp-gpio" variant
+  for which two entries are expected: one for the general registers,
+  one for the per-cpu registers.
+
+- interrupts: The list of interrupts that are used for all the pins
+  managed by this GPIO bank. There can be more than one interrupt
+  (example: 1 interrupt per 8 pins on Armada XP, which means 4
+  interrupts per bank of 32 GPIOs).
+
+- interrupt-controller: identifies the node as an interrupt controller
+
+- #interrupt-cells: specifies the number of celles needed to encode an
+   interrupt source
+
+- gpio-controller: marks the device node as a gpio controller
+
+- ngpios: number of GPIOs this controller has
+
+- #gpio-cells: Should be two. The first is the pin number. The second
+   is reserved for flags, unused at the moment.
+
+Example:
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
author
#5 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Dear Rob Herring,

Quoted 10 lines · Rob Herring
Quoted 7 lines · Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>

---

Grant is pretty much offline right now.

Yes, I know, but MAINTAINERS does not mention an alternate maintainer for the GPIO subsystem. Who is the interim maintainer that will ultimately have to ack/nack those patches?

Quoted 1 line
Acked-by Rob Herring <[email protected]>

Thanks!

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#6 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Quoted 12 lines · Thomas Petazzoni

Dear Rob Herring,

Quoted 9 lines · Rob Herring
Quoted 7 lines · Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>

---

Quoted 5 lines
Quoted 1 line

Grant is pretty much offline right now.

Yes, I know, but MAINTAINERS does not mention an alternate maintainer for the GPIO subsystem. Who is the interim maintainer that will ultimately have to ack/nack those patches?

Linus W. is.

Rob

#7 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Quoted 13 lines · Rob Herring
Quoted 12 lines · Thomas Petazzoni

Dear Rob Herring,

Quoted 9 lines · Rob Herring
Quoted 7 lines · Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Grant Likely <[email protected]>
Cc Linus Walleij <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>

---

Quoted 7 lines
Quoted 5 lines
Quoted 1 line

Grant is pretty much offline right now.

Yes, I know, but MAINTAINERS does not mention an alternate maintainer for the GPIO subsystem. Who is the interim maintainer that will ultimately have to ack/nack those patches?

Linus W. is.

I stated Reviewed-by: on the GPIO patch, please merge it through the Marvell tree (I guess that's the plan?)

Acked-by on the rest FWIW, I'm no ARM SoC nor DT maintainer...

Yours,
Linus Walleij

author
#8 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Dear Linus Walleij,

Quoted 8 lines · Linus Walleij
Quoted 5 lines
Quoted 3 lines

Yes, I know, but MAINTAINERS does not mention an alternate maintainer for the GPIO subsystem. Who is the interim maintainer that will ultimately have to ack/nack those patches?

Linus W. is.

I stated Reviewed-by: on the GPIO patch, please merge it through the Marvell tree (I guess that's the plan?)

Yes, I guess it's the easiest plan (Jason ? Andrew ?). We however need Acks on the pinctrl patch series as well, since this one depends on it.

Thanks a lot for your review!

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#9 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Quoted 8 lines · Thomas Petazzoni

Dear Linus Walleij,

Quoted 4 lines · Linus Walleij
Quoted 4 lines
Quoted 3 lines

Yes, I know, but MAINTAINERS does not mention an alternate maintainer for the GPIO subsystem. Who is the interim maintainer that will ultimately have to ack/nack those patches?

Quoted 7 lines
Quoted 4 lines
Quoted 1 line

Linus W. is.

I stated Reviewed-by: on the GPIO patch, please merge it through the Marvell tree (I guess that's the plan?)

Yes, I guess it's the easiest plan (Jason ? Andrew ?). We however need Acks on the pinctrl patch series as well, since this one depends on it.

Yes, that's the plan. I'm currently waiting for my previous series of pull requests to get pulled before I start pulling in anything else.

thx,

Jason.

#10 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

In reply to Thomas Petazzoni

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt line 25

Quoted 4 lines · Thomas Petazzoni
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +2 -0
 
+- #interrupt-cells: specifies the number of celles needed to encode an
+   interrupt source

s/celles/cells/

What value should this property contain for this driver, and what do those cells mean?

This property is missing from the example below.

Quoted 10 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +10 -0
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
maintainer
#11 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

In reply to Thomas Petazzoni
Quoted 17 lines

+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt new file +15 -0
@@ -0,0 +1,45 @@
+* Marvell EBU GPIO controller
+
+Required properties:
+
+- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio"
+  or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for
+  Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada
+  370. "marvell,mv78200-gpio" should be used for the Discovery
+  MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP
+  SoCs (MV78230, MV78260, MV78460).
+
+- reg: Address and length of the register set for the device. Only one
+  entry is expected, except for the "marvell,armadaxp-gpio" variant
+  for which two entries are expected: one for the general registers,
+  one for the per-cpu registers.

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt line 25

Quoted 10 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt new file +10 -0
+
+- interrupts: The list of interrupts that are used for all the pins
+  managed by this GPIO bank. There can be more than one interrupt
+  (example: 1 interrupt per 8 pins on Armada XP, which means 4
+  interrupts per bank of 32 GPIOs).
+
+- interrupt-controller: identifies the node as an interrupt controller
+
+- #interrupt-cells: specifies the number of celles needed to encode an
+   interrupt source

Hi Thomas

Should this be #gpio-cells? The example below does not have #interrupt-cells?

Andrew

Quoted 23 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt new file +20 -0
+
+- gpio-controller: marks the device node as a gpio controller
+
+- ngpios: number of GPIOs this controller has
+
+- #gpio-cells: Should be two. The first is the pin number. The second
+   is reserved for flags, unused at the moment.
+
+Example:
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
Signature · 1 line
1.7.9.5
maintainer
#12 lore raw

PATCH v3 2/5 Documentation: add description of DT binding for the gpio-mvebu driver

Quoted 11 lines · Andrew Lunn

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt line 25

Quoted 8 lines

+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt new file +5 -0
@@ -0,0 +1,45 @@
+* Marvell EBU GPIO controller
...
+- interrupt-controller: identifies the node as an interrupt controller
+
+- #interrupt-cells: specifies the number of celles needed to encode an
+   interrupt source

Hi Thomas

Quoted 2 lines

Should this be #gpio-cells? The example below does not have #interrupt-cells?

It should be both. #gpio-cells to encode pin-offset within the gpio controller and polarity, #interrupt-cells to encode irq number.

Sebastian

author
#13 lore raw

PATCH v3 3/5 arm: mvebu: use GPIO support now that a driver is available

In reply to Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Gregory Clement <[email protected]>
---
 arch/arm/Kconfig                        |    1 +
 arch/arm/mach-mvebu/include/mach/gpio.h |    1 +
 2 files changed, 2 insertions(+)
 create mode 100644 arch/arm/mach-mvebu/include/mach/gpio.h
arch/arm/Kconfig +1 -0
index 2eb3f6b..d00d1a3 100644
@@ -575,6 +575,7 @@ config ARCH_MVEBU
 	select COMMON_CLK
 	select PLAT_ORION
 	select PINCTRL
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	help
 	  Support for the Marvell SoC Family with device tree support
arch/arm/mach-mvebu/include/mach/gpio.h new file +1 -0
new file mode 100644
index 0000000..40a8c17
@@ -0,0 +1 @@
+/* empty */
Signature · 1 line
1.7.9.5
author
#14 lore raw

PATCH v3 4/5 arm: mvebu: add DT information for GPIO banks on Armada 370 and XP

In reply to Thomas Petazzoni

The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing.

Signed-off-by Thomas Petazzoni <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Gregory Clement <[email protected]>
---
 arch/arm/boot/dts/armada-370.dtsi        |   36 +++++++++++++++++++++++++++
 arch/arm/boot/dts/armada-xp-mv78230.dtsi |   27 +++++++++++++++++++++
 arch/arm/boot/dts/armada-xp-mv78260.dtsi |   39 ++++++++++++++++++++++++++++++
 arch/arm/boot/dts/armada-xp-mv78460.dtsi |   39 ++++++++++++++++++++++++++++++
 4 files changed, 141 insertions(+)
arch/arm/boot/dts/armada-370.dtsi +36 -0
index 2bfb904..af34cdb 100644
@@ -21,6 +21,12 @@
 	model = "Marvell Armada 370 family SoC";
 	compatible = "marvell,armada370", "marvell,armada-370-xp";
 
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+	};
+
 	mpic: interrupt-controller at d0020000 {
 	      reg = <0xd0020a00 0x1d0>,
 		    <0xd0021870 0x58>;

@@ -35,6 +41,36 @@
 		pinctrl {
 			compatible = "marvell,mv88f6710-pinctrl";
 			reg = <0xd0018000 0x38>;
+	        };
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,orion-gpio";
+			reg = <0xd0018100 0x40>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <82>, <83>, <84>, <85>;
+		};
+
+		gpio1: gpio at d0018140 {
+			compatible = "marvell,orion-gpio";
+			reg = <0xd0018140 0x40>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <87>, <88>, <89>, <90>;
+		};
+
+		gpio2: gpio at d0018180 {
+			compatible = "marvell,orion-gpio";
+			reg = <0xd0018180 0x40>;
+			ngpios = <2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <91>;
 		};
 	};
 };
arch/arm/boot/dts/armada-xp-mv78230.dtsi +27 -0
index 38ede3d..05a1f27 100644
@@ -19,10 +19,37 @@
 	model = "Marvell Armada XP MV78230 SoC";
 	compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
 
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+	};
+
 	soc {
 		pinctrl {
 			compatible = "marvell,mv78230-pinctrl";
 			reg = <0xd0018000 0x38>;
 		};
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
+
+		gpio1: gpio at d0018140 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018140 0x40>,
+			    <0xd0018840 0x30>;
+			ngpios = <17>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <20>, <21>, <22>;
+		};
 	};
 };
arch/arm/boot/dts/armada-xp-mv78260.dtsi +39 -0
index b2eafcd..fe28ff2 100644
@@ -19,10 +19,49 @@
 	model = "Marvell Armada XP MV78260 SoC";
 	compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
 
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+	};
+
 	soc {
 		pinctrl {
 			compatible = "marvell,mv78260-pinctrl";
 			reg = <0xd0018000 0x38>;
 		};
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
+
+		gpio1: gpio at d0018140 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018140 0x40>,
+			    <0xd0018840 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <20>, <21>, <22>, <23>;
+		};
+
+		gpio2: gpio at d0018180 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018180 0x40>,
+			    <0xd0018870 0x30>;
+			ngpios = <3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <24>;
+		};
 	};
 };
arch/arm/boot/dts/armada-xp-mv78460.dtsi +39 -0
index cf8624d..e55b310 100644
@@ -19,10 +19,49 @@
 	model = "Marvell Armada XP MV78460 SoC";
 	compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
 
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+	};
+
 	soc {
 		pinctrl {
 			compatible = "marvell,mv78460-pinctrl";
 			reg = <0xd0018000 0x38>;
 		};
+
+		gpio0: gpio at d0018100 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018100 0x40>,
+			    <0xd0018800 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <16>, <17>, <18>, <19>;
+		};
+
+		gpio1: gpio at d0018140 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018140 0x40>,
+			    <0xd0018840 0x30>;
+			ngpios = <32>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <20>, <21>, <22>, <23>;
+		};
+
+		gpio2: gpio at d0018180 {
+			compatible = "marvell,armadaxp-gpio";
+			reg = <0xd0018180 0x40>,
+			    <0xd0018870 0x30>;
+			ngpios = <3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			interrupts = <24>;
+		};
 	};
  };
Signature · 1 line
1.7.9.5
#15 lore raw

PATCH v3 4/5 arm: mvebu: add DT information for GPIO banks on Armada 370 and XP

Quoted 4 lines · Thomas Petazzoni

The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing.

#interrupt-cells is missing from all the gpio nodes here too.

author
#16 lore raw

PATCH v3 5/5 arm: mvebu: add gpio support in defconfig

In reply to Thomas Petazzoni
Signed-off-by Thomas Petazzoni <[email protected]>
Cc Jason Cooper <[email protected]>
Cc Andrew Lunn <[email protected]>
Cc Gregory Clement <[email protected]>
---
 arch/arm/configs/mvebu_defconfig |    2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/mvebu_defconfig +2 -0
index 2e86b31..7bcf850 100644
@@ -21,6 +21,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
Signature · 1 line
1.7.9.5