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arm:samsung: Cleanup code for trats and universal boards

PATCH Superseded Piotr Wilczek 3 participants 38 messages Aug 10, 2012 – Sep 28, 2012

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#0 lore raw

cover arm:samsung: Cleanup code for trats and universal boards

This patch fixes SDRAM configuration and size visibility for trats board. Common code is set for trats and universal boards.
Low level initialisation in U-boot is eliminated for universal_c210 board.

Piotr Wilczek (4):
arm:exynos4:trats: Correct SDRAM configuration for trats arm:exynos4:trats: Fix SDRAM size arm:exynos4:trats&universal_c210: Set common code for trats and
universal_c210 boards
arm:exynos4:universal_c210: Eliminate low level initialisation

 board/samsung/exynos4_common/exynos4_common.c |  139 +++++++++
 board/samsung/trats/trats.c                   |   98 +------
 board/samsung/universal_c210/Makefile         |    1 -
 board/samsung/universal_c210/lowlevel_init.S  |  395 -------------------------
 board/samsung/universal_c210/universal.c      |  105 +------
 include/configs/s5pc210_universal.h           |    2 +
 include/configs/trats.h                       |   17 +-
 7 files changed, 163 insertions(+), 594 deletions(-)
 create mode 100644 board/samsung/exynos4_common/exynos4_common.c
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
Signature · 1 line
1.7.5.4
#1 lore raw

PATCH 1/4 arm:exynos4:trats: Correct SDRAM configuration for trats

SDRAM setup alike to ORIGEN Dev board.

---
 include/configs/trats.h |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)
include/configs/trats.h +11 -6
index 185cb68..f391227 100644
@@ -170,12 +170,17 @@
 /* Stack sizes */
 #define CONFIG_STACKSIZE		(256 << 10) /* regular stack 256KB */
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS	2
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE	(512 << 20)		/* 512 MB in CS 0 */
-#define PHYS_SDRAM_2		0x50000000		/* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE	(512 << 20)		/* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS	4
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */
 
Signature · 1 line
1.7.5.4
#2 lore raw

PATCH 2/4 arm:exynos4:trats: Fix SDRAM size

In reply to Piotr Wilczek

Now full 1GiB is visible

---
 board/samsung/trats/trats.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
board/samsung/trats/trats.c +7 -1
index a8b2b11..f5df56c 100644
@@ -76,7 +76,9 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
 
 	return 0;
 }
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 }
 
 static unsigned int get_hw_revision(void)
Signature · 1 line
1.7.5.4
#3 lore raw

PATCH 3/4 arm:exynos4: Set common code for trats and universal_c210 boards

In reply to Piotr Wilczek

Boards trats and universal are very similar resulting in some common code. That common code is moved to exynos4_common/exynos4_common.c

---
 board/samsung/exynos4_common/exynos4_common.c |  139 +++++++++++++++++++++++++
 board/samsung/trats/trats.c                   |  104 +------------------
 board/samsung/universal_c210/universal.c      |   98 +-----------------
 3 files changed, 143 insertions(+), 198 deletions(-)
 create mode 100644 board/samsung/exynos4_common/exynos4_common.c
board/samsung/exynos4_common/exynos4_common.c new file +139 -0
new file mode 100644
index 0000000..f2413e5
@@ -0,0 +1,139 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ * Heungjun Kim <[email protected]>
+ * Kyungmin Park <[email protected]>
+ * Donghwa Lee <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void)
+{
+	return board_rev;
+}
+#endif
+
+int dram_init(void)
+{
+	gd->ram_size	= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+			+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+#if CONFIG_NR_DRAM_BANKS == 4
+	gd->ram_size	+= get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+			+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
+#endif
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
+							PHYS_SDRAM_1_SIZE);
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
+							PHYS_SDRAM_2_SIZE);
+#if CONFIG_NR_DRAM_BANKS == 4
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
+							PHYS_SDRAM_3_SIZE);
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
+							PHYS_SDRAM_4_SIZE);
+#endif
+}
+
+int exynos4_mmc_init(struct exynos4_gpio_part2 *gpio2)
+{
+	int i, err;
+
+	/*
+	 * eMMC GPIO:
+	 * SDR 8-bit at 48MHz at MMC0
+	 * GPK0[0]	SD_0_CLK(2)
+	 * GPK0[1]	SD_0_CMD(2)
+	 * GPK0[2]	SD_0_CDn	-> Not used
+	 * GPK0[3:6]	SD_0_DATA[0:3](2)
+	 * GPK1[3:6]	SD_0_DATA[0:3](3)
+	 *
+	 * DDR 4-bit at 26MHz at MMC4
+	 * GPK0[0]	SD_4_CLK(3)
+	 * GPK0[1]	SD_4_CMD(3)
+	 * GPK0[2]	SD_4_CDn	-> Not used
+	 * GPK0[3:6]	SD_4_DATA[0:3](3)
+	 * GPK1[3:6]	SD_4_DATA[4:7](4)
+	 */
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		/* GPK0[0:6] special function 2 */
+		s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
+		/* GPK0[0:6] pull disable */
+		s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
+		/* GPK0[0:6] drv 4x */
+		s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
+	}
+
+	for (i = 3; i < 7; i++) {
+		/* GPK1[3:6] special function 3 */
+		s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
+		/* GPK1[3:6] pull disable */
+		s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
+		/* GPK1[3:6] drv 4x */
+		s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
+	}
+
+	/* T-flash detect */
+	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
+	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
+
+	/*
+	 * MMC device init
+	 * mmc0	 : eMMC (8-bit buswidth)
+	 * mmc2	 : SD card (4-bit buswidth)
+	 */
+	err = s5p_mmc_init(0, 8);
+
+	/*
+	 * Check the T-flash  detect pin
+	 * GPX3[4] T-flash detect pin
+	 */
+	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
+		/*
+		 * SD card GPIO:
+		 * GPK2[0]	SD_2_CLK(2)
+		 * GPK2[1]	SD_2_CMD(2)
+		 * GPK2[2]	SD_2_CDn	-> Not used
+		 * GPK2[3:6]	SD_2_DATA[0:3](2)
+		 */
+		for (i = 0; i < 7; i++) {
+			if (i == 2)
+				continue;
+			/* GPK2[0:6] special function 2 */
+			s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
+			/* GPK2[0:6] pull disable */
+			s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
+			/* GPK2[0:6] drv 4x */
+			s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
+		}
+		err = s5p_mmc_init(2, 4);
+	}
+
+	return err;
+}
board/samsung/trats/trats.c +2 -102

127 lines not on this page · raw message

board/samsung/universal_c210/universal.c +2 -96

122 lines not on this page · raw message

Signature · 1 line
1.7.5.4
#4 lore raw

PATCH 3/4 arm:exynos4: Set common code for trats and universal_c210 boards

Dear Piotr Wilczek,

board/samsung/exynos4_common/exynos4_common.c

Quoted 18 lines · Piotr Wilczek

Boards trats and universal are very similar resulting in some common code. That common code is moved to exynos4_common/exynos4_common.c

---
 board/samsung/exynos4_common/exynos4_common.c |  139 +++++++++++++++++++++++++
 board/samsung/trats/trats.c                   |  104 +------------------
 board/samsung/universal_c210/universal.c      |   98 +-----------------
 3 files changed, 143 insertions(+), 198 deletions(-)
 create mode 100644 board/samsung/exynos4_common/exynos4_common.c
board/samsung/exynos4_common/exynos4_common.c new file +0 -0
new file mode 100644
index 0000000..f2413e5

I'll reject your patch.
It's not a standard way, I think..

Quoted 25 lines
board/samsung/exynos4_common/exynos4_common.c new file +25 -0
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void)
+{
+       return board_rev;
+}
+#endif
+
+int dram_init(void)
+{
+       gd->ram_size    = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+                       + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+#if CONFIG_NR_DRAM_BANKS == 4
+       gd->ram_size    += get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+                       + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
+#endif
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+       gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
+                                                       PHYS_SDRAM_1_SIZE);
+       gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+       gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \

board/samsung/exynos4_common/exynos4_common.c line 60

Quoted 10 lines
board/samsung/exynos4_common/exynos4_common.c new file +10 -0
+                                                       PHYS_SDRAM_2_SIZE);
+#if CONFIG_NR_DRAM_BANKS == 4
+       gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+       gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
+                                                       PHYS_SDRAM_3_SIZE);
+       gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+       gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
+                                                       PHYS_SDRAM_4_SIZE);
+#endif
+}

also, this is not a common function.
Although they are almost same, but I think it's a board specific. Please don't move it.

board/samsung/exynos4_common/exynos4_common.c

Quoted 2 lines
board/samsung/exynos4_common/exynos4_common.c new file +2 -0
+
+int exynos4_mmc_init(struct exynos4_gpio_part2 *gpio2)

How about using pinmux instead?

Thanks.
Minkyu Kang.

Signature · 2 lines
from. prom.
www.promsoft.net
#5 lore raw

PATCH 3/4 arm:exynos4: Set common code for trats and universal_c210 boards

Dear Minkyu Kang,

Thank you for your comments. My motivation to move the dram_init functions was that they looked the same for every board. I keep them in the board specific file. I'll fix all the other issues and prepare new version.

Best regards
Piotr Wilczek

-----Original Message-----
From: Minkyu Kang [mailto:promsoft at gmail.com]
Sent: Thursday, August 16, 2012 11:10 AM
To: Piotr Wilczek
Cc: u-boot at lists.denx.de; Kyungmin Park
Subject: Re: [U-Boot] [PATCH 3/4] arm:exynos4: Set common code for trats and universal_c210 boards

Dear Piotr Wilczek,

Quoted 8 lines · Piotr Wilczek

Boards trats and universal are very similar resulting in some common code. That common code is moved to exynos4_common/exynos4_common.c

---
 board/samsung/exynos4_common/exynos4_common.c |  139

+++++++++++++++++++++++++

board/samsung/exynos4_common/exynos4_common.c

Quoted 11 lines
 board/samsung/trats/trats.c                   |  104 +------------------
 board/samsung/universal_c210/universal.c      |   98 +-----------------
 3 files changed, 143 insertions(+), 198 deletions(-)  create mode 

100644 board/samsung/exynos4_common/exynos4_common.c

board/samsung/exynos4_common/exynos4_common.c new file +0 -0
new file mode 100644
index 0000000..f2413e5

I'll reject your patch.
It's not a standard way, I think..

board/samsung/exynos4_common/exynos4_common.c

Quoted 10 lines
board/samsung/exynos4_common/exynos4_common.c new file +10 -0
+#ifdef CONFIG_REVISION_TAG
+u32 get_board_rev(void)
+{
+       return board_rev;
+}
+#endif
+
+int dram_init(void)
+{
+       gd->ram_size    = get_ram_size((long *)PHYS_SDRAM_1,

PHYS_SDRAM_1_SIZE)

board/samsung/exynos4_common/exynos4_common.c

Quoted 3 lines
board/samsung/exynos4_common/exynos4_common.c new file +3 -0
+                       + get_ram_size((long *)PHYS_SDRAM_2, 
+PHYS_SDRAM_2_SIZE); #if CONFIG_NR_DRAM_BANKS == 4
+       gd->ram_size    += get_ram_size((long *)PHYS_SDRAM_3,

PHYS_SDRAM_3_SIZE)

board/samsung/exynos4_common/exynos4_common.c line 61

Quoted 10 lines
board/samsung/exynos4_common/exynos4_common.c new file +10 -0
+                       + get_ram_size((long *)PHYS_SDRAM_4, 
+PHYS_SDRAM_4_SIZE); #endif
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+       gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
+

PHYS_SDRAM_1_SIZE);

board/samsung/exynos4_common/exynos4_common.c line 65

Quoted 7 lines
board/samsung/exynos4_common/exynos4_common.c new file +7 -0
+       gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+       gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
+                                                       
+PHYS_SDRAM_2_SIZE); #if CONFIG_NR_DRAM_BANKS == 4
+       gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+       gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
+

PHYS_SDRAM_3_SIZE);

board/samsung/exynos4_common/exynos4_common.c

Quoted 4 lines
board/samsung/exynos4_common/exynos4_common.c new file +4 -0
+       gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+       gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
+                                                       
+PHYS_SDRAM_4_SIZE); #endif }

also, this is not a common function.
Although they are almost same, but I think it's a board specific. Please don't move it.

board/samsung/exynos4_common/exynos4_common.c

Quoted 2 lines
board/samsung/exynos4_common/exynos4_common.c new file +2 -0
+
+int exynos4_mmc_init(struct exynos4_gpio_part2 *gpio2)

How about using pinmux instead?

Thanks.
Minkyu Kang.
--
from. prom.
www.promsoft.net

#6 lore raw

v2 cover Code cleaup for trats and universal

In reply to Piotr Wilczek

This patch fixes SDRAM configuration and size visibility fot Trats board.

Code for MMC initialisation is moved from board file to pinmux. MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards. MMC initialisation for boards Trats and Universal C210 is done using pinmux.

Low level initialisation in u-boot is eliminated as it done by previous bootloader.

Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats arm:exynos4:trats: Fix SDRAM size arm:exynos4:pinmux: Modify the gpio function for mmc arm:exynos4:trats: Use pinmux for mmc configuration arm:exynos4:universal: Use pinmux for mmc configuration arm:exynos4:universal: Eliminated low level init

 arch/arm/cpu/armv7/exynos/pinmux.c           |   56 ++++
 arch/arm/include/asm/arch-exynos/periph.h    |    1 +
 board/samsung/trats/trats.c                  |   70 ++----
 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |   78 ++----
 include/configs/s5pc210_universal.h          |    2 +
 include/configs/trats.h                      |   17 +-
 8 files changed, 111 insertions(+), 509 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
Signature · 1 line
1.7.5.4
#7 lore raw

PATCH v2 1/6 arm:exynos4:trats: Correct SDRAM configuration for trats

SDRAM setup alike to ORIGEN Dev board.

---
Changes for v2:
- no changes

 include/configs/trats.h |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)
include/configs/trats.h +11 -6
index 185cb68..f391227 100644
@@ -170,12 +170,17 @@
 /* Stack sizes */
 #define CONFIG_STACKSIZE		(256 << 10) /* regular stack 256KB */
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS	2
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE	(512 << 20)		/* 512 MB in CS 0 */
-#define PHYS_SDRAM_2		0x50000000		/* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE	(512 << 20)		/* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS	4
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */
 
Signature · 1 line
1.7.5.4
#8 lore raw

v3 cover Code cleaup for trats and universal

This patch fixes SDRAM configuration and size visibility fot Trats board.

Code for MMC initialisation is moved from board file to pinmux. MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards. MMC initialisation for boards Trats and Universal C210 is done using pinmux.

Low level initialisation in u-boot is eliminated as it done by another bootloader.

Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats arm:exynos4:trats: Fix SDRAM size arm:exynos4:pinmux: Modify the gpio function for mmc arm:exynos4:trats: Use pinmux for mmc configuration arm:exynos4:universal: Use pinmux for mmc configuration arm:exynos4:universal: Eliminated low level init

 arch/arm/cpu/armv7/exynos/pinmux.c           |   56 ++++
 arch/arm/include/asm/arch-exynos/periph.h    |    1 +
 board/samsung/trats/trats.c                  |   76 ++----
 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |   81 ++----
 include/configs/s5pc210_universal.h          |    2 +
 include/configs/trats.h                      |   17 +-
 8 files changed, 112 insertions(+), 517 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
Signature · 1 line
1.7.5.4
#9 lore raw

PATCH v3 1/6 arm:exynos4:trats: Correct SDRAM configuration for trats

SDRAM setup alike to ORIGEN Dev board.

---
Changes for v2:
- no changes
Changes for v3:
- no changes

 include/configs/trats.h |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)
include/configs/trats.h +11 -6
index 185cb68..f391227 100644
@@ -170,12 +170,17 @@
 /* Stack sizes */
 #define CONFIG_STACKSIZE		(256 << 10) /* regular stack 256KB */
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS	2
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE	(512 << 20)		/* 512 MB in CS 0 */
-#define PHYS_SDRAM_2		0x50000000		/* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE	(512 << 20)		/* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS	4
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */
 
Signature · 1 line
1.7.5.4
#10 lore raw

PATCH v3 1/6 arm:exynos4:trats: Correct SDRAM configuration for trats

Quoted 43 lines · Piotr Wilczek

SDRAM setup alike to ORIGEN Dev board.

---
Changes for v2:
- no changes
Changes for v3:
- no changes

 include/configs/trats.h |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)
include/configs/trats.h +11 -6
index 185cb68..f391227 100644
@@ -170,12 +170,17 @@
 /* Stack sizes */
 #define CONFIG_STACKSIZE		(256 << 10) /* regular stack 256KB */
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS	2
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE	(512 << 20)		/* 512 MB in CS 0 */
-#define PHYS_SDRAM_2		0x50000000		/* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE	(512 << 20)		/* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS	4
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */
 
#11 lore raw

v4 cover Code cleaup for trats and universal

In reply to Piotr Wilczek

This patch fixes SDRAM configuration and size visibility fot Trats board.

Code for MMC initialisation is moved from board file to pinmux. MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards. MMC initialisation for boards Trats and Universal C210 is done using pinmux.

Low level initialisation in u-boot is eliminated as it is done by another bootloader.

Changes for v2:
- mmc initialisation using pinmux
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- init SD card also when eMMC init failed
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext

Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats arm:exynos4:trats: Fix SDRAM size arm:exynos4:pinmux: Modify the gpio function for mmc arm:exynos4:trats: Use pinmux for mmc configuration arm:exynos4:universal: Use pinmux for mmc configuration arm:exynos4:universal: Eliminated low level init

 arch/arm/cpu/armv7/exynos/pinmux.c           |   58 ++++
 arch/arm/include/asm/arch-exynos/periph.h    |    1 +
 board/samsung/trats/trats.c                  |   76 ++----
 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |   82 ++----
 include/configs/s5pc210_universal.h          |    2 +
 include/configs/trats.h                      |   17 +-
 8 files changed, 114 insertions(+), 518 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
Signature · 1 line
1.7.5.4
#12 lore raw

PATCH v4 1/6 arm:exynos4:trats: Correct SDRAM configuration for trats

SDRAM setup alike to ORIGEN Dev board.

---
Changes for v2:
- no changes
Changes for v3:
- no changes
Changes for v4:
- no changes

---
 include/configs/trats.h |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)
include/configs/trats.h +11 -6
index b3b5a3d..151019c 100644
@@ -190,12 +190,17 @@
 
 #define CONFIG_SYS_HZ			1000
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS	2
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE	(512 << 20)		/* 512 MB in CS 0 */
-#define PHYS_SDRAM_2		0x50000000		/* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE	(512 << 20)		/* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS	4
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE		(1 << 20)	/* ram console */
 
Signature · 1 line
1.7.5.4
#13 lore raw

PATCH v4 2/6 arm:exynos4:trats: Fix SDRAM size

In reply to Piotr Wilczek

Full 1GiB is visible

---
Changes for v2:
- no changes
Changes for v3:
- no changes
Changes for v4:
- no changes

---
 board/samsung/trats/trats.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
board/samsung/trats/trats.c +7 -1
index e11a892..7b981fa 100644
@@ -93,7 +93,9 @@ void i2c_init_board(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
 
 	return 0;
 }
@@ -104,6 +106,10 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 }
 
 static unsigned int get_hw_revision(void)
Signature · 1 line
1.7.5.4
#14 lore raw

PATCH v4 3/6 arm:exynos4:pinmux: Modify the gpio function for mmc

In reply to Piotr Wilczek

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- no changes
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext

---
 arch/arm/cpu/armv7/exynos/pinmux.c        |   58 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 59 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +58 -0
index 7776add..5796d56 100644
@@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	default:
+		return -1;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
+	default:
+		debug("%s: invalid peripheral %d", __func__, peripheral);
+		return -1;
+	}
+
+	return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
 	if (cpu_is_exynos5())
 		return exynos5_pinmux_config(peripheral, flags);
+	else if (cpu_is_exynos4())
+		return exynos4_pinmux_config(peripheral, flags);
 	else {
 		debug("pinmux functionality not supported\n");
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -0
index b861d7d..082611c 100644
@@ -42,6 +42,7 @@ enum periph_id {
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
+	PERIPH_ID_SDMMC4,
 	PERIPH_ID_SROMC,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,
Signature · 1 line
1.7.5.4
#15 lore raw

PATCH v4 3/6 arm:exynos4:pinmux: Modify the gpio function for mmc

Hi Piotr,

I commented at the previously patch. But I didn't find the any modification.

pinmux.c: In function 'exynos_pinmux_config':
pinmux.c:296:20: warning: 'bank_ext' may be used uninitialized in this function [-Wuninitialized] pinmux.c:272:31: note: 'bank_ext' was declared here
pinmux.c:290:19: warning: 'bank' may be used uninitialized in this function [-Wuninitialized] pinmux.c:272:24: note: 'bank' was declared here

Could you remove the warning message?

Best Regards,
Jaehoon Chung

Quoted 103 lines · Piotr Wilczek

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- no changes
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext

---
 arch/arm/cpu/armv7/exynos/pinmux.c        |   58 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 59 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +58 -0
index 7776add..5796d56 100644
@@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	default:
+		return -1;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
+	default:
+		debug("%s: invalid peripheral %d", __func__, peripheral);
+		return -1;
+	}
+
+	return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
 	if (cpu_is_exynos5())
 		return exynos5_pinmux_config(peripheral, flags);
+	else if (cpu_is_exynos4())
+		return exynos4_pinmux_config(peripheral, flags);
 	else {
 		debug("pinmux functionality not supported\n");
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -0
index b861d7d..082611c 100644
@@ -42,6 +42,7 @@ enum periph_id {
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
+	PERIPH_ID_SDMMC4,
 	PERIPH_ID_SROMC,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,
#16 lore raw

PATCH v4 3/6 arm:exynos4:pinmux: Modify the gpio function for mmc

Hi Piotr,

Sorry, it removed the warning message.

this patch looks good to me.

Best Regards,
Jaehoon Chung

Quoted 125 lines · Jaehoon Chung

Hi Piotr,

I commented at the previously patch. But I didn't find the any modification.

pinmux.c: In function 'exynos_pinmux_config':
pinmux.c:296:20: warning: 'bank_ext' may be used uninitialized in this function [-Wuninitialized] pinmux.c:272:31: note: 'bank_ext' was declared here
pinmux.c:290:19: warning: 'bank' may be used uninitialized in this function [-Wuninitialized] pinmux.c:272:24: note: 'bank' was declared here

Could you remove the warning message?

Best Regards,
Jaehoon Chung

Quoted 96 lines · Piotr Wilczek

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- no changes
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext

---
 arch/arm/cpu/armv7/exynos/pinmux.c        |   58 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 59 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +58 -0
index 7776add..5796d56 100644
@@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	default:
+		return -1;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
+	default:
+		debug("%s: invalid peripheral %d", __func__, peripheral);
+		return -1;
+	}
+
+	return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
 	if (cpu_is_exynos5())
 		return exynos5_pinmux_config(peripheral, flags);
+	else if (cpu_is_exynos4())
+		return exynos4_pinmux_config(peripheral, flags);
 	else {
 		debug("pinmux functionality not supported\n");
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +0 -0
index b861d7d..082611c 100644

arch/arm/include/asm/arch-exynos/periph.h enum periph_id { · line 48

Quoted 7 lines
arch/arm/include/asm/arch-exynos/periph.h +1 -0
@@ -42,6 +42,7 @@ enum periph_id {
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
+	PERIPH_ID_SDMMC4,
 	PERIPH_ID_SROMC,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,

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#17 lore raw

PATCH v4 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

In reply to Piotr Wilczek

This patch use the pinmux for mmc configuration for Trats

---
Changes for v2:
- mmc iniatialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
Changes for v4:
- no changes

---
 board/samsung/trats/trats.c |   68 +++++++-----------------------------------
 1 files changed, 12 insertions(+), 56 deletions(-)
board/samsung/trats/trats.c +12 -56
index 7b981fa..57400ce 100644
@@ -29,6 +29,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
@@ -157,54 +158,22 @@ int board_mmc_init(bd_t *bis)
 {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
 	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
-	}
-
-	/*
 	 * MMC device init
 	 * mmc0	 : eMMC (8-bit buswidth)
 	 * mmc2	 : SD card (4-bit buswidth)
 	 */
-	err = s5p_mmc_init(0, 8);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err)
+		debug("SDMMC0 not configured\n");
+	else
+		err = s5p_mmc_init(0, 8);
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
@@ -215,24 +184,11 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
-		}
-		err = s5p_mmc_init(2, 4);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err)
+			debug("SDMMC2 not configured\n");
+		else
+			err = s5p_mmc_init(2, 4);
 	}
 
 	return err;
Signature · 1 line
1.7.5.4
#18 lore raw

PATCH v4 5/6 arm:exynos4:universal: Use pinmux for mmc configuration

In reply to Piotr Wilczek

This patch use the pinmux for mmc configuration for Universal C210

---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
Changes for v4;
- no changes

---
 board/samsung/universal_c210/universal.c |   74 ++++++------------------------
 1 files changed, 15 insertions(+), 59 deletions(-)
board/samsung/universal_c210/universal.c +15 -59
index 90fff5c..7a4941c 100644
@@ -27,6 +27,7 @@
 #include <asm/arch/adc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <pmic.h>
 #include <usb/s3c_udc.h>
 #include <asm/arch/cpu.h>
@@ -177,7 +178,7 @@ int checkboard(void)
 #ifdef CONFIG_GENERIC_MMC
 int board_mmc_init(bd_t *bis)
 {
-	int i, err;
+	int err;
 
 	switch (get_hwrev()) {
 	case 0:
@@ -200,75 +201,30 @@ int board_mmc_init(bd_t *bis)
 	}
 
 	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
+	 * MMC device init
+	 * mmc0	 : eMMC (8-bit buswidth)
+	 * mmc2	 : SD card (4-bit buswidth)
 	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
-	}
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err)
+		debug("SDMMC0 not configured\n");
+	else
+		err = s5p_mmc_init(0, 8);
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
 	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
 
 	/*
-	 * MMC device init
-	 * mmc0	 : eMMC (8-bit buswidth)
-	 * mmc2	 : SD card (4-bit buswidth)
-	 */
-	err = s5p_mmc_init(0, 8);
-
-	/*
 	 * Check the T-flash  detect pin
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
-		}
-		err = s5p_mmc_init(2, 4);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err)
+			debug("SDMMC2 not configured\n");
+		else
+			err = s5p_mmc_init(2, 4);
 	}
 
 	return err;
Signature · 1 line
1.7.5.4
#19 lore raw

PATCH v4 6/6 arm:exynos4:universal: Eliminated low level init

In reply to Piotr Wilczek

Low level initialisation is done by another bootloader

---
Changes for v2:
- no changes
Changes for v3:
- no changes
Changes for v4:
- no changes

---
 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |    8 +
 include/configs/s5pc210_universal.h          |    2 +
 4 files changed, 10 insertions(+), 396 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
board/samsung/universal_c210/Makefile +0 -1
index bfec08f..587cc1b 100644
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS-y	:= universal.o onenand.o
-SOBJS	:= lowlevel_init.o
 
 SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/samsung/universal_c210/lowlevel_init.S deleted +0 -395

395 lines not on this page · raw message

board/samsung/universal_c210/universal.c +8 -0
index 7a4941c..ded97ca 100644
@@ -32,6 +32,7 @@
 #include <usb/s3c_udc.h>
 #include <asm/arch/cpu.h>
 #include <max8998_pmic.h>
+#include <asm/arch/watchdog.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -276,3 +277,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
 	.usb_flags = PHY0_SLEEP,
 };
 #endif
+
+int board_early_init_f(void)
+{
+	wdt_stop();
+
+	return 0;
+}
include/configs/s5pc210_universal.h +2 -0
index 7727624..46f2663 100644
@@ -56,6 +56,8 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
Signature · 1 line
1.7.5.4
#20 lore raw

v4 cover Code cleaup for trats and universal

In reply to Piotr Wilczek

Dear Piotr Wilczek,

Quoted 25 lines · Piotr Wilczek

This patch fixes SDRAM configuration and size visibility fot Trats board.

Code for MMC initialisation is moved from board file to pinmux. MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards. MMC initialisation for boards Trats and Universal C210 is done using pinmux.

Low level initialisation in u-boot is eliminated as it is done by another bootloader.

Changes for v2:
- mmc initialisation using pinmux
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- init SD card also when eMMC init failed
Changes for v4:
- eliminated warning for uninitialized bank, bank_ext

Piotr Wilczek (6):
arm:exynos4:trats: Correct SDRAM configuration for trats arm:exynos4:trats: Fix SDRAM size arm:exynos4:pinmux: Modify the gpio function for mmc arm:exynos4:trats: Use pinmux for mmc configuration arm:exynos4:universal: Use pinmux for mmc configuration arm:exynos4:universal: Eliminated low level init

Quoted 11 lines
 arch/arm/cpu/armv7/exynos/pinmux.c           |   58 ++++
 arch/arm/include/asm/arch-exynos/periph.h    |    1 +
 board/samsung/trats/trats.c                  |   76 ++----
 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |   82 ++----
 include/configs/s5pc210_universal.h          |    2 +
 include/configs/trats.h                      |   17 +-
 8 files changed, 114 insertions(+), 518 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S

applied to u-boot-samsung.

Thanks.
Minkyu Kang.

Signature · 2 lines
from. prom.
www.promsoft.net
#21 lore raw

PATCH v3 2/6 arm:exynos4:trats: Fix SDRAM size

In reply to Piotr Wilczek

Full 1GiB is visible

---
Changes for v2:
- no chages
Changes for v3:
- no changes

 board/samsung/trats/trats.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
board/samsung/trats/trats.c +7 -1
index a8b2b11..f5df56c 100644
@@ -76,7 +76,9 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
 
 	return 0;
 }
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 }
 
 static unsigned int get_hw_revision(void)
Signature · 1 line
1.7.5.4
#22 lore raw

PATCH v3 3/6 arm:exynos4:pinmux: Modify the gpio function for mmc

In reply to Piotr Wilczek

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- no changes

 arch/arm/cpu/armv7/exynos/pinmux.c        |   56 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 57 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +56 -0
index d2b7d2c..84ee05c 100644
@@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
+	default:
+		debug("%s: invalid peripheral %d", __func__, peripheral);
+		return -1;
+	}
+
+	return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
 	if (cpu_is_exynos5())
 		return exynos5_pinmux_config(peripheral, flags);
+	else if (cpu_is_exynos4())
+		return exynos4_pinmux_config(peripheral, flags);
 	else {
 		debug("pinmux functionality not supported\n");
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -0
index 5db25aa..4e1da82 100644
@@ -34,6 +34,7 @@ enum periph_id {
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
+	PERIPH_ID_SDMMC4,
 	PERIPH_ID_SROMC,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,
Signature · 1 line
1.7.5.4
#23 lore raw

PATCH v3 3/6 arm:exynos4:pinmux: Modify the gpio function for mmc

Hi Piotr,

Quoted 20 lines · Piotr Wilczek

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file Changes for v3:
- no changes

 arch/arm/cpu/armv7/exynos/pinmux.c        |   56 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 57 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +0 -0
index d2b7d2c..84ee05c 100644

arch/arm/cpu/armv7/exynos/pinmux.c static int exynos5_pinmux_config(int peripheral, int flags) · line 216

Quoted 8 lines
arch/arm/cpu/armv7/exynos/pinmux.c +5 -0
@@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;

bank, bank_ext is uninitialized.

Quoted 71 lines
arch/arm/cpu/armv7/exynos/pinmux.c +51 -0
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
+	default:
+		debug("%s: invalid peripheral %d", __func__, peripheral);
+		return -1;
+	}
+
+	return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
 	if (cpu_is_exynos5())
 		return exynos5_pinmux_config(peripheral, flags);
+	else if (cpu_is_exynos4())
+		return exynos4_pinmux_config(peripheral, flags);
 	else {
 		debug("pinmux functionality not supported\n");
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -0
index 5db25aa..4e1da82 100644
@@ -34,6 +34,7 @@ enum periph_id {
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
+	PERIPH_ID_SDMMC4,
 	PERIPH_ID_SROMC,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,
#24 lore raw

PATCH v3 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

In reply to Piotr Wilczek

This patch use the pinmux for mmc configuration for Trats

---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed

 board/samsung/trats/trats.c |   68 +++++++-----------------------------------
 1 files changed, 12 insertions(+), 56 deletions(-)
board/samsung/trats/trats.c +12 -56
index f5df56c..84b7430 100644
@@ -29,6 +29,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
@@ -140,54 +141,22 @@ int board_mmc_init(bd_t *bis)
 {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
 	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
-	}
-
-	/*
 	 * MMC device init
 	 * mmc0	 : eMMC (8-bit buswidth)
 	 * mmc2	 : SD card (4-bit buswidth)
 	 */
-	err = s5p_mmc_init(0, 8);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err)
+		debug("SDMMC0 not configured\n");
+	else
+		err = s5p_mmc_init(0, 8);
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
@@ -198,24 +167,11 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
-		}
-		err = s5p_mmc_init(2, 4);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err)
+			debug("SDMMC2 not configured\n");
+		else
+			err = s5p_mmc_init(2, 4);
 	}
 
 	return err;
Signature · 1 line
1.7.5.4
#25 lore raw

PATCH v3 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

Quoted 118 lines · Piotr Wilczek

This patch use the pinmux for mmc configuration for Trats

---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed

 board/samsung/trats/trats.c |   68 +++++++-----------------------------------
 1 files changed, 12 insertions(+), 56 deletions(-)
board/samsung/trats/trats.c +12 -56
index f5df56c..84b7430 100644
@@ -29,6 +29,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
@@ -140,54 +141,22 @@ int board_mmc_init(bd_t *bis)
 {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
 	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
-	}
-
-	/*
 	 * MMC device init
 	 * mmc0	 : eMMC (8-bit buswidth)
 	 * mmc2	 : SD card (4-bit buswidth)
 	 */
-	err = s5p_mmc_init(0, 8);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err)
+		debug("SDMMC0 not configured\n");
+	else
+		err = s5p_mmc_init(0, 8);
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
@@ -198,24 +167,11 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
-		}
-		err = s5p_mmc_init(2, 4);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err)
+			debug("SDMMC2 not configured\n");
+		else
+			err = s5p_mmc_init(2, 4);
 	}
 
 	return err;
#26 lore raw

PATCH v3 5/6 arm:exynos4:universal: Use pinmux for mmc configuration

In reply to Piotr Wilczek

This patch use the pinmux for mmc configuration for Universal C210

---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed

 board/samsung/universal_c210/universal.c |   73 ++++++-----------------------
 1 files changed, 15 insertions(+), 58 deletions(-)
board/samsung/universal_c210/universal.c +15 -58
index 90fff5c..4ef8eae 100644
@@ -27,6 +27,7 @@
 #include <asm/arch/adc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <pmic.h>
 #include <usb/s3c_udc.h>
 #include <asm/arch/cpu.h>
@@ -177,7 +178,7 @@ int checkboard(void)
 #ifdef CONFIG_GENERIC_MMC
 int board_mmc_init(bd_t *bis)
 {
-	int i, err;
+	int err;
 
 	switch (get_hwrev()) {
 	case 0:
@@ -200,75 +201,31 @@ int board_mmc_init(bd_t *bis)
 	}
 
 	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
+	 * MMC device init
+	 * mmc0	 : eMMC (8-bit buswidth)
+	 * mmc2	 : SD card (4-bit buswidth)
 	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
-	}
 
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
-	}
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err)
+		debug("SDMMC0 not configured\n");
+	else
+		err = s5p_mmc_init(0, 8);
 
 	/* T-flash detect */
 	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
 	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
 
 	/*
-	 * MMC device init
-	 * mmc0	 : eMMC (8-bit buswidth)
-	 * mmc2	 : SD card (4-bit buswidth)
-	 */
-	err = s5p_mmc_init(0, 8);
-
-	/*
 	 * Check the T-flash  detect pin
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
-		}
-		err = s5p_mmc_init(2, 4);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err)
+			debug("SDMMC2 not configured\n");
+		else
+			err = s5p_mmc_init(2, 4);
 	}
 
 	return err;
Signature · 1 line
1.7.5.4
#27 lore raw

PATCH v3 6/6 arm:exynos4:universal: Eliminated low level init

In reply to Piotr Wilczek

Low level initialisation is done by another bootloader

---
Changes for v2:
- no changes
Changes for v3:
- no changes

 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |    8 +
 include/configs/s5pc210_universal.h          |    2 +
 4 files changed, 10 insertions(+), 396 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
board/samsung/universal_c210/Makefile +0 -1
index bfec08f..587cc1b 100644
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS-y	:= universal.o onenand.o
-SOBJS	:= lowlevel_init.o
 
 SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/samsung/universal_c210/lowlevel_init.S deleted +0 -395

395 lines not on this page · raw message

board/samsung/universal_c210/universal.c +8 -0
index 4ef8eae..e41c322 100644
@@ -32,6 +32,7 @@
 #include <usb/s3c_udc.h>
 #include <asm/arch/cpu.h>
 #include <max8998_pmic.h>
+#include <asm/arch/watchdog.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -277,3 +278,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
 	.usb_flags = PHY0_SLEEP,
 };
 #endif
+
+int board_early_init_f(void)
+{
+	wdt_stop();
+
+	return 0;
+}
include/configs/s5pc210_universal.h +2 -0
index a332f28..7978317 100644
@@ -56,6 +56,8 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
Signature · 1 line
1.7.5.4
#28 lore raw

PATCH v2 2/6 arm:exynos4:trats: Fix SDRAM size

In reply to Piotr Wilczek

Full 1GiB is visible

---
Changes for v2:
- no chages

 board/samsung/trats/trats.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
board/samsung/trats/trats.c +7 -1
index a8b2b11..f5df56c 100644
@@ -76,7 +76,9 @@ int board_init(void)
 int dram_init(void)
 {
 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+		get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
 
 	return 0;
 }
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
 }
 
 static unsigned int get_hw_revision(void)
Signature · 1 line
1.7.5.4
#29 lore raw

PATCH v2 3/6 arm:exynos4:pinmux: Modify the gpio function for mmc

In reply to Piotr Wilczek

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code file

 arch/arm/cpu/armv7/exynos/pinmux.c        |   56 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 57 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +56 -0
index d2b7d2c..84ee05c 100644
@@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+	struct s5p_gpio_bank *bank, *bank_ext;
+	int i;
+
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+		bank = &gpio2->k0;
+		bank_ext = &gpio2->k1;
+		break;
+	case PERIPH_ID_SDMMC2:
+		bank = &gpio2->k2;
+		bank_ext = &gpio2->k3;
+		break;
+	}
+	for (i = 0; i < 7; i++) {
+		if (i == 2)
+			continue;
+		s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+		s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+		s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+	}
+	if (flags & PINMUX_FLAG_8BIT_MODE) {
+		for (i = 3; i < 7; i++) {
+			s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+		}
+	}
+
+	return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+	switch (peripheral) {
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC2:
+		return exynos4_mmc_config(peripheral, flags);
+	case PERIPH_ID_SDMMC1:
+	case PERIPH_ID_SDMMC3:
+	case PERIPH_ID_SDMMC4:
+		printf("SDMMC device %d not implemented\n", peripheral);
+		return -1;
+	default:
+		debug("%s: invalid peripheral %d", __func__, peripheral);
+		return -1;
+	}
+
+	return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
 	if (cpu_is_exynos5())
 		return exynos5_pinmux_config(peripheral, flags);
+	else if (cpu_is_exynos4())
+		return exynos4_pinmux_config(peripheral, flags);
 	else {
 		debug("pinmux functionality not supported\n");
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -0
index 5db25aa..4e1da82 100644
@@ -34,6 +34,7 @@ enum periph_id {
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
+	PERIPH_ID_SDMMC4,
 	PERIPH_ID_SROMC,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,
Signature · 1 line
1.7.5.4
#30 lore raw

PATCH v2 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

In reply to Piotr Wilczek

This patch use the pinmux for mmc configuration for Trats

---
Chaneges for v2:
- mmc iniatialisation using pinmux

 board/samsung/trats/trats.c |   62 +++++++-----------------------------------
 1 files changed, 11 insertions(+), 51 deletions(-)
board/samsung/trats/trats.c +11 -51
index f5df56c..0fab2e0 100644
@@ -29,6 +29,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
@@ -140,46 +141,16 @@ int board_mmc_init(bd_t *bis)
 {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
-	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err) {
+		debug("SDMMC0 not configured\n");
+		return err;
 	}
 
 	/*
@@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err) {
+			debug("SDMMC2 not configured\n");
+			return err;
 		}
+
 		err = s5p_mmc_init(2, 4);
 	}
 
Signature · 1 line
1.7.5.4
#31 lore raw

PATCH v2 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

Quoted 64 lines · Piotr Wilczek

This patch use the pinmux for mmc configuration for Trats

---
Chaneges for v2:
- mmc iniatialisation using pinmux

 board/samsung/trats/trats.c |   62 +++++++-----------------------------------
 1 files changed, 11 insertions(+), 51 deletions(-)
board/samsung/trats/trats.c +2 -30
index f5df56c..0fab2e0 100644
@@ -29,6 +29,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
@@ -140,46 +141,16 @@ int board_mmc_init(bd_t *bis)
 {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
-	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 154

Quoted 10 lines
board/samsung/trats/trats.c +4 -5
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err) {
+		debug("SDMMC0 not configured\n");
+		return err;
 	}

if err, return? then how can sd-card init?
SD/eMMC card didn't have the dependency.

Best Regards,
Jaehoon Chung

Quoted 32 lines
board/samsung/trats/trats.c +5 -16
 	/*
@@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err) {
+			debug("SDMMC2 not configured\n");
+			return err;
 		}
+
 		err = s5p_mmc_init(2, 4);
 	}
 
#32 lore raw

PATCH v2 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

Dear Jaehoon Chung,

Quoted 81 lines

-----Original Message-----
From: Jaehoon Chung [mailto:jh80.chung at samsung.com]
Sent: Friday, August 24, 2012 3:18 AM
To: Piotr Wilczek
Cc: u-boot at lists.denx.de; Kyungmin Park
Subject: Re: [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration

Quoted 10 lines · Piotr Wilczek

This patch use the pinmux for mmc configuration for Trats

---
Chaneges for v2:
- mmc iniatialisation using pinmux

 board/samsung/trats/trats.c |   62 +++++++--------------------------

---------

Review

Quoted 3 lines
 1 files changed, 11 insertions(+), 51 deletions(-)
(quoted diff) +0 -0

b/board/samsung/trats/trats.c

Quoted 46 lines

index f5df56c..0fab2e0 100644

board/samsung/trats/trats.c +2 -26
@@ -29,6 +29,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/mipi_dsim.h>
@@ -140,46 +141,16 @@ int board_mmc_init(bd_t *bis)  {
 	struct exynos4_gpio_part2 *gpio =
 		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
-	int i, err;
+	int err;
 
 	/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
 	s5p_gpio_direction_output(&gpio->k0, 2, 1);
 	s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
 
-	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) { · line 149

Quoted 10 lines
board/samsung/trats/trats.c +1 -9
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0,

PINMUX_FLAG_8BIT_MODE);

Quoted 6 lines

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 154

Quoted 4 lines
board/samsung/trats/trats.c +3 -0
+	if (err) {
+		debug("SDMMC0 not configured\n");
+		return err;
 	}

if err, return? then how can sd-card init? SD/eMMC card didn't have the dependency.

exynos_pinmux_config() returns err only if given peripheral and/or mode (or cpu) are not supported. Then gpio pins are not configured and MMC cannot be initiated. Err is returned to indicate this situation and it is essential to init MMC0 correctly.
The dependency didn't exist in trats nor universal but exists when pinmux is used ex: smdk5250 board.

Best regards
Piotr Wilczek

Quoted 36 lines

Best Regards,
Jaehoon Chung

Quoted 13 lines
board/samsung/trats/trats.c +0 -7
 	/*
@@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 172

Quoted 10 lines
board/samsung/trats/trats.c +1 -9
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2,

PINMUX_FLAG_NONE);

Quoted 9 lines
board/samsung/trats/trats.c +4 -0
+		if (err) {
+			debug("SDMMC2 not configured\n");
+			return err;
 		}
+
 		err = s5p_mmc_init(2, 4);
 	}
 
#33 lore raw

PATCH v2 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

Hi Piotr,

Quoted 26 lines
Quoted 20 lines
Quoted 9 lines
board/samsung/trats/trats.c +0 -9
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis)

Quoted 10 lines
board/samsung/trats/trats.c +1 -9
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0,

PINMUX_FLAG_8BIT_MODE);

Quoted 6 lines

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 154

Quoted 4 lines
board/samsung/trats/trats.c +3 -0
+	if (err) {
+		debug("SDMMC0 not configured\n");
+		return err;
 	}

if err, return? then how can sd-card init?
SD/eMMC card didn't have the dependency.

Quoted 6 lines

exynos_pinmux_config() returns err only if given peripheral and/or mode (or cpu) are not supported. Then gpio pins are not configured and MMC cannot be initiated. Err is returned to indicate this situation and it is essential to init MMC0 correctly.
The dependency didn't exist in trats nor universal but exists when pinmux is used ex: smdk5250 board.

You're Right. it returned error, as you mentioned.
But if eMMC init is failed, could you ensure that sd init is also failed? I didn't think so.
Although eMMC card init is failed, i think that sd-card init should be succeed.
1) eMMC init failed -> return error. : this is your code.
2) eMMC init failed -> if SD card detect, then try to init SD-card. : this is my opinion.

If my thinking is wrong, plz let me know.

Best Regards,
Jaehoon Chung

Quoted 47 lines

Best regards
Piotr Wilczek

Quoted 27 lines

Best Regards,
Jaehoon Chung

Quoted 13 lines
board/samsung/trats/trats.c +0 -7
 	/*
@@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 172

Quoted 10 lines
board/samsung/trats/trats.c +1 -9
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2,

PINMUX_FLAG_NONE);

Quoted 9 lines

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 180

Quoted 9 lines
board/samsung/trats/trats.c +4 -0
+		if (err) {
+			debug("SDMMC2 not configured\n");
+			return err;
 		}
+
 		err = s5p_mmc_init(2, 4);
 	}
 

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U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

#34 lore raw

PATCH v2 4/6 arm:exynos4:trats: Use pinmux for mmc configuration

Hi Jaehoon,

Quoted 54 lines

-----Original Message-----
From: Jaehoon Chung [mailto:jh80.chung at samsung.com]
Sent: Friday, August 24, 2012 10:20 AM
To: Piotr Wilczek
Cc: 'Jaehoon Chung'; u-boot at lists.denx.de; 'Kyungmin Park'
Subject: Re: [U-Boot] [PATCH 4/6 v2] arm:exynos4:trats: Use pinmux for mmc configuration

Hi Piotr,

Quoted 26 lines
Quoted 20 lines
Quoted 9 lines
board/samsung/trats/trats.c +0 -9
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X);

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis)

Quoted 10 lines
board/samsung/trats/trats.c +1 -9
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0,

PINMUX_FLAG_8BIT_MODE);

Quoted 6 lines

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 154

Quoted 4 lines
board/samsung/trats/trats.c +3 -0
+	if (err) {
+		debug("SDMMC0 not configured\n");
+		return err;
 	}

if err, return? then how can sd-card init?
SD/eMMC card didn't have the dependency.

Quoted 4 lines

exynos_pinmux_config() returns err only if given peripheral and/or mode (or
cpu) are not supported. Then gpio pins are not configured and MMC cannot be initiated. Err is returned to indicate this situation and

it

Quoted 3 lines

is essential to init MMC0 correctly.
The dependency didn't exist in trats nor universal but exists when pinmux is used ex: smdk5250 board.

You're Right. it returned error, as you mentioned.
But if eMMC init is failed, could you ensure that sd init is also failed?
I didn't think so.
Although eMMC card init is failed, i think that sd-card init should be succeed.
1) eMMC init failed -> return error. : this is your code.
2) eMMC init failed -> if SD card detect, then try to init SD-card. : this is my opinion.

Quoted 1 line

If my thinking is wrong, plz let me know.

I agree and will fix patches so SD card can be initiated even if eMMC init failed.
Best regards,
Piotr Wilczek

Quoted 50 lines

Best Regards,
Jaehoon Chung

Quoted 47 lines

Best regards
Piotr Wilczek

Quoted 27 lines

Best Regards,
Jaehoon Chung

Quoted 13 lines
board/samsung/trats/trats.c +0 -7
 	/*
@@ -198,23 +169,12 @@ int board_mmc_init(bd_t *bis)
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 172

Quoted 10 lines
board/samsung/trats/trats.c +1 -9
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2,

PINMUX_FLAG_NONE);

Quoted 9 lines

board/samsung/trats/trats.c int board_mmc_init(bd_t *bis) · line 180

Quoted 9 lines
board/samsung/trats/trats.c +4 -0
+		if (err) {
+			debug("SDMMC2 not configured\n");
+			return err;
 		}
+
 		err = s5p_mmc_init(2, 4);
 	}
 

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#35 lore raw

PATCH v2 5/6 arm:exynos4:universal: Use pinmux for mmc configuration

In reply to Piotr Wilczek

This patch use the pinmux for mmc configuration for Universal C210

---
Changes for v2:
- mmc initialisation using pinmux

 board/samsung/universal_c210/universal.c |   70 ++++++-----------------------
 1 files changed, 15 insertions(+), 55 deletions(-)
board/samsung/universal_c210/universal.c +15 -55
index 90fff5c..f6bc51d 100644
@@ -27,6 +27,7 @@
 #include <asm/arch/adc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
 #include <pmic.h>
 #include <usb/s3c_udc.h>
 #include <asm/arch/cpu.h>
@@ -177,7 +178,7 @@ int checkboard(void)
 #ifdef CONFIG_GENERIC_MMC
 int board_mmc_init(bd_t *bis)
 {
-	int i, err;
+	int err;
 
 	switch (get_hwrev()) {
 	case 0:
@@ -199,46 +200,12 @@ int board_mmc_init(bd_t *bis)
 		break;
 	}
 
-	/*
-	 * eMMC GPIO:
-	 * SDR 8-bit at 48MHz at MMC0
-	 * GPK0[0]	SD_0_CLK(2)
-	 * GPK0[1]	SD_0_CMD(2)
-	 * GPK0[2]	SD_0_CDn	-> Not used
-	 * GPK0[3:6]	SD_0_DATA[0:3](2)
-	 * GPK1[3:6]	SD_0_DATA[0:3](3)
-	 *
-	 * DDR 4-bit at 26MHz at MMC4
-	 * GPK0[0]	SD_4_CLK(3)
-	 * GPK0[1]	SD_4_CMD(3)
-	 * GPK0[2]	SD_4_CDn	-> Not used
-	 * GPK0[3:6]	SD_4_DATA[0:3](3)
-	 * GPK1[3:6]	SD_4_DATA[4:7](4)
-	 */
-	for (i = 0; i < 7; i++) {
-		if (i == 2)
-			continue;
-		/* GPK0[0:6] special function 2 */
-		s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
-		/* GPK0[0:6] pull disable */
-		s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
-		/* GPK0[0:6] drv 4x */
-		s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
-	}
-
-	for (i = 3; i < 7; i++) {
-		/* GPK1[3:6] special function 3 */
-		s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
-		/* GPK1[3:6] pull disable */
-		s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
-		/* GPK1[3:6] drv 4x */
-		s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
+	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+	if (err) {
+		debug("SDMMC0 not configured\n");
+		return err;
 	}
 
-	/* T-flash detect */
-	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
-	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
-
 	/*
 	 * MMC device init
 	 * mmc0	 : eMMC (8-bit buswidth)
@@ -246,28 +213,21 @@ int board_mmc_init(bd_t *bis)
 	 */
 	err = s5p_mmc_init(0, 8);
 
+	/* T-flash detect */
+	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
+	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
+
 	/*
 	 * Check the T-flash  detect pin
 	 * GPX3[4] T-flash detect pin
 	 */
 	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
-		/*
-		 * SD card GPIO:
-		 * GPK2[0]	SD_2_CLK(2)
-		 * GPK2[1]	SD_2_CMD(2)
-		 * GPK2[2]	SD_2_CDn	-> Not used
-		 * GPK2[3:6]	SD_2_DATA[0:3](2)
-		 */
-		for (i = 0; i < 7; i++) {
-			if (i == 2)
-				continue;
-			/* GPK2[0:6] special function 2 */
-			s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
-			/* GPK2[0:6] pull disable */
-			s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
-			/* GPK2[0:6] drv 4x */
-			s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
+		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+		if (err) {
+			debug("SDMMC2 not configured\n");
+			return err;
 		}
+
 		err = s5p_mmc_init(2, 4);
 	}
 
Signature · 1 line
1.7.5.4
#36 lore raw

PATCH v2 6/6 arm:exynos4:universal: Eliminated low level init

In reply to Piotr Wilczek

Low level initialisation is done by another bootloader

---
Changes for v2:
- no changes

 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |    8 +
 include/configs/s5pc210_universal.h          |    2 +
 4 files changed, 10 insertions(+), 396 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
board/samsung/universal_c210/Makefile +0 -1
index bfec08f..587cc1b 100644
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS-y	:= universal.o onenand.o
-SOBJS	:= lowlevel_init.o
 
 SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/samsung/universal_c210/lowlevel_init.S deleted +0 -395

395 lines not on this page · raw message

board/samsung/universal_c210/universal.c +8 -0
index f6bc51d..8a114e6 100644
@@ -32,6 +32,7 @@
 #include <usb/s3c_udc.h>
 #include <asm/arch/cpu.h>
 #include <max8998_pmic.h>
+#include <asm/arch/watchdog.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -280,3 +281,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
 	.usb_flags = PHY0_SLEEP,
 };
 #endif
+
+int board_early_init_f(void)
+{
+	wdt_stop();
+
+	return 0;
+}
include/configs/s5pc210_universal.h +2 -0
index a332f28..7978317 100644
@@ -56,6 +56,8 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
Signature · 1 line
1.7.5.4
#37 lore raw

PATCH 4/4 arm:exynos4:universal_c210: Eliminate low level initialisation

In reply to Piotr Wilczek

The low level initialisation is not necessary in U-boot since it is done by another bootloader.

---
 board/samsung/universal_c210/Makefile        |    1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --------------------------
 board/samsung/universal_c210/universal.c     |    7 +
 include/configs/s5pc210_universal.h          |    2 +
 4 files changed, 9 insertions(+), 396 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
board/samsung/universal_c210/Makefile +0 -1
index bfec08f..587cc1b 100644
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS-y	:= universal.o onenand.o
-SOBJS	:= lowlevel_init.o
 
 SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/samsung/universal_c210/lowlevel_init.S deleted +0 -395

395 lines not on this page · raw message

board/samsung/universal_c210/universal.c +7 -0
index a64eba0..f4d273b 100644
@@ -226,3 +226,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
 	.usb_flags = PHY0_SLEEP,
 };
 #endif
+
+int board_early_init_f(void)
+{
+	wdt_stop();
+
+	return 0;
+}
include/configs/s5pc210_universal.h +2 -0
index a332f28..7978317 100644
@@ -56,6 +56,8 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
Signature · 1 line
1.7.5.4