SPL: Port SPL framework to powerpc

This patch enables the SPL framework to be used on powerpc platforms and not only ARM.

Signed-off-by Stefan Roese <[email protected]>

---
Changes in v2:
- Rebased on Tom's SPL framework patches v4
- Add option to skip copying of the mkimage header

 arch/powerpc/lib/Makefile |  1 +
 arch/powerpc/lib/spl.c    | 42  
++++++++++++++++++++++++++++++++++++++++++
 common/spl/spl.c          | 10 ++++++++++
 3 files changed, 53 insertions(+)
 create mode 100644 arch/powerpc/lib/spl.c

arch/powerpc/lib/Makefile +0 -0

index 965f9ea..9bcbdde 100644

arch/powerpc/lib/Makefile +2 -0

+/*
+ * This function jumps to an image with argument. Normally an FDT or  

ATAGS
+ * image.
+ * arg: Pointer to paramter image in RAM
+ */

arch/powerpc/lib/Makefile +5 -0

+#ifdef CONFIG_SPL_OS_BOOT
+void __noreturn jump_to_image_linux(void *arg)
+{
+	debug("Entering kernel arg pointer: 0x%p\n", arg);
+	typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5,  

ulong r6,

Quoted 12 lines · Stefan Roese

This patch enables the SPL framework to be used on powerpc platforms and not only ARM.

Signed-off-by Stefan Roese <[email protected]> --- Changes in v2: -

Rebased on Tom's SPL framework patches v4 - Add option to skip copying of the mkimage header

arch/powerpc/lib/Makefile | 1 + arch/powerpc/lib/spl.c | 42
++++++++++++++++++++++++++++++++++++++++++ common/spl/spl.c | 10 ++++++++++ 3 files changed, 53 insertions(+) create mode 100644 arch/powerpc/lib/spl.c

Quoted 6 lines

(quoted diff) +0 -0

b/arch/powerpc/lib/Makefile index 965f9ea..9bcbdde 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@
-50,6 +50,7 @@ COBJS-y += cache.o COBJS-y += extable.o
COBJS-y += interrupts.o COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
+COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o COBJS-y += time.o

Won't this build spl.o into the main U-Boot as well?

Quoted 16 lines · Stefan Roese

This patch enables the SPL framework to be used on powerpc platforms and not only ARM.

Signed-off-by Stefan Roese <[email protected]>

---
Changes in v2:
- Rebased on Tom's SPL framework patches v4
- Add option to skip copying of the mkimage header

 arch/powerpc/lib/Makefile |  1 +
 arch/powerpc/lib/spl.c    | 42  
++++++++++++++++++++++++++++++++++++++++++
 common/spl/spl.c          | 10 ++++++++++
 3 files changed, 53 insertions(+)
 create mode 100644 arch/powerpc/lib/spl.c

arch/powerpc/lib/Makefile COBJS-y += cache.o · line 54

Quoted 10 lines

arch/powerpc/lib/Makefile +1 -0

index 965f9ea..9bcbdde 100644
@@ -50,6 +50,7 @@ COBJS-y	+= cache.o
 COBJS-y	+= extable.o
 COBJS-y	+= interrupts.o
 COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
+COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
 COBJS-y	+= time.o

Won't this build spl.o into the main U-Boot as well?

Quoted 13 lines

arch/powerpc/lib/Makefile +2 -0

+/*
+ * This function jumps to an image with argument. Normally an FDT or  

ATAGS
+ * image.
+ * arg: Pointer to paramter image in RAM
+ */

arch/powerpc/lib/Makefile +5 -0

+#ifdef CONFIG_SPL_OS_BOOT
+void __noreturn jump_to_image_linux(void *arg)
+{
+	debug("Entering kernel arg pointer: 0x%p\n", arg);
+	typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5,  

ulong r6,

arch/powerpc/lib/Makefile +1 -0

+					  ulong r7, ulong r8, ulong r9)

arch/powerpc/lib/Makefile

Quoted 6 lines

arch/powerpc/lib/Makefile +6 -0

+		__attribute__ ((noreturn));
+	image_entry_arg_t image_entry =
+		(image_entry_arg_t)spl_image.entry_point;
+
+	image_entry(arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ, 0, 0);
+}

At what point does the image get cache-flushed?

Quoted 2 lines · Scott Wood

Quoted 1 line · Stefan Roese

This patch enables the SPL framework to be used on powerpc

platforms

Quoted 15 lines

Quoted 15 lines

and not only ARM.

Signed-off-by Stefan Roese <[email protected]>

---
Changes in v2:
- Rebased on Tom's SPL framework patches v4
- Add option to skip copying of the mkimage header

 arch/powerpc/lib/Makefile |  1 +
 arch/powerpc/lib/spl.c    | 42
++++++++++++++++++++++++++++++++++++++++++
 common/spl/spl.c          | 10 ++++++++++
 3 files changed, 53 insertions(+)
 create mode 100644 arch/powerpc/lib/spl.c

Quoted 12 lines

arch/powerpc/lib/Makefile COBJS-y += cache.o · line 54

Quoted 10 lines

arch/powerpc/lib/Makefile +1 -0

index 965f9ea..9bcbdde 100644
@@ -50,6 +50,7 @@ COBJS-y	+= cache.o
 COBJS-y	+= extable.o
 COBJS-y	+= interrupts.o
 COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
+COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
 COBJS-y	+= time.o

Won't this build spl.o into the main U-Boot as well?

Yes. I'll fix it in the next patchset version.

Quoted 2 lines

arch/powerpc/lib/Makefile COBJS-y += cache.o · line 56

Quoted 2 lines

arch/powerpc/lib/Makefile +2 -0

+/*
+ * This function jumps to an image with argument. Normally an FDT  

or

Quoted 11 lines

Quoted 11 lines

ATAGS
+ * image.
+ * arg: Pointer to paramter image in RAM
+ */

arch/powerpc/lib/Makefile +5 -0

+#ifdef CONFIG_SPL_OS_BOOT
+void __noreturn jump_to_image_linux(void *arg)
+{
+	debug("Entering kernel arg pointer: 0x%p\n", arg);
+	typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5,

ulong r6,

arch/powerpc/lib/Makefile +1 -0

+					  ulong r7, ulong r8, ulong r9)

Quoted 8 lines

arch/powerpc/lib/Makefile

Quoted 6 lines

arch/powerpc/lib/Makefile +6 -0

+		__attribute__ ((noreturn));
+	image_entry_arg_t image_entry =
+		(image_entry_arg_t)spl_image.entry_point;
+
+	image_entry(arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ, 0, 0);
+}

At what point does the image get cache-flushed?

Not at all right now. MPC5200 has dcache disabled, at least in the SPL.
Other PowerPC architectures might add a cache flush here if needed at some time. Okay?

Quoted 15 lines

Quoted 6 lines

Quoted 6 lines

arch/powerpc/lib/spl.c new file +4 -0

+void __noreturn jump_to_image_linux(void *arg)
+{
+	debug("Entering kernel arg pointer: 0x%p\n", arg);
+	typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5,

ulong r6,

arch/powerpc/lib/spl.c new file +1 -0

+					  ulong r7, ulong r8, ulong r9)

Quoted 8 lines

arch/powerpc/lib/spl.c line 41

Quoted 6 lines

arch/powerpc/lib/spl.c new file +6 -0

+		__attribute__ ((noreturn));
+	image_entry_arg_t image_entry =
+		(image_entry_arg_t)spl_image.entry_point;
+
+	image_entry(arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ, 0, 0);
+}

At what point does the image get cache-flushed?

Quoted 4 lines

Not at all right now. MPC5200 has dcache disabled, at least in the SPL.
Other PowerPC architectures might add a cache flush here if needed at some time. Okay?

Or they might forget to do so and have weird bugs.

Why not just call flush_cache() on the image now? Non-SPL does this in common code, not even PPC-specific.

Quoted 4 lines · Scott Wood

Quoted 4 lines

Quoted 4 lines

arch/powerpc/lib/spl.c

Quoted 4 lines

arch/powerpc/lib/spl.c new file +4 -0

+void __noreturn jump_to_image_linux(void *arg)
+{
+	debug("Entering kernel arg pointer: 0x%p\n", arg);
+	typedef void (*image_entry_arg_t)(void *, ulong r4,  

ulong r5,

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

Review

Quoted 2 lines

ulong r6,

(quoted diff) +1 -0

+					  ulong r7, ulong r8,  

ulong r9)

Quoted 5 lines

Quoted 5 lines

Quoted 5 lines

arch/powerpc/lib/spl.c

Quoted 5 lines

arch/powerpc/lib/spl.c new file +5 -0

+		__attribute__ ((noreturn));
+	image_entry_arg_t image_entry =
+		(image_entry_arg_t)spl_image.entry_point;
+
+	image_entry(arg, 0, 0, EPAPR_MAGIC,  

CONFIG_SYS_BOOTMAPSZ, 0, 0);

Quoted 7 lines

Quoted 7 lines

Quoted 3 lines

Quoted 1 line

+}

At what point does the image get cache-flushed?

Not at all right now. MPC5200 has dcache disabled, at least in the SPL.
Other PowerPC architectures might add a cache flush here if needed

at

Quoted 4 lines

Quoted 1 line

some time. Okay?

Or they might forget to do so and have weird bugs.

Quoted 1 line

Why not just call flush_cache() on the image now? Non-SPL does

this in

Quoted 1 line

common code, not even PPC-specific.

Okay, probably better to add this code now. But shouldn't we add this code to the common SPL framework code then? Right before calling jump_to_image_linux()?

Quoted 31 lines · Stefan Roese

Quoted 4 lines · Scott Wood

Quoted 4 lines

Quoted 4 lines

arch/powerpc/lib/spl.c

Quoted 4 lines

arch/powerpc/lib/spl.c new file +4 -0

+void __noreturn jump_to_image_linux(void *arg)
+{
+	debug("Entering kernel arg pointer: 0x%p\n", arg);
+	typedef void (*image_entry_arg_t)(void *, ulong r4,  

ulong r5,

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

Review

Quoted 2 lines

ulong r6,

(quoted diff) +1 -0

+					  ulong r7, ulong r8,  

ulong r9)

Quoted 5 lines

Quoted 5 lines

Quoted 5 lines

arch/powerpc/lib/spl.c

Quoted 5 lines

arch/powerpc/lib/spl.c new file +5 -0

+		__attribute__ ((noreturn));
+	image_entry_arg_t image_entry =
+		(image_entry_arg_t)spl_image.entry_point;
+
+	image_entry(arg, 0, 0, EPAPR_MAGIC,  

CONFIG_SYS_BOOTMAPSZ, 0, 0);

Quoted 7 lines

Quoted 7 lines

Quoted 3 lines

Quoted 1 line

+}

At what point does the image get cache-flushed?

Not at all right now. MPC5200 has dcache disabled, at least in the SPL.
Other PowerPC architectures might add a cache flush here if needed

at

Quoted 5 lines

Quoted 1 line

some time. Okay?

Or they might forget to do so and have weird bugs.

Why not just call flush_cache() on the image now? Non-SPL does

this in

Quoted 1 line

common code, not even PPC-specific.

Quoted 3 lines

Okay, probably better to add this code now. But shouldn't we add this code to the common SPL framework code then? Right before calling jump_to_image_linux()?

Sure, I didn't mean it should go here (it needs to be somewhere that knows the image start/end, not just the entry point). This is just the patch that prompted me to ask the question.

Quoted 30 lines · Scott Wood

Quoted 29 lines · Stefan Roese

Quoted 3 lines · Scott Wood

Quoted 3 lines

Quoted 3 lines

Quoted 3 lines

+void __noreturn jump_to_image_linux(void *arg) +{ + debug("Entering kernel arg pointer: 0x%p\n", arg); + typedef void (*image_entry_arg_t)(void *, ulong r4,

ulong r5,

Quoted 1 line

Quoted 1 line

Quoted 1 line

Quoted 1 line

ulong r6, + ulong r7, ulong r8,

ulong r9)

Quoted 4 lines

Quoted 4 lines

Quoted 4 lines

Quoted 4 lines

(quoted diff) +1 -0

+		__attribute__ ((noreturn)); +	image_entry_arg_t

image_entry = +
(image_entry_arg_t)spl_image.entry_point; + +
image_entry(arg, 0, 0, EPAPR_MAGIC,

CONFIG_SYS_BOOTMAPSZ, 0, 0);

Quoted 7 lines

Quoted 7 lines

Quoted 3 lines

Quoted 1 line

+}

At what point does the image get cache-flushed?

Not at all right now. MPC5200 has dcache disabled, at least in the SPL. Other PowerPC architectures might add a cache flush here if needed

at

Quoted 6 lines

Quoted 1 line

some time. Okay?

Or they might forget to do so and have weird bugs.

Why not just call flush_cache() on the image now? Non-SPL does

this in

Quoted 1 line

common code, not even PPC-specific.

Quoted 7 lines

Quoted 3 lines

Okay, probably better to add this code now. But shouldn't we add this code to the common SPL framework code then? Right before calling jump_to_image_linux()?

Sure, I didn't mean it should go here (it needs to be somewhere that knows the image start/end, not just the entry point). This is just the patch that prompted me to ask the question.

I see.

Tom, whats your input on this? Do you see any problems about putting a flush_cache() into the common SPL framework code? Are any of the ARM platforms currently using this framework already running with d-cache enabled?

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Quoted 8 lines · Stefan Roese

Quoted 7 lines · Scott Wood

Quoted 6 lines · Stefan Roese

Quoted 3 lines · Scott Wood

Quoted 3 lines

Quoted 3 lines

Quoted 3 lines

+void __noreturn jump_to_image_linux(void *arg) +{ + debug("Entering kernel arg pointer: 0x%p\n", arg); + typedef void (*image_entry_arg_t)(void *, ulong r4,

ulong r5,

Quoted 1 line

Quoted 1 line

Quoted 1 line

Quoted 1 line

ulong r6, + ulong r7,

ulong r8,

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

ulong r9)

Quoted 1 line

Quoted 1 line

Quoted 1 line

Review

Quoted 1 line

(quoted diff) +1 -0

+		__attribute__ ((noreturn)); +	 

image_entry_arg_t

Quoted 31 lines

Quoted 21 lines

Quoted 21 lines

Quoted 3 lines

Quoted 3 lines

Quoted 3 lines

Quoted 3 lines

image_entry = +
(image_entry_arg_t)spl_image.entry_point; + +
image_entry(arg, 0, 0, EPAPR_MAGIC,

CONFIG_SYS_BOOTMAPSZ, 0, 0);

Quoted 7 lines

Quoted 7 lines

Quoted 3 lines

Quoted 1 line

+}

At what point does the image get cache-flushed?

Not at all right now. MPC5200 has dcache disabled, at least in the SPL. Other PowerPC architectures might add a cache flush here if needed

at

Quoted 6 lines

Quoted 1 line

some time. Okay?

Or they might forget to do so and have weird bugs.

Why not just call flush_cache() on the image now? Non-SPL does

this in

Quoted 1 line

common code, not even PPC-specific.

Quoted 7 lines

Quoted 3 lines

Okay, probably better to add this code now. But shouldn't we add this code to the common SPL framework code then? Right before calling jump_to_image_linux()?

Sure, I didn't mean it should go here (it needs to be somewhere that knows the image start/end, not just the entry point). This is just the patch that prompted me to ask the question.

I see.

Quoted 4 lines

Tom, whats your input on this? Do you see any problems about putting a flush_cache() into the common SPL framework code? Are any of the ARM platforms currently using this framework already running with d-cache enabled?

On ARM, jump_to_image_linux() calls cleanup_before_linux() to take care of flushing, etc. So the PowerPC jump_to_image_linux should take care of what it needs to take care of.

Quoted 10 lines

Quoted 7 lines

Quoted 3 lines

Okay, probably better to add this code now. But shouldn't we add this code to the common SPL framework code then? Right before calling jump_to_image_linux()?

Sure, I didn't mean it should go here (it needs to be somewhere that knows the image start/end, not just the entry point). This is just the patch that prompted me to ask the question.

I see.

Quoted 4 lines

Tom, whats your input on this? Do you see any problems about putting a flush_cache() into the common SPL framework code? Are any of the ARM platforms currently using this framework already running with d-cache enabled?

On ARM, jump_to_image_linux() calls cleanup_before_linux() to take care of flushing, etc. So the PowerPC jump_to_image_linux should take care of what it needs to take care of.

On 10/05/2012 05:22 PM, Tom Rini wrote:

<snip>

Quoted 11 lines

Quoted 11 lines

Quoted 8 lines

Quoted 3 lines

Okay, probably better to add this code now. But shouldn't we add this code to the common SPL framework code then? Right before calling jump_to_image_linux()?

Sure, I didn't mean it should go here (it needs to be somewhere that knows the image start/end, not just the entry point). This is just the patch that prompted me to ask the question.

I see.

Quoted 8 lines

Quoted 4 lines

Tom, whats your input on this? Do you see any problems about putting a flush_cache() into the common SPL framework code? Are any of the ARM platforms currently using this framework already running with d-cache enabled?

On ARM, jump_to_image_linux() calls cleanup_before_linux() to take care of flushing, etc. So the PowerPC jump_to_image_linux should take care of what it needs to take care of.

Hmmm. Why not move this cleanup_xxx stuff into the common code as well? Is it really that platform specific? Cache flushing is a common problem.

So basically a "+1" for Scotts comments. But I would suggest to address this in a follow up patch, to consolidate all this cleanup/cache_flush stuff. Okay?

By extracting getenv_f and envmatch() from cmd_nvedit.c into a separate file, getenv_f() can be included easily into the SPL binary. With this, SPL boards can now use getenv_f() to read environment variables (e.g. to detect if the OS or U-Boot shall be executed).

In the approach this is done for env stored in NOR flash, as this will be used by an upcoming MPC5200 board port.