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mtd: st fsmc_nand: pass the ale and cmd resource via resource

PATCH New Jean-Christophe PLAGNIOL-VILLARD 4 participants 5 messages Oct 4, 2012 – Oct 11, 2012

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#0 lore raw

PATCH 1/1 mtd: st fsmc_nand: pass the ale and cmd resource via resource

Do not use the platform_data to pass resource and be smart in the drivers. Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Cc Linus Walleij <[email protected]>
Cc Vipin Kumar <[email protected]>
Cc linux-mtd at lists.infradead.org
---
 .../devicetree/bindings/mtd/fsmc-nand.txt          |   12 +++---
 arch/arm/boot/dts/spear13xx.dtsi                   |   10 ++---
 arch/arm/boot/dts/spear300.dtsi                    |    8 ++--
 arch/arm/boot/dts/spear310.dtsi                    |    8 ++--
 arch/arm/boot/dts/spear320.dtsi                    |    8 ++--
 arch/arm/boot/dts/spear600.dtsi                    |    8 ++--
 arch/arm/mach-u300/core.c                          |   14 ++++++-
 drivers/mtd/nand/fsmc_nand.c                       |   44 +++++---------------
 include/linux/mtd/fsmc.h                           |    3 --
 9 files changed, 49 insertions(+), 66 deletions(-)
Documentation/devicetree/bindings/mtd/fsmc-nand.txt +5 -7
index e2c663b..e3ea32e 100644
@@ -3,9 +3,7 @@
 Required properties:
 - compatible : "st,spear600-fsmc-nand"
 - reg : Address range of the mtd chip
-- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"
-- st,ale-off : Chip specific offset to ALE
-- st,cle-off : Chip specific offset to CLE
+- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
 
 Optional properties:
 - bank-width : Width (in bytes) of the device.  If not present, the width
@@ -19,10 +17,10 @@ Example:
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0xd1800000 0x1000	/* FSMC Register */
-		       0xd2000000 0x4000>;	/* NAND Base */
-		reg-names = "fsmc_regs", "nand_data";
-		st,ale-off = <0x20000>;
-		st,cle-off = <0x10000>;
+		       0xd2000000 0x0010	/* NAND Base DATA */
+		       0xd2020000 0x0010	/* NAND Base ADDR */
+		       0xd2010000 0x0010>;	/* NAND Base CMD */
+		reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 
 		bank-width = <1>;
 		nand-skip-bbtscan;
arch/arm/boot/dts/spear13xx.dtsi +5 -5
index f7b84ac..14a6d15 100644
@@ -104,15 +104,15 @@
 			compatible = "st,spear600-fsmc-nand";
 			#address-cells = <1>;
 			#size-cells = <1>;
-			reg = <0xb0000000 0x1000	/* FSMC Register */
-			       0xb0800000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
+			reg = <0xb0000000 0x1000	/* FSMC Register*/
+			       0xb0800000 0x0010	/* NAND Base DATA */
+			       0xb0820000 0x0010	/* NAND Base ADDR */
+			       0xb0810000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 			interrupts = <0 20 0x4
 				      0 21 0x4
 				      0 22 0x4
 				      0 23 0x4>;
-			st,ale-off = <0x20000>;
-			st,cle-off = <0x10000>;
 			status = "disabled";
 		};
 
arch/arm/boot/dts/spear300.dtsi +4 -4
index ed3627c..bc43638 100644
@@ -38,10 +38,10 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			reg = <0x94000000 0x1000	/* FSMC Register */
-			       0x80000000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off = <0x20000>;
-			st,cle-off = <0x10000>;
+			       0x80000000 0x0010	/* NAND Base DATA */
+			       0x80020000 0x0010	/* NAND Base ADDR */
+			       0x80010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 			status = "disabled";
 		};
 
arch/arm/boot/dts/spear310.dtsi +4 -4
index 62fc4fb..7840e52 100644
@@ -32,10 +32,10 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			reg = <0x44000000 0x1000	/* FSMC Register */
-			       0x40000000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off = <0x10000>;
-			st,cle-off = <0x20000>;
+			       0x40000000 0x0010	/* NAND Base DATA */
+			       0x40020000 0x0010	/* NAND Base ADDR */
+			       0x40010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 			status = "disabled";
 		};
 
arch/arm/boot/dts/spear320.dtsi +4 -4
index 1f49d69..5ad8206 100644
@@ -38,10 +38,10 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			reg = <0x4c000000 0x1000	/* FSMC Register */
-			       0x50000000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off = <0x20000>;
-			st,cle-off = <0x10000>;
+			       0x50000000 0x0010	/* NAND Base DATA */
+			       0x50020000 0x0010	/* NAND Base ADDR */
+			       0x50010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 			status = "disabled";
 		};
 
arch/arm/boot/dts/spear600.dtsi +4 -4
index a3c36e4..4ecc66f 100644
@@ -67,10 +67,10 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			reg = <0xd1800000 0x1000	/* FSMC Register */
-			       0xd2000000 0x4000>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off = <0x20000>;
-			st,cle-off = <0x10000>;
+			       0xd2000000 0x0010	/* NAND Base DATA */
+			       0xd2020000 0x0010	/* NAND Base ADDR */
+			       0xd2010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 			status = "disabled";
 		};
 
arch/arm/mach-u300/core.c +12 -2
index ef6f602..527bcc2 100644
@@ -252,6 +252,18 @@ static struct resource rtc_resources[] = {
  */
 static struct resource fsmc_resources[] = {
 	{
+		.name  = "nand_addr",
+		.start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE,
+		.end   = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE + SZ_16K - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	{
+		.name  = "nand_cmd",
+		.start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE,
+		.end   = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE + SZ_16K - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	{
 		.name  = "nand_data",
 		.start = U300_NAND_CS0_PHYS_BASE,
 		.end   = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1,
@@ -1496,8 +1508,6 @@ static struct fsmc_nand_platform_data nand_platform_data = {
 	.nr_partitions = ARRAY_SIZE(u300_partitions),
 	.options = NAND_SKIP_BBTSCAN,
 	.width = FSMC_NAND_BW8,
-	.ale_off = PLAT_NAND_ALE,
-	.cle_off = PLAT_NAND_CLE,
 };
 
 static struct platform_device nand_device = {
drivers/mtd/nand/fsmc_nand.c +11 -33

74 lines not on this page · raw message

include/linux/mtd/fsmc.h +0 -3
index b200292..d6ed61e 100644
@@ -155,9 +155,6 @@ struct fsmc_nand_platform_data {
 	unsigned int		width;
 	unsigned int		bank;
 
-	/* CLE, ALE offsets */
-	unsigned int		cle_off;
-	unsigned int		ale_off;
 	enum access_mode	mode;
 
 	void			(*select_bank)(uint32_t bank, uint32_t busw);
Signature · 1 line
1.7.10.4
#1 lore raw

PATCH 1/1 mtd: st fsmc_nand: pass the ale and cmd resource via resource

Quoted 9 lines · Jean-Christophe PLAGNIOL-VILLARD

Do not use the platform_data to pass resource and be smart in the drivers. Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Cc Linus Walleij <[email protected]>
Cc Vipin Kumar <[email protected]>
Cc linux-mtd at lists.infradead.org

This is much better. Actually I was confused by these offsets recently...

My patch to convert the Nomadik to the FSMC driver will collide with this, but I can sure fix it up as we run into it, no big deal.

Yours,
Linus Walleij

#2 lore raw

PATCH 1/1 mtd: st fsmc_nand: pass the ale and cmd resource via resource

Quoted 14 lines · Linus Walleij
Quoted 9 lines · Jean-Christophe PLAGNIOL-VILLARD

Do not use the platform_data to pass resource and be smart in the drivers. Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Cc Linus Walleij <[email protected]>
Cc Vipin Kumar <[email protected]>
Cc linux-mtd at lists.infradead.org
Quoted 5 lines

This is much better. Actually I was confused by these offsets recently...

My patch to convert the Nomadik to the FSMC driver will collide with this, but I can sure fix it up as we run into it, no big deal.

ha you did it too

I'll give it a try

Best Regards,
J.

#3 lore raw

PATCH 1/1 mtd: st fsmc_nand: pass the ale and cmd resource via resource

In reply to Jean-Christophe PLAGNIOL-VILLARD
Quoted 270 lines · Jean-Christophe PLAGNIOL-VILLARD

Do not use the platform_data to pass resource and be smart in the drivers. Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Cc Linus Walleij<[email protected]>
Cc Vipin Kumar<[email protected]>
Cc linux-mtd at lists.infradead.org
---
  .../devicetree/bindings/mtd/fsmc-nand.txt          |   12 +++---
  arch/arm/boot/dts/spear13xx.dtsi                   |   10 ++---
  arch/arm/boot/dts/spear300.dtsi                    |    8 ++--
  arch/arm/boot/dts/spear310.dtsi                    |    8 ++--
  arch/arm/boot/dts/spear320.dtsi                    |    8 ++--
  arch/arm/boot/dts/spear600.dtsi                    |    8 ++--
  arch/arm/mach-u300/core.c                          |   14 ++++++-
  drivers/mtd/nand/fsmc_nand.c                       |   44 +++++---------------
  include/linux/mtd/fsmc.h                           |    3 --
  9 files changed, 49 insertions(+), 66 deletions(-)
Documentation/devicetree/bindings/mtd/fsmc-nand.txt +5 -7
index e2c663b..e3ea32e 100644
@@ -3,9 +3,7 @@
  Required properties:
  - compatible : "st,spear600-fsmc-nand"
  - reg : Address range of the mtd chip
-- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"
-- st,ale-off : Chip specific offset to ALE
-- st,cle-off : Chip specific offset to CLE
+- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
 
  Optional properties:
  - bank-width : Width (in bytes) of the device.  If not present, the width
@@ -19,10 +17,10 @@ Example:
  		#address-cells =<1>;
  		#size-cells =<1>;
  		reg =<0xd1800000 0x1000	/* FSMC Register */
-		       0xd2000000 0x4000>;	/* NAND Base */
-		reg-names = "fsmc_regs", "nand_data";
-		st,ale-off =<0x20000>;
-		st,cle-off =<0x10000>;
+		       0xd2000000 0x0010	/* NAND Base DATA */
+		       0xd2020000 0x0010	/* NAND Base ADDR */
+		       0xd2010000 0x0010>;	/* NAND Base CMD */
+		reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 
  		bank-width =<1>;
  		nand-skip-bbtscan;
arch/arm/boot/dts/spear13xx.dtsi +5 -5
index f7b84ac..14a6d15 100644
@@ -104,15 +104,15 @@
  			compatible = "st,spear600-fsmc-nand";
  			#address-cells =<1>;
  			#size-cells =<1>;
-			reg =<0xb0000000 0x1000	/* FSMC Register */
-			       0xb0800000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
+			reg =<0xb0000000 0x1000	/* FSMC Register*/
+			       0xb0800000 0x0010	/* NAND Base DATA */
+			       0xb0820000 0x0010	/* NAND Base ADDR */
+			       0xb0810000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  			interrupts =<0 20 0x4
  				      0 21 0x4
  				      0 22 0x4
  				      0 23 0x4>;
-			st,ale-off =<0x20000>;
-			st,cle-off =<0x10000>;
  			status = "disabled";
  		};
 
arch/arm/boot/dts/spear300.dtsi +4 -4
index ed3627c..bc43638 100644
@@ -38,10 +38,10 @@
  			#address-cells =<1>;
  			#size-cells =<1>;
  			reg =<0x94000000 0x1000	/* FSMC Register */
-			       0x80000000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off =<0x20000>;
-			st,cle-off =<0x10000>;
+			       0x80000000 0x0010	/* NAND Base DATA */
+			       0x80020000 0x0010	/* NAND Base ADDR */
+			       0x80010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  			status = "disabled";
  		};
 
arch/arm/boot/dts/spear310.dtsi +4 -4
index 62fc4fb..7840e52 100644
@@ -32,10 +32,10 @@
  			#address-cells =<1>;
  			#size-cells =<1>;
  			reg =<0x44000000 0x1000	/* FSMC Register */
-			       0x40000000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off =<0x10000>;
-			st,cle-off =<0x20000>;
+			       0x40000000 0x0010	/* NAND Base DATA */
+			       0x40020000 0x0010	/* NAND Base ADDR */
+			       0x40010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  			status = "disabled";
  		};
 
arch/arm/boot/dts/spear320.dtsi +4 -4
index 1f49d69..5ad8206 100644
@@ -38,10 +38,10 @@
  			#address-cells =<1>;
  			#size-cells =<1>;
  			reg =<0x4c000000 0x1000	/* FSMC Register */
-			       0x50000000 0x0010>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off =<0x20000>;
-			st,cle-off =<0x10000>;
+			       0x50000000 0x0010	/* NAND Base DATA */
+			       0x50020000 0x0010	/* NAND Base ADDR */
+			       0x50010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  			status = "disabled";
  		};
 
arch/arm/boot/dts/spear600.dtsi +4 -4
index a3c36e4..4ecc66f 100644
@@ -67,10 +67,10 @@
  			#address-cells =<1>;
  			#size-cells =<1>;
  			reg =<0xd1800000 0x1000	/* FSMC Register */
-			       0xd2000000 0x4000>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off =<0x20000>;
-			st,cle-off =<0x10000>;
+			       0xd2000000 0x0010	/* NAND Base DATA */
+			       0xd2020000 0x0010	/* NAND Base ADDR */
+			       0xd2010000 0x0010>;	/* NAND Base CMD */
+			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  			status = "disabled";
  		};
 
arch/arm/mach-u300/core.c +12 -2
index ef6f602..527bcc2 100644
@@ -252,6 +252,18 @@ static struct resource rtc_resources[] = {
   */
  static struct resource fsmc_resources[] = {
  	{
+		.name  = "nand_addr",
+		.start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE,
+		.end   = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE + SZ_16K - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	{
+		.name  = "nand_cmd",
+		.start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE,
+		.end   = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE + SZ_16K - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	{
  		.name  = "nand_data",
  		.start = U300_NAND_CS0_PHYS_BASE,
  		.end   = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1,
@@ -1496,8 +1508,6 @@ static struct fsmc_nand_platform_data nand_platform_data = {
  	.nr_partitions = ARRAY_SIZE(u300_partitions),
  	.options = NAND_SKIP_BBTSCAN,
  	.width = FSMC_NAND_BW8,
-	.ale_off = PLAT_NAND_ALE,
-	.cle_off = PLAT_NAND_CLE,
  };
 
  static struct platform_device nand_device = {
drivers/mtd/nand/fsmc_nand.c +11 -33
index 38d2624..cb86450 100644
@@ -876,8 +876,6 @@ static int __devinit fsmc_nand_probe_config_dt(struct platform_device *pdev,
  			return -EINVAL;
  		}
  	}
-	of_property_read_u32(np, "st,ale-off",&pdata->ale_off);
-	of_property_read_u32(np, "st,cle-off",&pdata->cle_off);
  	if (of_get_property(np, "nand-skip-bbtscan", NULL))
  		pdata->options = NAND_SKIP_BBTSCAN;
 
@@ -935,41 +933,28 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
  	if (!res)
  		return -EINVAL;
 
-	if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
-				pdev->name)) {
-		dev_err(&pdev->dev, "Failed to get memory data resourse\n");
-		return -ENOENT;
-	}
-
-	host->data_pa = (dma_addr_t)res->start;
-	host->data_va = devm_ioremap(&pdev->dev, res->start,
-			resource_size(res));
+	host->data_va = devm_request_and_ioremap(&pdev->dev, res);
  	if (!host->data_va) {
  		dev_err(&pdev->dev, "data ioremap failed\n");
  		return -ENOMEM;
  	}
+	host->data_pa = (dma_addr_t)res->start;
 
-	if (!devm_request_mem_region(&pdev->dev, res->start + pdata->ale_off,
-			resource_size(res), pdev->name)) {
-		dev_err(&pdev->dev, "Failed to get memory ale resourse\n");
-		return -ENOENT;
-	}
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_addr");
+	if (!res)
+		return -EINVAL;
 
-	host->addr_va = devm_ioremap(&pdev->dev, res->start + pdata->ale_off,
-			resource_size(res));
+	host->addr_va = devm_request_and_ioremap(&pdev->dev, res);
  	if (!host->addr_va) {
  		dev_err(&pdev->dev, "ale ioremap failed\n");
  		return -ENOMEM;
  	}
 
-	if (!devm_request_mem_region(&pdev->dev, res->start + pdata->cle_off,
-			resource_size(res), pdev->name)) {
-		dev_err(&pdev->dev, "Failed to get memory cle resourse\n");
-		return -ENOENT;
-	}
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_cmd");
+	if (!res)
+		return -EINVAL;
 
-	host->cmd_va = devm_ioremap(&pdev->dev, res->start + pdata->cle_off,
-			resource_size(res));
+	host->cmd_va = devm_request_and_ioremap(&pdev->dev, res);
  	if (!host->cmd_va) {
  		dev_err(&pdev->dev, "ale ioremap failed\n");
  		return -ENOMEM;
@@ -979,14 +964,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
  	if (!res)
  		return -EINVAL;
 
-	if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
-			pdev->name)) {
-		dev_err(&pdev->dev, "Failed to get memory regs resourse\n");
-		return -ENOENT;
-	}
-
-	host->regs_va = devm_ioremap(&pdev->dev, res->start,
-			resource_size(res));
+	host->regs_va = devm_request_and_ioremap(&pdev->dev, res);
  	if (!host->regs_va) {
  		dev_err(&pdev->dev, "regs ioremap failed\n");
  		return -ENOMEM;
include/linux/mtd/fsmc.h +0 -0
index b200292..d6ed61e 100644

include/linux/mtd/fsmc.h struct fsmc_nand_platform_data { · line 160

Quoted 9 lines
include/linux/mtd/fsmc.h +0 -3
@@ -155,9 +155,6 @@ struct fsmc_nand_platform_data {
  	unsigned int		width;
  	unsigned int		bank;
 
-	/* CLE, ALE offsets */
-	unsigned int		cle_off;
-	unsigned int		ale_off;
  	enum access_mode	mode;
 
  	void			(*select_bank)(uint32_t bank, uint32_t busw);

btw, I also have a few pending patches on this driver which I would be sending soon

Reviewed By: Vipin Kumar <[email protected]>

#4 lore raw

PATCH 1/1 mtd: st fsmc_nand: pass the ale and cmd resource via resource

In reply to Jean-Christophe PLAGNIOL-VILLARD
Quoted 6 lines · Jean-Christophe PLAGNIOL-VILLARD

Do not use the platform_data to pass resource and be smart in the drivers. Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Pushed to l2-mtd.git, thanks!

Signature · 9 lines
Best Regards,
Artem Bityutskiy
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