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i.MX: Allow pad configuration arrays to be const

PATCH New Eric Nelson 2 participants 4 messages Oct 3, 2012 – Oct 10, 2012

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#0 lore raw

cover i.MX: Allow pad configuration arrays to be const

This will keep static initialization data in the text segment.

#1 lore raw

PATCH 1/2 i.MX: iomux: input pad array can be const

---
 arch/arm/imx-common/iomux-v3.c             |    3 ++-
 arch/arm/include/asm/imx-common/iomux-v3.h |    3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)
arch/arm/imx-common/iomux-v3.c +2 -1
index da093fb..fb797fe 100644
@@ -54,7 +54,8 @@ int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
 	return 0;
 }
 
-int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count)
+int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+				     unsigned count)
 {
 	iomux_v3_cfg_t *p = pad_list;
 	int i;
arch/arm/include/asm/imx-common/iomux-v3.h +2 -1
index 4558f4f..c34bb76 100644
@@ -98,6 +98,7 @@ typedef u64 iomux_v3_cfg_t;
 #define MUX_CONFIG_SION		(0x1 << 4)
 
 int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
-int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count);
+int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+				     unsigned count);
 
 #endif	/* __MACH_IOMUX_V3_H__*/
Signature · 1 line
1.7.9
#2 lore raw

PATCH 2/2 i.MX: declare iomux_v3_cfg_t arrays as const

In reply to Eric Nelson
---
 board/freescale/mx6qarm2/mx6qarm2.c           |    8 ++++----
 board/freescale/mx6qsabreauto/mx6qsabreauto.c |    6 +++---
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   18 +++++++++---------
 board/freescale/mx6qsabresd/mx6qsabresd.c     |    6 +++---
 board/genesi/mx51_efikamx/efikamx.c           |   16 ++++++++--------
 5 files changed, 27 insertions(+), 27 deletions(-)
board/freescale/mx6qarm2/mx6qarm2.c +4 -4
index d43b327..b6b3542 100644
@@ -53,12 +53,12 @@ int dram_init(void)
 	return 0;
 }
 
-iomux_v3_cfg_t uart4_pads[] = {
+iomux_v3_cfg_t const uart4_pads[] = {
 	MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 	MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t usdhc3_pads[] = {
+iomux_v3_cfg_t const usdhc3_pads[] = {
 	MX6Q_PAD_SD3_CLK__USDHC3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD3_CMD__USDHC3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -72,7 +72,7 @@ iomux_v3_cfg_t usdhc3_pads[] = {
 	MX6Q_PAD_NANDF_CS0__GPIO_6_11  | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
 };
 
-iomux_v3_cfg_t usdhc4_pads[] = {
+iomux_v3_cfg_t const usdhc4_pads[] = {
 	MX6Q_PAD_SD4_CLK__USDHC4_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD4_CMD__USDHC4_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -85,7 +85,7 @@ iomux_v3_cfg_t usdhc4_pads[] = {
 	MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 };
 
-iomux_v3_cfg_t enet_pads[] = {
+iomux_v3_cfg_t const enet_pads[] = {
 	MX6Q_PAD_KEY_COL1__ENET_MDIO        | MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_KEY_COL2__ENET_MDC         | MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC  | MUX_PAD_CTRL(ENET_PAD_CTRL),
board/freescale/mx6qsabreauto/mx6qsabreauto.c +3 -3
index fcd83dc..25d8fe5 100644
@@ -51,12 +51,12 @@ int dram_init(void)
 	return 0;
 }
 
-iomux_v3_cfg_t uart4_pads[] = {
+iomux_v3_cfg_t const uart4_pads[] = {
 	MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 	MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t enet_pads[] = {
+iomux_v3_cfg_t const enet_pads[] = {
 	MX6Q_PAD_KEY_COL1__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_KEY_COL2__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC	| MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -79,7 +79,7 @@ static void setup_iomux_enet(void)
 	imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
 }
 
-iomux_v3_cfg_t usdhc3_pads[] = {
+iomux_v3_cfg_t const usdhc3_pads[] = {
 	MX6Q_PAD_SD3_CLK__USDHC3_CLK	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD3_CMD__USDHC3_CMD	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
board/freescale/mx6qsabrelite/mx6qsabrelite.c +9 -9
index 4b4e89b..4b6e9f7 100644
@@ -70,12 +70,12 @@ int dram_init(void)
        return 0;
 }
 
-iomux_v3_cfg_t uart1_pads[] = {
+iomux_v3_cfg_t const uart1_pads[] = {
 	MX6Q_PAD_SD3_DAT6__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 	MX6Q_PAD_SD3_DAT7__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t uart2_pads[] = {
+iomux_v3_cfg_t const uart2_pads[] = {
        MX6Q_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
        MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
@@ -124,7 +124,7 @@ struct i2c_pads_info i2c_pad_info2 = {
 	}
 };
 
-iomux_v3_cfg_t usdhc3_pads[] = {
+iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6Q_PAD_SD3_CLK__USDHC3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6Q_PAD_SD3_CMD__USDHC3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -134,7 +134,7 @@ iomux_v3_cfg_t usdhc3_pads[] = {
        MX6Q_PAD_SD3_DAT5__GPIO_7_0    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
 };
 
-iomux_v3_cfg_t usdhc4_pads[] = {
+iomux_v3_cfg_t const usdhc4_pads[] = {
        MX6Q_PAD_SD4_CLK__USDHC4_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6Q_PAD_SD4_CMD__USDHC4_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -144,7 +144,7 @@ iomux_v3_cfg_t usdhc4_pads[] = {
        MX6Q_PAD_NANDF_D6__GPIO_2_6    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
 };
 
-iomux_v3_cfg_t enet_pads1[] = {
+iomux_v3_cfg_t const enet_pads1[] = {
 	MX6Q_PAD_ENET_MDIO__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_ENET_MDC__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC	| MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -170,7 +170,7 @@ iomux_v3_cfg_t enet_pads1[] = {
 	MX6Q_PAD_EIM_D23__GPIO_3_23		| MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
-iomux_v3_cfg_t enet_pads2[] = {
+iomux_v3_cfg_t const enet_pads2[] = {
 	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC	| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0	| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1	| MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -180,7 +180,7 @@ iomux_v3_cfg_t enet_pads2[] = {
 };
 
 /* Button assignments for J14 */
-static iomux_v3_cfg_t button_pads[] = {
+static iomux_v3_cfg_t const button_pads[] = {
 	/* Menu */
 	MX6Q_PAD_NANDF_D1__GPIO_2_1	| MUX_PAD_CTRL(BUTTON_PAD_CTRL),
 	/* Back */
@@ -213,7 +213,7 @@ static void setup_iomux_enet(void)
 	imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2));
 }
 
-iomux_v3_cfg_t usb_pads[] = {
+iomux_v3_cfg_t const usb_pads[] = {
 	MX6Q_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
@@ -294,7 +294,7 @@ u32 get_board_rev(void)
 }
 
 #ifdef CONFIG_MXC_SPI
-iomux_v3_cfg_t ecspi1_pads[] = {
+iomux_v3_cfg_t const ecspi1_pads[] = {
 	/* SS1 */
 	MX6Q_PAD_EIM_D19__GPIO_3_19   | MUX_PAD_CTRL(SPI_PAD_CTRL),
 	MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
board/freescale/mx6qsabresd/mx6qsabresd.c +3 -3
index 03a6857..745d398 100644
@@ -51,12 +51,12 @@ int dram_init(void)
 	return 0;
 }
 
-iomux_v3_cfg_t uart1_pads[] = {
+iomux_v3_cfg_t const uart1_pads[] = {
 	MX6Q_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 	MX6Q_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-iomux_v3_cfg_t enet_pads[] = {
+iomux_v3_cfg_t const enet_pads[] = {
 	MX6Q_PAD_ENET_MDIO__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_ENET_MDC__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC	| MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -86,7 +86,7 @@ static void setup_iomux_enet(void)
 	gpio_set_value(IMX_GPIO_NR(1, 25), 1);
 }
 
-iomux_v3_cfg_t usdhc3_pads[] = {
+iomux_v3_cfg_t const usdhc3_pads[] = {
 	MX6Q_PAD_SD3_CLK__USDHC3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD3_CMD__USDHC3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
board/genesi/mx51_efikamx/efikamx.c +8 -8
index cfd2e93..f7c87b5 100644
@@ -93,7 +93,7 @@ static u32 get_mx_rev(void)
 	return (~rev & 0x7) + 1;
 }
 
-static iomux_v3_cfg_t efikasb_revision_pads[] = {
+static iomux_v3_cfg_t const efikasb_revision_pads[] = {
 	MX51_PAD_EIM_CS3__GPIO2_28,
 	MX51_PAD_EIM_CS4__GPIO2_29,
 };
@@ -140,7 +140,7 @@ int dram_init(void)
 /*
  * UART configuration
  */
-static iomux_v3_cfg_t efikamx_uart_pads[] = {
+static iomux_v3_cfg_t const efikamx_uart_pads[] = {
 	MX51_PAD_UART1_RXD__UART1_RXD,
 	MX51_PAD_UART1_TXD__UART1_TXD,
 	MX51_PAD_UART1_RTS__UART1_RTS,
@@ -150,7 +150,7 @@ static iomux_v3_cfg_t efikamx_uart_pads[] = {
 /*
  * SPI configuration
  */
-static iomux_v3_cfg_t efikamx_spi_pads[] = {
+static iomux_v3_cfg_t const efikamx_spi_pads[] = {
 	MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
 	MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
 	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
@@ -272,7 +272,7 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = {
 	{MMC_SDHC2_BASE_ADDR},
 };
 
-static iomux_v3_cfg_t efikamx_sdhc1_pads[] = {
+static iomux_v3_cfg_t const efikamx_sdhc1_pads[] = {
 	MX51_PAD_SD1_CMD__SD1_CMD,
 	MX51_PAD_SD1_CLK__SD1_CLK,
 	MX51_PAD_SD1_DATA0__SD1_DATA0,
@@ -284,7 +284,7 @@ static iomux_v3_cfg_t efikamx_sdhc1_pads[] = {
 
 #define EFIKAMX_SDHC1_WP	IMX_GPIO_NR(1, 1)
 
-static iomux_v3_cfg_t efikamx_sdhc1_cd_pads[] = {
+static iomux_v3_cfg_t const efikamx_sdhc1_cd_pads[] = {
 	MX51_PAD_GPIO1_0__SD1_CD,
 	MX51_PAD_EIM_CS2__SD1_CD,
 };
@@ -292,7 +292,7 @@ static iomux_v3_cfg_t efikamx_sdhc1_cd_pads[] = {
 #define EFIKAMX_SDHC1_CD	IMX_GPIO_NR(1, 0)
 #define EFIKASB_SDHC1_CD	IMX_GPIO_NR(2, 27)
 
-static iomux_v3_cfg_t efikasb_sdhc2_pads[] = {
+static iomux_v3_cfg_t const efikasb_sdhc2_pads[] = {
 	MX51_PAD_SD2_CMD__SD2_CMD,
 	MX51_PAD_SD2_CLK__SD2_CLK,
 	MX51_PAD_SD2_DATA0__SD2_DATA0,
@@ -368,7 +368,7 @@ int board_mmc_init(bd_t *bis)
 /*
  * PATA
  */
-static iomux_v3_cfg_t efikamx_pata_pads[] = {
+static iomux_v3_cfg_t const efikamx_pata_pads[] = {
 	MX51_PAD_NANDF_WE_B__PATA_DIOW,
 	MX51_PAD_NANDF_RE_B__PATA_DIOR,
 	MX51_PAD_NANDF_ALE__PATA_BUFFER_EN,
@@ -419,7 +419,7 @@ static inline void setup_iomux_usb(void) { }
 #define EFIKAMX_LED_GREEN	IMX_GPIO_NR(3, 14)
 #define EFIKAMX_LED_RED		IMX_GPIO_NR(3, 15)
 
-static iomux_v3_cfg_t efikasb_led_pads[] = {
+static iomux_v3_cfg_t const efikasb_led_pads[] = {
 	MX51_PAD_GPIO1_3__GPIO1_3,
 	MX51_PAD_EIM_CS0__GPIO2_25,
 };
Signature · 1 line
1.7.9
#3 lore raw

PATCH 2/2 i.MX: declare iomux_v3_cfg_t arrays as const

Quoted 9 lines · Eric Nelson
---
 board/freescale/mx6qarm2/mx6qarm2.c           |    8 ++++----
 board/freescale/mx6qsabreauto/mx6qsabreauto.c |    6 +++---
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   18 +++++++++---------
 board/freescale/mx6qsabresd/mx6qsabresd.c     |    6 +++---
 board/genesi/mx51_efikamx/efikamx.c           |   16 ++++++++--------
 5 files changed, 27 insertions(+), 27 deletions(-)

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
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