mx25pdk: Include CONFIG_MX25
PATCH 1/3 mx25pdk: Include CONFIG_MX25
From: Fabio Estevam <[email protected]>
It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC differences based on the this config option.
Signed-off-by Fabio Estevam <[email protected]>
--- include/configs/mx25pdk.h | 1 + 1 file changed, 1 insertion(+)
include/configs/mx25pdk.h +1 -0
@@ -17,6 +17,7 @@/* High Level Configuration Options */ +#define CONFIG_MX25 #define CONFIG_SYS_HZ 1000#define CONFIG_SYS_TEXT_BASE 0x81200000
Signature · 1 line
1.7.9.5
PATCH 2/3 mx25pdk: Add esdhc support
From: Fabio Estevam <[email protected]>
mx25pdk has a SD/MMC slot connected to esdhc1.
Add support for it and allow the environment variables to be saved into SD/MMC.
Signed-off-by Fabio Estevam <[email protected]>
--- board/freescale/mx25pdk/mx25pdk.c | 51 +++++++++++++++++++++++++++++++++++++ include/configs/mx25pdk.h | 16 +++++++++++- 2 files changed, 66 insertions(+), 1 deletion(-)
board/freescale/mx25pdk/mx25pdk.c +51 -0
@@ -19,12 +19,23 @@#include <common.h> #include <asm/io.h> +#include <asm/gpio.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> #include <asm/arch/sys_proto.h> +#include <mmc.h> +#include <fsl_esdhc.h> + +#define CARD_DETECT IMX_GPIO_NR(2, 1)DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1 ] = { + {IMX_MMC_SDHC1_BASE }, +}; +#endif +int dram_init (void ) {/* dram_init must store complete ramsize in gd->ram_size */
@@ -48,6 +59,46 @@ int board_init(void)return 0 ; } +#ifdef CONFIG_FSL_ESDHC +int board_mmc_getcd (struct mmc *mmc) +{ +struct iomuxc_mux_ctl *muxctl; +struct iomuxc_pad_ctl *padctl; +u32 gpio_mux_mode =MX25_PIN_MUX_MODE (5 ); + +/* +* Set up the Card Detect pin. +* +* SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15 +* +*/ + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE ; + +writel (gpio_mux_mode, &muxctl->pad_a15); +writel (0x0 , &padctl->pad_a15); + +gpio_direction_input (CARD_DETECT ); +return !gpio_get_value (CARD_DETECT ); +} + +int board_mmc_init (bd_t *bis) +{ +struct iomuxc_mux_ctl *muxctl; +u32 sdhc1_mux_mode =MX25_PIN_MUX_MODE (0 ) |MX25_PIN_MUX_SION ; + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; +writel (sdhc1_mux_mode, &muxctl->pad_sd1_cmd); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_clk); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data0); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data1); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data2); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data3); + +return fsl_esdhc_initialize (bis, &esdhc_cfg[0 ]); +} +#endif +int checkboard (void ) {puts ("Board: MX25PDK\n" );
include/configs/mx25pdk.h +15 -1
@@ -20,6 +20,7 @@#define CONFIG_MX25 #define CONFIG_SYS_HZ 1000#define CONFIG_SYS_TEXT_BASE 0x81200000 +#define CONFIG_MXC_GPIO #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
@@ -58,9 +59,10 @@/* No NOR flash present */ #define CONFIG_ENV_OFFSET (6 * 64 * 1024)#define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0/* U-Boot general configuration */ #define CONFIG_SYS_PROMPT "MX25PDK U-Boot > "
@@ -78,6 +80,9 @@/* U-Boot commands */ #include <config_cmd_default.h> #define CONFIG_CMD_CACHE +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT /* Ethernet */ #define CONFIG_FEC_MXC
@@ -86,6 +91,15 @@#define CONFIG_CMD_NET #define CONFIG_ENV_OVERWRITE +/* ESDHC driver */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 1 + +#define CONFIG_DOS_PARTITION +#define CONFIG_BOOTDELAY 3#define CONFIG_LOADADDR 0x81000000/* loadaddr env var */
Signature · 1 line
1.7.9.5
PATCH 2/3 mx25pdk: Add esdhc support
Am 11/10/2012 05:58, schrieb Fabio Estevam:
Quoted 8 lines
From: Fabio Estevam <[email protected]>
mx25pdk has a SD/MMC slot connected to esdhc1.
Add support for it and allow the environment variables to be saved into SD/MMC.
Signed-off-by Fabio Estevam <[email protected]>---
Hi Fabio,
Quoted 62 lines
board/freescale/mx25pdk/mx25pdk.c | 51 +++++++++++++++++++++++++++++++++++++ include/configs/mx25pdk.h | 16 +++++++++++- 2 files changed, 66 insertions(+), 1 deletion(-)board/freescale/mx25pdk/mx25pdk.c +37
-0@@ -19,12 +19,23 @@#include <common.h> #include <asm/io.h> +#include <asm/gpio.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> #include <asm/arch/sys_proto.h> +#include <mmc.h> +#include <fsl_esdhc.h> + +#define CARD_DETECT IMX_GPIO_NR(2, 1)DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1 ] = { + {IMX_MMC_SDHC1_BASE }, +}; +#endif +int dram_init (void ) {/* dram_init must store complete ramsize in gd->ram_size */ @@ -48,6 +59,46 @@ int board_init(void)return 0 ; } +#ifdef CONFIG_FSL_ESDHC +int board_mmc_getcd (struct mmc *mmc) +{ +struct iomuxc_mux_ctl *muxctl; +struct iomuxc_pad_ctl *padctl; +u32 gpio_mux_mode =MX25_PIN_MUX_MODE (5 ); + +/* +* Set up the Card Detect pin. +* +* SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15 +* +*/ + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE ; + +writel (gpio_mux_mode, &muxctl->pad_a15); +writel (0x0 , &padctl->pad_a15); + +gpio_direction_input (CARD_DETECT ); +return !gpio_get_value (CARD_DETECT ); +} + +int board_mmc_init (bd_t *bis) +{ +struct iomuxc_mux_ctl *muxctl;
board/freescale/mx25pdk/mx25pdk.c int board_init(void) · line 97
Quoted 10 lines
board/freescale/mx25pdk/mx25pdk.c +10
-0+u32 sdhc1_mux_mode =MX25_PIN_MUX_MODE (0 ) |MX25_PIN_MUX_SION ; + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; +writel (sdhc1_mux_mode, &muxctl->pad_sd1_cmd); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_clk); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data0); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data1); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data2); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data3); +
You need also to set up the SDHC clock. This comes after merging:
http://patchwork.ozlabs.org/patch/188329/
Adding
esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
before calling fsl_esdhc_initialize() should be enough.
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 2/3 mx25pdk: Add esdhc support
Quoted 90 lines · Stefano Babic
Am 11/10/2012 05:58, schrieb Fabio Estevam:
Quoted 9 lines
From: Fabio Estevam <[email protected]>
mx25pdk has a SD/MMC slot connected to esdhc1.
Add support for it and allow the environment variables to be saved into SD/MMC.
Signed-off-by Fabio Estevam <[email protected]>---
Hi Fabio,
Quoted 64 lines
board/freescale/mx25pdk/mx25pdk.c | 51 +++++++++++++++++++++++++++++++++++++ include/configs/mx25pdk.h | 16 +++++++++++- 2 files changed, 66 insertions(+), 1 deletion(-)board/freescale/mx25pdk/mx25pdk.c +37
-0@@ -19,12 +19,23 @@#include <common.h> #include <asm/io.h> +#include <asm/gpio.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> #include <asm/arch/sys_proto.h> +#include <mmc.h> +#include <fsl_esdhc.h> + +#define CARD_DETECT IMX_GPIO_NR(2, 1)DECLARE_GLOBAL_DATA_PTR ; +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1 ] = { + {IMX_MMC_SDHC1_BASE }, +}; +#endif +int dram_init (void ) {/* dram_init must store complete ramsize in gd->ram_size */ @@ -48,6 +59,46 @@ int board_init(void)return 0 ; } +#ifdef CONFIG_FSL_ESDHC +int board_mmc_getcd (struct mmc *mmc) +{ +struct iomuxc_mux_ctl *muxctl; +struct iomuxc_pad_ctl *padctl; +u32 gpio_mux_mode =MX25_PIN_MUX_MODE (5 ); + +/* +* Set up the Card Detect pin. +* +* SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15 +* +*/ + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE ; + +writel (gpio_mux_mode, &muxctl->pad_a15); +writel (0x0 , &padctl->pad_a15); + +gpio_direction_input (CARD_DETECT ); +return !gpio_get_value (CARD_DETECT ); +} + +int board_mmc_init (bd_t *bis) +{ +struct iomuxc_mux_ctl *muxctl;board/freescale/mx25pdk/mx25pdk.c int board_init(void) · line 97
Quoted 10 lines
board/freescale/mx25pdk/mx25pdk.c +10
-0+u32 sdhc1_mux_mode =MX25_PIN_MUX_MODE (0 ) |MX25_PIN_MUX_SION ; + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; +writel (sdhc1_mux_mode, &muxctl->pad_sd1_cmd); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_clk); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data0); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data1); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data2); +writel (sdhc1_mux_mode, &muxctl->pad_sd1_data3); +You need also to set up the SDHC clock. This comes after merging:
Quoted 6 lines
http://patchwork.ozlabs.org/patch/188329/Adding
esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);before calling
fsl_esdhc_initialize()should be enough.
Adding
#include <asm/arch/clock.h>
is also needed.
Best regards,
Beno?t
PATCH 3/3 mx25pdk: Add FEC support
In reply to Fabio EstevamFrom: Fabio Estevam <[email protected]>
mx25pdk has a Ethernet port that is connected to its internal FEC controller.
In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the PMIC via I2C.
Make FEC ethernet functional.
Signed-off-by Fabio Estevam <[email protected]>
--- board/freescale/mx25pdk/mx25pdk.c | 64 +++++++++++++++++++++++++++++++++++++ include/configs/mx25pdk.h | 15 +++++++++ 2 files changed, 79 insertions(+)
board/freescale/mx25pdk/mx25pdk.c +64 -0
@@ -25,6 +25,13 @@#include <asm/arch/sys_proto.h> #include <mmc.h> #include <fsl_esdhc.h> +#include <i2c.h> + +#define FEC_RESET_B IMX_GPIO_NR(2, 3) +#define FEC_ENABLE_B IMX_GPIO_NR(4, 8) +#define CARD_DETECT IMX_GPIO_NR(2, 1) +#define PMIC_I2C_ADDR 0x54 +#define REG_PHY_3V3 0x02#define CARD_DETECT IMX_GPIO_NR(2, 1)
@@ -36,6 +43,47 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = { };#endif +static void mx25pdk_fec_init (void ) +{ +struct iomuxc_mux_ctl *muxctl; +struct iomuxc_pad_ctl *padctl; +u32 gpio_mux_mode =MX25_PIN_MUX_MODE (5 ); +u32 gpio_mux_mode0_sion =MX25_PIN_MUX_MODE (0 ) |MX25_PIN_MUX_SION ; + +/* FEC pin init is generic */ +mx25_fec_init_pins (); + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE ; +/* +* Set up FEC_RESET_B and FEC_ENABLE_B +* +* FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12 +* FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17 +*/ +writel (gpio_mux_mode, &muxctl->pad_d12); +writel (gpio_mux_mode, &muxctl->pad_a17); + +writel (0x0 , &padctl->pad_d12); +writel (0x0 , &padctl->pad_a17); + +/* Assert RESET and ENABLE low */ +gpio_direction_output (FEC_RESET_B ,0 ); +gpio_direction_output (FEC_ENABLE_B ,0 ); + +udelay (10 ); + +/* Deassert RESET and ENABLE */ +gpio_set_value (FEC_RESET_B ,1 ); +gpio_set_value (FEC_ENABLE_B ,1 ); + +/* Setup I2C pins so that PMIC can turn on PHY supply */ +writel (gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk); +writel (gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat); +writel (0x1E8 , &padctl->pad_i2c1_clk); +writel (0x1E8 , &padctl->pad_i2c1_dat); +} +int dram_init (void ) {/* dram_init must store complete ramsize in gd->ram_size */
@@ -59,6 +107,22 @@ int board_init(void)return 0 ; } +int board_late_init (void ) +{ +/* Turn on PHY supply via I2C command to PMIC */ +u8 reg[4 ]; + reg[0 ] =0x09 ; + +mx25pdk_fec_init (); + +if (i2c_write (PMIC_I2C_ADDR ,REG_PHY_3V3 ,1 , reg,1 )) { +printf ("I2C write to PMIC failed\n" ); +return -EINVAL ; + } + +return 0 ; +} +#ifdef CONFIG_FSL_ESDHC int board_mmc_getcd (struct mmc *mmc) {
include/configs/mx25pdk.h +15 -0
@@ -41,6 +41,7 @@#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
@@ -100,6 +101,20 @@#define CONFIG_DOS_PARTITION +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_BASE IMX_I2C_BASE +#define CONFIG_SYS_I2C_SPEED 100000 + +/* Ethernet Configs */ + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_BOOTDELAY 3#define CONFIG_LOADADDR 0x81000000/* loadaddr env var */
Signature · 1 line
1.7.9.5
PATCH 3/3 mx25pdk: Add FEC support
Am 11/10/2012 05:58, schrieb Fabio Estevam:
Quoted 11 lines
From: Fabio Estevam <[email protected]>
mx25pdk has a Ethernet port that is connected to its internal FEC controller.
In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the PMIC via I2C.
Make FEC ethernet functional.
Signed-off-by Fabio Estevam <[email protected]>---
Hi Fabio,
Quoted 76 lines
board/freescale/mx25pdk/mx25pdk.c | 64 +++++++++++++++++++++++++++++++++++++ include/configs/mx25pdk.h | 15 +++++++++ 2 files changed, 79 insertions(+)board/freescale/mx25pdk/mx25pdk.c +50
-0@@ -25,6 +25,13 @@#include <asm/arch/sys_proto.h> #include <mmc.h> #include <fsl_esdhc.h> +#include <i2c.h> + +#define FEC_RESET_B IMX_GPIO_NR(2, 3) +#define FEC_ENABLE_B IMX_GPIO_NR(4, 8) +#define CARD_DETECT IMX_GPIO_NR(2, 1) +#define PMIC_I2C_ADDR 0x54 +#define REG_PHY_3V3 0x02#define CARD_DETECT IMX_GPIO_NR(2, 1)@@ -36,6 +43,47 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = { };#endif +static void mx25pdk_fec_init (void ) +{ +struct iomuxc_mux_ctl *muxctl; +struct iomuxc_pad_ctl *padctl; +u32 gpio_mux_mode =MX25_PIN_MUX_MODE (5 ); +u32 gpio_mux_mode0_sion =MX25_PIN_MUX_MODE (0 ) |MX25_PIN_MUX_SION ; + +/* FEC pin init is generic */ +mx25_fec_init_pins (); + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE ; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE ; +/* +* Set up FEC_RESET_B and FEC_ENABLE_B +* +* FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12 +* FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17 +*/ +writel (gpio_mux_mode, &muxctl->pad_d12); +writel (gpio_mux_mode, &muxctl->pad_a17); + +writel (0x0 , &padctl->pad_d12); +writel (0x0 , &padctl->pad_a17); + +/* Assert RESET and ENABLE low */ +gpio_direction_output (FEC_RESET_B ,0 ); +gpio_direction_output (FEC_ENABLE_B ,0 ); + +udelay (10 ); + +/* Deassert RESET and ENABLE */ +gpio_set_value (FEC_RESET_B ,1 ); +gpio_set_value (FEC_ENABLE_B ,1 ); + +/* Setup I2C pins so that PMIC can turn on PHY supply */ +writel (gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk); +writel (gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat); +writel (0x1E8 , &padctl->pad_i2c1_clk); +writel (0x1E8 , &padctl->pad_i2c1_dat); +} +int dram_init (void ) {/* dram_init must store complete ramsize in gd->ram_size */ @@ -59,6 +107,22 @@ int board_init(void)return 0 ; } +int board_late_init (void ) +{
board/freescale/mx25pdk/mx25pdk.c int board_init(void) · line 121
Quoted 10 lines
board/freescale/mx25pdk/mx25pdk.c +10
-0+/* Turn on PHY supply via I2C command to PMIC */ +u8 reg[4 ]; + reg[0 ] =0x09 ; + +mx25pdk_fec_init (); + +if (i2c_write (PMIC_I2C_ADDR ,REG_PHY_3V3 ,1 , reg,1 )) { +printf ("I2C write to PMIC failed\n" ); +return -EINVAL ; + }
I do not know which PMIC is on this board. Anyway, we have accessors for the PMICs. Please add register layout to your pmic (if it is not one of the already supported) and use pmic_ functions (as in MX35 / MX5) to modify the registers.
Best regards,
Stefano
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================