Skip to contentSkip to conversation

add nand spl boot for qi_lb60 board

PATCH Superseded xiangfu at openmobilefree.net 3 participants 6 messages Oct 9, 2012 – Oct 11, 2012

Subsystems (3)
Memory technology devices (MTD) MIPS NAND flash
lore
Share & tools
lore

xiangfu at openmobilefree.net

author
#0 lore raw

PATCH v3 1/1 add nand spl boot for qi_lb60 board

From: Xiangfu Liu <[email protected]>

* After create u-boot-spl.bin. it needs those 4 commands create final image for jz4740 cpu.
~~~~
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync bs=8192 count=1
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=8192 count=1 tr '\0' '\377' < /dev/zero | dd of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=16384 count=1 cat u-boot-nand.bin u-boot.bin > u-boot-nand-final.bin
~~~~
The JZ4740 CPU can load 8KB from two different addresses:
1. the normal area up to 8KB starting from NAND flash address 0x00000000
2. the backup area up to 8KB starting from NAND flash address 0x00002000

* Add software usbboot mode
Downloads user program from the USB port to internal SRAM and branches to the internal SRAM to execute the program. (JZ4740 CPU have a internal ROM have such kind of code, that make
JZ4740 can boot from USB)
---
v3:
* add simpile string.c to mips/lib
* some cleanup on jz4740.c
* move to new spl/ structure
* support software usbboot mode

 arch/mips/cpu/xburst/Makefile     |    7 +-
 arch/mips/cpu/xburst/cpu.c        |    4 +
 arch/mips/cpu/xburst/jz4740.c     |   84 ++--
 arch/mips/cpu/xburst/spl/Makefile |   47 ++
 arch/mips/cpu/xburst/spl/start.S  |   65 +++
 arch/mips/lib/Makefile            |    4 +
 arch/mips/lib/string.c            |   32 ++
 board/qi/qi_lb60/Makefile         |    5 +
 board/qi/qi_lb60/qi_lb60-spl.c    |   56 +++
 board/qi/qi_lb60/qi_lb60.c        |    6 +-
 board/qi/qi_lb60/u-boot-spl.lds   |   62 +++
 board/qi/qi_lb60/usbboot.S        |  880 +++++++++++++++++++++++++++++++++++++
 drivers/mtd/nand/jz4740_nand.c    |   39 +-
 include/configs/qi_lb60.h         |  173 ++++----
 14 files changed, 1319 insertions(+), 145 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/spl/Makefile
 create mode 100644 arch/mips/cpu/xburst/spl/start.S
 create mode 100644 arch/mips/lib/string.c
 create mode 100644 board/qi/qi_lb60/qi_lb60-spl.c
 create mode 100644 board/qi/qi_lb60/u-boot-spl.lds
 create mode 100644 board/qi/qi_lb60/usbboot.S
arch/mips/cpu/xburst/Makefile +5 -2
index b1f2ae4..ec35e55 100644
@@ -24,9 +24,12 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).o
 
+COBJS-y	= cpu.o jz_serial.o
+
+ifneq ($(CONFIG_SPL_BUILD),y)
 START	= start.o
-SOBJS-y	=
-COBJS-y	= cpu.o timer.o jz_serial.o
+COBJS-y += timer.o
+endif
 
 COBJS-$(CONFIG_JZ4740) += jz4740.o
arch/mips/cpu/xburst/cpu.c +4 -0
index ddcbfaa..1432838 100644
@@ -42,6 +42,8 @@
 		:			\
 		: "i" (op), "R" (*(unsigned char *)(addr)))
 
+#ifndef CONFIG_SPL_BUILD
+
 void __attribute__((weak)) _machine_restart(void)
 {
 	struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE;

@@ -109,6 +111,8 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
 		cache_op(Hit_Invalidate_D, addr);
 }
 
+#endif
+
 void flush_icache_all(void)
 {
 	u32 addr, t = 0;
arch/mips/cpu/xburst/jz4740.c +34 -50

172 lines not on this page · raw message

arch/mips/cpu/xburst/spl/Makefile new file +47 -0

47 lines not on this page · raw message

arch/mips/cpu/xburst/spl/start.S new file +65 -0

65 lines not on this page · raw message

arch/mips/lib/Makefile +4 -0
index 967e98a..c1452a2 100644
@@ -34,12 +34,16 @@ LGOBJS	:= $(addprefix $(obj),$(GLSOBJS))
 
 SOBJS-y	+=
 
+ifeq ($(CONFIG_SPL_BUILD),y)
+COBJS-y	+= string.o
+else
 COBJS-y	+= board.o
 ifeq ($(CONFIG_QEMU_MIPS),y)
 COBJS-y	+= bootm_qemu_mips.o
 else
 COBJS-y	+= bootm.o
 endif
+endif
 
 SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
arch/mips/lib/string.c new file +32 -0
new file mode 100644
index 0000000..d59f44a
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2012 Xiangfu Liu <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* copy from lib/string bcopy */
+char * memcpy(const char * src, char * dest, int count)
+{
+	char *tmp = dest;
+
+	while (count--)
+		*tmp++ = *src++;
+
+	return dest;
+}
board/qi/qi_lb60/Makefile +5 -0
index 5dae11b..6dd8c6f 100644
@@ -22,7 +22,12 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
+ifeq ($(CONFIG_SPL_BUILD),y)
+SOBJS	:= usbboot.o
+COBJS	:= $(BOARD)-spl.o
+else
 COBJS	:= $(BOARD).o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
board/qi/qi_lb60/qi_lb60-spl.c new file +56 -0

56 lines not on this page · raw message

board/qi/qi_lb60/qi_lb60.c +4 -2
index d975209..553e05d 100644
@@ -97,8 +97,10 @@ int board_early_init_f(void)
 /* U-Boot common routines */
 int checkboard(void)
 {
-	printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC, Speed %ld MHz)\n",
-	       gd->cpu_clk / 1000000);
+	printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC)\n");
+	printf(" CPU: %ld \n", gd->cpu_clk);
+	printf(" MEM: %ld \n", gd->mem_clk);
+	printf(" DEV: %ld \n", gd->dev_clk);
 
 	return 0;
 }
board/qi/qi_lb60/u-boot-spl.lds new file +62 -0

62 lines not on this page · raw message

board/qi/qi_lb60/usbboot.S new file +880 -0

880 lines not on this page · raw message

drivers/mtd/nand/jz4740_nand.c +36 -3
index 3ec34f3..4ab2229 100644
@@ -15,6 +15,9 @@
 #include <asm/io.h>
 #include <asm/jz4740.h>
 
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)
+#endif
 #define JZ_NAND_DATA_ADDR ((void __iomem *)0xB8000000)
 #define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
 #define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x10000)

@@ -176,7 +179,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
 		for (k = 0; k < 9; k++)
 			writeb(read_ecc[k], &emc->nfpar[k]);
 	}
-	/* Set PRDY */
+
 	writel(readl(&emc->nfecr) | EMC_NFECR_PRDY, &emc->nfecr);
 
 	/* Wait for completion */

@@ -184,7 +187,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
 		status = readl(&emc->nfints);
 	} while (!(status & EMC_NFINTS_DECF));
 
-	/* disable ecc */
+	/* Disable ECC */
 	writel(readl(&emc->nfecr) & ~EMC_NFECR_ECCE, &emc->nfecr);
 
 	/* Check decoding */

@@ -192,7 +195,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
 		return 0;
 
 	if (status & EMC_NFINTS_UNCOR) {
-		printf("uncorrectable ecc\n");
+		printf("JZ4740 uncorrectable ECC\n");
 		return -1;
 	}
 

@@ -230,6 +233,32 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
 	return errcnt;
 }
 
+#ifdef CONFIG_SPL_BUILD
+static void jz_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	int i;
+	struct nand_chip *this = mtd->priv;
+
+#if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R3) || \
+	(JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R2)
+	for (i = 0; i < len; i += 2)
+		buf[i] = readw(this->IO_ADDR_R);
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3) || \
+	(JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R2)
+	for (i = 0; i < len; i++)
+		buf[i] = readb(this->IO_ADDR_R);
+#else
+	#error JZ4740_NANDBOOT_CFG not defined or wrong
+#endif
+}
+
+static uint8_t jz_nand_read_byte(struct mtd_info *mtd)
+{
+	struct nand_chip *this = mtd->priv;
+	return readb(this->IO_ADDR_R);
+}
+#endif
+
 /*
  * Main initialization routine
  */

@@ -254,6 +283,10 @@ int board_nand_init(struct nand_chip *nand)
 	nand->ecc.size		= CONFIG_SYS_NAND_ECCSIZE;
 	nand->ecc.bytes		= CONFIG_SYS_NAND_ECCBYTES;
 	nand->ecc.layout	= &qi_lb60_ecclayout_2gb;
+#ifdef CONFIG_SPL_BUILD
+	nand->read_byte		= jz_nand_read_byte;
+	nand->read_buf		= jz_nand_read_buf;
+#endif
 	nand->chip_delay	= 50;
 	nand->options		= NAND_USE_FLASH_BBT;
include/configs/qi_lb60.h +85 -88

253 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v3 1/1 add nand spl boot for qi_lb60 board

Quoted 14 lines · xiangfu at openmobilefree.net

From: Xiangfu Liu <[email protected]>

* After create u-boot-spl.bin. it needs those 4 commands create final image for jz4740 cpu.
~~~~
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync bs=8192 count=1
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=8192 count=1 tr '\0' '\377' < /dev/zero | dd of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=16384 count=1 cat u-boot-nand.bin u-boot.bin > u-boot-nand-final.bin
~~~~
The JZ4740 CPU can load 8KB from two different addresses:
1. the normal area up to 8KB starting from NAND flash address 0x00000000
2. the backup area up to 8KB starting from NAND flash address 0x00002000

Quoted 11 lines

* Add software usbboot mode
Downloads user program from the USB port to internal SRAM and branches to the internal SRAM to execute the program. (JZ4740 CPU have a internal ROM have such kind of code, that make
JZ4740 can boot from USB)
---
v3:
* add simpile string.c to mips/lib
* some cleanup on jz4740.c
* move to new spl/ structure
* support software usbboot mode

I'm happy you've moved to the new SPL infrastructure. A few comments:

In general, please check for checkpatch.pl issues, I spotted a few. Also, don't use // comments in asm, everything else in MIPS uses '#' or '/* ... */'. Please use 'puts' rather than 'serial_puts' directly.

[snip]

arch/mips/lib/string.c

Quoted 6 lines
arch/mips/lib/string.c new file +0 -0
new file mode 100644
index 0000000..d59f44a
@@ -0,0 +1,32 @@

Can you try just enabling CONFIG_SPL_LIBGENERIC_SUPPORT ? You should have the unused functions garbage collected automatically.

drivers/mtd/nand/jz4740_nand.c line 20

Quoted 11 lines
drivers/mtd/nand/jz4740_nand.c +3 -0
index 3ec34f3..4ab2229 100644
@@ -15,6 +15,9 @@
 #include <asm/io.h>
 #include <asm/jz4740.h>
 
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)
+#endif

In this case you should just switch to puts.

And a non-blocking question, have you looked at the CONFIG_SPL_FRAMEWORK code in common/spl/ now?

Signature · 8 lines
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20121009/a1930fa2/attachment.pgp>
#2 lore raw

PATCH v3 1/1 add nand spl boot for qi_lb60 board

2012/10/9 Tom Rini <[email protected]>:

Quoted 53 lines · xiangfu at openmobilefree.net
Quoted 15 lines

From: Xiangfu Liu <[email protected]>

* After create u-boot-spl.bin. it needs those 4 commands create final image for jz4740 cpu.
~~~~
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync bs=8192 count=1
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=8192 count=1 tr '\0' '\377' < /dev/zero | dd of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=16384 count=1 cat u-boot-nand.bin u-boot.bin > u-boot-nand-final.bin
~~~~
The JZ4740 CPU can load 8KB from two different addresses:
1. the normal area up to 8KB starting from NAND flash address 0x00000000
2. the backup area up to 8KB starting from NAND flash address 0x00002000

Quoted 11 lines

* Add software usbboot mode
Downloads user program from the USB port to internal SRAM and branches to the internal SRAM to execute the program. (JZ4740 CPU have a internal ROM have such kind of code, that make
JZ4740 can boot from USB)
---
v3:
* add simpile string.c to mips/lib
* some cleanup on jz4740.c
* move to new spl/ structure
* support software usbboot mode

I'm happy you've moved to the new SPL infrastructure. A few comments:

In general, please check for checkpatch.pl issues, I spotted a few. Also, don't use // comments in asm, everything else in MIPS uses '#' or '/* ... */'. Please use 'puts' rather than 'serial_puts' directly.

[snip]

arch/mips/lib/string.c

Quoted 6 lines
arch/mips/lib/string.c new file +0 -0
new file mode 100644
index 0000000..d59f44a
@@ -0,0 +1,32 @@

Can you try just enabling CONFIG_SPL_LIBGENERIC_SUPPORT ? You should have the unused functions garbage collected automatically.

Quoted 8 lines
drivers/mtd/nand/jz4740_nand.c +0 -0
index 3ec34f3..4ab2229 100644
@@ -15,6 +15,9 @@
 #include <asm/io.h>
 #include <asm/jz4740.h>
Quoted 9 lines

drivers/mtd/nand/jz4740_nand.c line 20

Quoted 3 lines
drivers/mtd/nand/jz4740_nand.c +3 -0
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)
+#endif

In this case you should just switch to puts.

And a non-blocking question, have you looked at the CONFIG_SPL_FRAMEWORK code in common/spl/ now?

in addition to Tom's comments:
please split coding style cleanups, code reordering, NAND SPL and USB boot into separate patches

Signature · 2 lines
Best regards,
Daniel
author
#3 lore raw

PATCH v3 1/1 add nand spl boot for qi_lb60 board

Hi

Thanks for feedback. PATVH v4 will coming soon. about 'CONFIG_SPL_FRAMEWORK' I don't know this when I working on ben nanonote spl. I think I will stick with this spl for awhile.

is there a plan remove drivers/mtd/nand/nand_spl_*.c?

Xiangfu

Quoted 68 lines · Daniel Schwierzeck

2012/10/9 Tom Rini <[email protected]>:

Quoted 53 lines · xiangfu at openmobilefree.net
Quoted 15 lines

From: Xiangfu Liu <[email protected]>

* After create u-boot-spl.bin. it needs those 4 commands create final image for jz4740 cpu.
~~~~
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync bs=8192 count=1
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=8192 count=1 tr '\0' '\377' < /dev/zero | dd of=u-boot-nand.bin conv=sync,notrunc oflag=append bs=16384 count=1 cat u-boot-nand.bin u-boot.bin > u-boot-nand-final.bin
~~~~
The JZ4740 CPU can load 8KB from two different addresses:
1. the normal area up to 8KB starting from NAND flash address 0x00000000
2. the backup area up to 8KB starting from NAND flash address 0x00002000

Quoted 11 lines

* Add software usbboot mode
Downloads user program from the USB port to internal SRAM and branches to the internal SRAM to execute the program. (JZ4740 CPU have a internal ROM have such kind of code, that make
JZ4740 can boot from USB)
---
v3:
* add simpile string.c to mips/lib
* some cleanup on jz4740.c
* move to new spl/ structure
* support software usbboot mode

I'm happy you've moved to the new SPL infrastructure. A few comments:

In general, please check for checkpatch.pl issues, I spotted a few. Also, don't use // comments in asm, everything else in MIPS uses '#' or '/* ... */'. Please use 'puts' rather than 'serial_puts' directly.

[snip]

arch/mips/lib/string.c

Quoted 6 lines
arch/mips/lib/string.c new file +0 -0
new file mode 100644
index 0000000..d59f44a
@@ -0,0 +1,32 @@

Can you try just enabling CONFIG_SPL_LIBGENERIC_SUPPORT ? You should have the unused functions garbage collected automatically.

Quoted 8 lines
drivers/mtd/nand/jz4740_nand.c +0 -0
index 3ec34f3..4ab2229 100644
@@ -15,6 +15,9 @@
 #include <asm/io.h>
 #include <asm/jz4740.h>
Quoted 9 lines

drivers/mtd/nand/jz4740_nand.c line 20

Quoted 3 lines
drivers/mtd/nand/jz4740_nand.c +3 -0
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)
+#endif

In this case you should just switch to puts.

And a non-blocking question, have you looked at the CONFIG_SPL_FRAMEWORK code in common/spl/ now?

in addition to Tom's comments:
please split coding style cleanups, code reordering, NAND SPL and USB boot into separate patches

author
#4 lore raw

PATCH v3 1/1 add nand spl boot for qi_lb60 board

In reply to Daniel Schwierzeck

Hi Tom Rini

I cannot easy find a way to use 'puts' instead 'serial_puts' in my code. any advise will be great.

Thanks
Xiangfu

Quoted 6 lines · Daniel Schwierzeck
Quoted 6 lines

I'm happy you've moved to the new SPL infrastructure. A few comments:

In general, please check for checkpatch.pl issues, I spotted a few. Also, don't use // comments in asm, everything else in MIPS uses '#' or '/* ... */'. Please use 'puts' rather than 'serial_puts' directly.

#5 lore raw

PATCH v3 1/1 add nand spl boot for qi_lb60 board

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Quoted 4 lines · Xiangfu Liu

Hi Tom Rini

I cannot easy find a way to use 'puts' instead 'serial_puts' in my
code. any advise will be great.

You should be able to use CONFIG_SPL_LIBCOMMON_SUPPORT without CONFIG_SPL_FRAMEWORK and get 'puts'.

- --
Tom
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://www.enigmail.net/

iQIcBAEBAgAGBQJQd0bGAAoJENk4IS6UOR1Wl6EP/ip/TVA/lLHYv+rcZuu8oJyZ fh5rYYaprLsIzt9esQ9lBjhxFsEvmofGYzFLyMR318Z2cyxTAdOYWLRD+JkFLZAJ nd5SB5Co8mKUBXxpnGN8k0dUT00G+dZvgYE1BM37uC+fLpaZXqrncn+4O4xU2GP/ tsbAXUG1K+KmEB8B1xKSrsrKU6CCfh8bbZZaj541mFRHcgjF+ZWIoWFoTR7HedgZ LLcY+LSMxXntK/P5jH8mq9feLU7fPqVo9jxUBlkF35IQTAI3+1X88tkwzObYD8az c2sRgACQh+pgoY2VA6t2YhUp+gFOiHxGUqr+xiFndQhKFs+LNsziNbT4ddptKTb7 3SZi8roOifxc1/K6vW7rxs5F5AOzYajstTDepgHCHeW/zks3NZq0qFNSZAK9GS/C Sh0Q9Uxo9FqW7LpXtSXTj9AUJ5TRD4pKZYcTEBETlZqqWfqTUMJkhV/KEEq0IxRR NJctAVYq5clDl/Jq12F5YygTpA7o7OCGT0EIPsTudpijbkjnEA7FT1F0Y6oQV6+z 0ibshUuty1FVcIJ/ccJPChPSQqFfXZqrf6SOiEU1exe4ap/nC0MtBOGhcs7lkYzr com4uYPPeVqogcLAxJwMTz/qaAzEdLWo09Qi4vLt2O/YUB9KHKy/9hyzMo63P2xM IkT2O2SxNONOZfhXlhMd
=yBoD
-----END PGP SIGNATURE-----