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Devicetree support for enc28j60 SPI Ethernet chip

PATCH In review Michal Vanka 3 participants 3 messages Oct 14, 2012 – Oct 18, 2012 1 message not in the archive

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#0 lore raw

PATCH 1/1 Devicetree support for enc28j60 SPI Ethernet chip

Hi,
the following patch adds generic openfirmware/devicetree support to enc28j60 driver.

It also adds support for custom hardware based (FPGA) "interrupt line deasserter" for processors with level triggered interrupts (for example Altera Nios2).

The interrupt line is deasserted by writing 1 to some output register in the address space (this address is configured also through devicetree).

Note: The interrupt line in enc28j60 chip can be deasserted by software by clearing bit INTIE in the EIE register.
However this can't be done in interrupt context as the write goes through SPI bus.

The patch was tested on custom Altera Nios2 system.

Documentation/devicetree/bindings/net/microchip-enc28j60.txt 2011-10-14 13:46:58.000000000 -0400 renamed from Documentation/devicetree/bindings/net/microchip-enc28j60.txt 1969-12-31 19:00:00.000000000 -0500 +31 -0
diff -uprN a/Documentation/devicetree/bindings/net/microchip-enc28j60.txt b/Documentation/devicetree/bindings/net/microchip-enc28j60.txt
@@ -0,0 +1,31 @@
+* Microchip enc28j60 Ethernet
+
+Required properties:
+- compatible : Should be "microchip,enc28j60"
+- interrupts : Should contain 1 interrupt.
+- reg : Should be 0
+
+Optional properties:
+- interrupt_deassert_reg : should contain address of additional (FPGA)
+  interrupt deassert hardware for processors with level triggered interrupts
+
+
+Example (for enc28j60 under opencores tinyspi controller):
+
+tiny_spi_1: spi@0x2160 {
+	compatible = "opencores,tiny-spi-1.0", "opencores,tiny-spi-rtlsvn2";
+	reg = < 0x00002160 0x00000020 >;
+	interrupt-parent = < &cpu >;
+	interrupts = < 2 >;
+	clock-frequency = < 100000000 >;
+	baud-width = < 8 >;	/* BAUD_WIDTH type NUMBER */
+	gpios = < &spi1_cs 0 0 >;
+	ethernet: enc28j60@0 {
+		compatible = "microchip,enc28j60";
+		spi-max-frequency = < 20000000 >;
+		reg = < 0 >;
+		interrupts = < 4 >;
+		interrupt_deassert_reg = < 0x00003000 >;
+	};			
+}; //end spi@0x2160 (tiny_spi_1)
+
drivers/net/ethernet/microchip/enc28j60.c +50 -1

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#1 lore raw
Quoted 2 lines · Michal Vanka

the following patch adds generic openfirmware/devicetree support to enc28j60 driver.

this should go to the net list, not the mtd list, since this is a net driver

however, your patch needs a little work. please send it with git send-email rather than formatting things yourself.

drivers/net/ethernet/microchip/enc28j60.c static irqreturn_t enc28j60_irq(int irq, · line 1326

Quoted 2 lines
drivers/net/ethernet/microchip/enc28j60.c +2 -0
+       if(priv->interrupt_deassert_reg)
+               writeb(1,priv->interrupt_deassert_reg);

needs a space after the "if" and after the ",". please run your patch through checkpatch.pl before re-submitting.

Quoted 1 line

+static int __devinit enc28j60_of_probe(struct spi_device *spi,struct

more space issues

drivers/net/ethernet/microchip/enc28j60.c static const struct net_device_ops enc28 · line 1557

Quoted 3 lines
drivers/net/ethernet/microchip/enc28j60.c +3 -0
+{
+
+       u8 *reg;

kill off that blank line

Quoted 1 line

+ if(prop && len>=sizeof(__be32))

more space issues

Quoted 1 line

+ if(!devm_request_mem_region(&spi->dev, reg, 4, DRV_NAME))

here too
-mike

A message that is not in the archive (sent off-list or not yet received): [email protected]

#3 lore raw
Quoted 7 lines · Michal Vanka

Hi,
the following patch adds generic openfirmware/devicetree support to enc28j60 driver.

It also adds support for custom hardware based (FPGA) "interrupt line deasserter" for processors with level triggered interrupts (for example Altera Nios2).

Hi, please, re-send with

[email protected]

in CC.

Signature · 2 lines
Best Regards,
Artem Bityutskiy