Devicetree support for enc28j60 SPI Ethernet chip
Subsystems (3)
PATCH 1/1 Devicetree support for enc28j60 SPI Ethernet chip
Hi,
the following patch adds generic openfirmware/devicetree support to enc28j60 driver.
It also adds support for custom hardware based (FPGA) "interrupt line deasserter" for processors with level triggered interrupts (for example Altera Nios2), as the enc28j60 works only with
processors with edge triggered interrupt.
The patch was tested on custom Altera Nios2 system.
Signed-off-by Michal Vanka <[email protected]>
Documentation/devicetree/bindings/net/microchip-enc28j60.txt 2011-10-16 11:38:33.000000000 -0400 renamed from Documentation/devicetree/bindings/net/microchip-enc28j60.txt 1969-12-31 19:00:00.000000000 -0500 +30 -0
@@ -0,0 +1,30 @@ +* Microchip enc28j60 Ethernet + +Required properties: +- compatible : Should be "microchip,enc28j60" +- interrupts : Should contain 1 interrupt. +- reg : Should be 0 + +Optional properties: +- interrupt_deassert_reg : should contain address of additional (FPGA) + interrupt deassert hardware for processors with level triggered interrupts + + +Example (for enc28j60 under opencores tinyspi controller): + +tiny_spi_1: spi@0x2160 { + compatible = "opencores,tiny-spi-1.0", "opencores,tiny-spi-rtlsvn2"; + reg = < 0x00002160 0x00000020 >; + interrupt-parent = < &cpu >; + interrupts = < 2 >; + clock-frequency = < 100000000 >; + baud-width = < 8 >; /* BAUD_WIDTH type NUMBER */ + gpios = < &spi1_cs 0 0 >; + ethernet: enc28j60@0 { + compatible = "microchip,enc28j60"; + spi-max-frequency = < 20000000 >; + reg = < 0 >; + interrupts = < 4 >; + interrupt_deassert_reg = < 0x00003000 >; + }; +}; //end spi@0x2160 (tiny_spi_1)
drivers/net/ethernet/microchip/enc28j60.c +51 -1
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