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ARM: tegra30: clocks: add AHB and APB clocks

PATCH New Joseph Lo 3 participants 4 messages Oct 19, 2012 – Oct 22, 2012

Subsystems (3)
Arm (32-bit) Arm sub-architectures Tegra architecture support
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Joseph Lo

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#0 lore raw

PATCH 1/1 ARM: tegra30: clocks: add AHB and APB clocks

Adding the AHB and APB bus clock control interface for Tegra30.

Signed-off-by Joseph Lo <[email protected]>
---
 arch/arm/mach-tegra/common.c              |    4 +
 arch/arm/mach-tegra/tegra30_clocks.c      |  106 +++++++++++++++++++++++++++++
 arch/arm/mach-tegra/tegra30_clocks.h      |    1 +
 arch/arm/mach-tegra/tegra30_clocks_data.c |   46 +++++++++++++
 4 files changed, 157 insertions(+), 0 deletions(-)
arch/arm/mach-tegra/common.c +4 -0
index 0b0a5f5..177f164 100644
@@ -104,6 +104,10 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
 	{ "clk_m",	NULL,		0,		true },
 	{ "pll_p",	"clk_m",	408000000,	true },
 	{ "pll_p_out1",	"pll_p",	9600000,	true },
+	{ "pll_p_out4",	"pll_p",	102000000,	true },
+	{ "sclk",	"pll_p_out4",	102000000,	true },
+	{ "hclk",	"sclk",		102000000,	true },
+	{ "pclk",	"hclk",		51000000,	true },
 	{ NULL,		NULL,		0,		0},
 };
 #endif
arch/arm/mach-tegra/tegra30_clocks.c +106 -0

112 lines not on this page · raw message

arch/arm/mach-tegra/tegra30_clocks.h +1 -0
index f2f88fe..7a34adb 100644
@@ -34,6 +34,7 @@ extern struct clk_ops tegra_clk_out_ops;
 extern struct clk_ops tegra30_super_ops;
 extern struct clk_ops tegra30_blink_clk_ops;
 extern struct clk_ops tegra30_twd_ops;
+extern struct clk_ops tegra30_bus_ops;
 extern struct clk_ops tegra30_periph_clk_ops;
 extern struct clk_ops tegra30_dsib_clk_ops;
 extern struct clk_ops tegra_nand_clk_ops;
arch/arm/mach-tegra/tegra30_clocks_data.c +46 -0

58 lines not on this page · raw message

Signature · 1 line
1.7.0.4
#1 lore raw

PATCH 1/1 ARM: tegra30: clocks: add AHB and APB clocks

Quoted 1 line · Joseph Lo

Adding the AHB and APB bus clock control interface for Tegra30.

Not really "clock control interface" but just "clocks". I can reword that when applying the patch though.

The code seems reasonable. I'd like review from Prashant or Peter though.

#2 lore raw

PATCH 1/1 ARM: tegra30: clocks: add AHB and APB clocks

In reply to Joseph Lo
Quoted 9 lines · Joseph Lo

Adding the AHB and APB bus clock control interface for Tegra30.

Signed-off-by Joseph Lo<[email protected]>
---
  arch/arm/mach-tegra/common.c              |    4 +
  arch/arm/mach-tegra/tegra30_clocks.c      |  106 +++++++++++++++++++++++++++++
  arch/arm/mach-tegra/tegra30_clocks.h      |    1 +
  arch/arm/mach-tegra/tegra30_clocks_data.c |   46 +++++++++++++
  4 files changed, 157 insertions(+), 0 deletions(-)

<snip>

arch/arm/mach-tegra/tegra30_clocks.c struct clk_ops tegra30_twd_ops = { · line 877

Quoted 10 lines
arch/arm/mach-tegra/tegra30_clocks.c +10 -0
+
+static long tegra30_bus_clk_round_rate(struct clk_hw *hw, unsigned long rate,
+				unsigned long *prate)
+{
+	unsigned long parent_rate = *prate;
+	s64 divider;
+
+	if (rate>= parent_rate)
+		return rate;
+

return parent_rate?

Quoted 14 lines
arch/arm/mach-tegra/tegra30_clocks.c +13 -0
+	divider = parent_rate;
+	divider += rate - 1;
+	do_div(divider, rate);
+
+	if (divider<  0)
+		return divider;
+
+	if (divider>  4)
+		divider = 4;
+	do_div(parent_rate, divider);
+
+	return parent_rate;
+}
author
#3 lore raw

PATCH 1/1 ARM: tegra30: clocks: add AHB and APB clocks

Quoted 13 lines · Prashant Gaikwad
Quoted 9 lines · Joseph Lo

Adding the AHB and APB bus clock control interface for Tegra30.

Signed-off-by Joseph Lo<[email protected]>
---
  arch/arm/mach-tegra/common.c              |    4 +
  arch/arm/mach-tegra/tegra30_clocks.c      |  106 +++++++++++++++++++++++++++++
  arch/arm/mach-tegra/tegra30_clocks.h      |    1 +
  arch/arm/mach-tegra/tegra30_clocks_data.c |   46 +++++++++++++
  4 files changed, 157 insertions(+), 0 deletions(-)

<snip>

Quoted 12 lines

arch/arm/mach-tegra/tegra30_clocks.c struct clk_ops tegra30_twd_ops = { · line 877

Quoted 10 lines
arch/arm/mach-tegra/tegra30_clocks.c +10 -0
+
+static long tegra30_bus_clk_round_rate(struct clk_hw *hw, unsigned long rate,
+				unsigned long *prate)
+{
+	unsigned long parent_rate = *prate;
+	s64 divider;
+
+	if (rate>= parent_rate)
+		return rate;
+

return parent_rate?

Prashant,

Yes, thanks.

Quoted 16 lines
Quoted 15 lines
arch/arm/mach-tegra/tegra30_clocks.c +13 -0
+	divider = parent_rate;
+	divider += rate - 1;
+	do_div(divider, rate);
+
+	if (divider<  0)
+		return divider;
+
+	if (divider>  4)
+		divider = 4;
+	do_div(parent_rate, divider);
+
+	return parent_rate;
+}