ARM: implement debug_ll_io_init()

When using DEBUG_LL, the UART's (or other HW's) registers are mapped into early page tables based on the results of assembly macro addruart. Later, when the page tables are replaced, the same virtual address must remain valid. Historically, this has been ensured by using defines from <mach/iomap.h> in both the implementation of addruart, and the machine's .map_io() function. However, with the move to single zImage, we wish to remove <mach/iomap.h>. To enable this, the macro addruart may be used when constructing the late page tables too; addruart is exposed as a C function debug_ll_addr(), and used to set up the required mapping in debug_ll_io_init(), which may called on an opt-in basis from a machine's .map_io() function.

arch/arm/mach-tegra/include/mach/debug-macro.S +15 -0

+
+#define checkuart(rp, rv, lhu, bit, uart) \
+               /* Load address of CLK_RST register */ \
+               movw    rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+               movt    rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+               /* Load value from CLK_RST register */ \
+               ldr     rp, [rp, #0] ; \
+               /* Test UART's reset bit */ \
+               tst     rp, #(1 << bit) ; \
+               /* If set, can't use UART; jump to save no UART */ \
+               bne     90f ; \
+               /* Load address of CLK_OUT_ENB register */ \
+               movw    rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+               movt    rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+               /* Load value from CLK_OUT_ENB register */ \

Quoted 20 lines

arch/arm/mach-tegra/include/mach/debug-macro.S +20 -0

+
+#define checkuart(rp, rv, lhu, bit, uart) \
+               /* Load address of CLK_RST register */ \
+               movw    rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+               movt    rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+               /* Load value from CLK_RST register */ \
+               ldr     rp, [rp, #0] ; \
+               /* Test UART's reset bit */ \
+               tst     rp, #(1 << bit) ; \
+               /* If set, can't use UART; jump to save no UART */ \
+               bne     90f ; \
+               /* Load address of CLK_OUT_ENB register */ \
+               movw    rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+               movt    rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+               /* Load value from CLK_OUT_ENB register */ \
+               ldr     rp, [rp, #0] ; \
+               /* Test UART's clock enable bit */ \
+               tst     rp, #(1 << bit) ; \
+               /* If clear, can't use UART; jump to save no UART */ \
+               beq     90f ; \

arch/arm/mach-tegra/include/mach/debug-macro.S line 65

Quoted 6 lines

arch/arm/mach-tegra/include/mach/debug-macro.S +5 -0

+               /* Passed all tests, load address of UART registers */ \
+               movw    rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+               movt    rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+               /* Jump to save UART address */ \
+               b 91f

Maybe make this a subroutine?

Quoted 20 lines · Peter De Schrijver

Quoted 20 lines

arch/arm/mach-tegra/include/mach/debug-macro.S +20 -0

+
+#define checkuart(rp, rv, lhu, bit, uart) \
+               /* Load address of CLK_RST register */ \
+               movw    rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
+               movt    rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+               /* Load value from CLK_RST register */ \
+               ldr     rp, [rp, #0] ; \
+               /* Test UART's reset bit */ \
+               tst     rp, #(1 << bit) ; \
+               /* If set, can't use UART; jump to save no UART */ \
+               bne     90f ; \
+               /* Load address of CLK_OUT_ENB register */ \
+               movw    rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
+               movt    rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+               /* Load value from CLK_OUT_ENB register */ \
+               ldr     rp, [rp, #0] ; \
+               /* Test UART's clock enable bit */ \
+               tst     rp, #(1 << bit) ; \
+               /* If clear, can't use UART; jump to save no UART */ \
+               beq     90f ; \

Quoted 8 lines

arch/arm/mach-tegra/include/mach/debug-macro.S line 65

Quoted 6 lines

arch/arm/mach-tegra/include/mach/debug-macro.S +5 -0

+               /* Passed all tests, load address of UART registers */ \
+               movw    rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
+               movt    rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+               /* Jump to save UART address */ \
+               b 91f

Maybe make this a subroutine?

The addruart macro (which in turn uses the checkuart macro) is only allowed to use 3 registers; rp, rv, rtmp. I'm also not 100% sure if the stack is guaranteed to be set up when addruart is called either. So, I don't think making this a function is possible.

From: Rob Herring <[email protected]>

When using DEBUG_LL, the UART's (or other HW's) registers are mapped into early page tables based on the results of assembly macro addruart. Later, when the page tables are replaced, the same virtual address must remain valid. Historically, this has been ensured by using defines from <mach/iomap.h> in both the implementation of addruart, and the machine's .map_io() function. However, with the move to single zImage, we wish to remove <mach/iomap.h>. To enable this, the macro addruart may be used when constructing the late page tables too; addruart is exposed as a C function debug_ll_addr(), and used to set up the required mapping in debug_ll_io_init(), which may called on an opt-in basis from a machine's .map_io() function.

Signed-off-by Rob Herring <[email protected]>

[swarren: Mask map.virtual with PAGE_MASK. Checked for NULL results from
debug_ll_addr (e.g. when selected UART isn't valid). Fixed compile when either !CONFIG_DEBUG_LL or CONFIG_DEBUG_SEMIHOSTING.]

Signed-off-by Stephen Warren <[email protected]>

---
I assume this first patch should actually go into some arm-soc branch so that if others want to take advantage of it this kernel cycle, they can.

v3: New patch.

---
 arch/arm/include/asm/mach/map.h |    7 +++++++
 arch/arm/kernel/debug.S         |   13 +++++++++++++
 arch/arm/mm/mmu.c               |   16 ++++++++++++++++
 3 files changed, 36 insertions(+), 0 deletions(-)

arch/arm/include/asm/mach/map.h +7 -0

index 195ac2f..2fe141f 100644
@@ -40,6 +40,13 @@ extern void iotable_init(struct map_desc *, int);
 extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
 				  void *caller);
 
+#ifdef CONFIG_DEBUG_LL
+extern void debug_ll_addr(unsigned long *paddr, unsigned long *vaddr);
+extern void debug_ll_io_init(void);
+#else
+static inline void debug_ll_io_init(void) {}
+#endif
+
 struct mem_type;
 extern const struct mem_type *get_mem_type(unsigned int type);
 /*

arch/arm/kernel/debug.S +7 -0

index 66f711b..7525ce4 100644
@@ -100,6 +100,13 @@ ENTRY(printch)
 		b	1b
 ENDPROC(printch)
 
+ENTRY(debug_ll_addr)
+		addruart r2, r3, ip
+		str	r2, [r0]
+		str	r3, [r1]
+		mov	pc, lr
+ENDPROC(debug_ll_addr)
+
 #else
 
 ENTRY(printascii)

arch/arm/kernel/debug.S +3 -0

+		mov	pc, lr
+ENDPROC(debug_ll_addr)
+
 #endif

arch/arm/mm/mmu.c +16 -0

index 941dfb9..39719bb 100644
@@ -876,6 +876,22 @@ static void __init pci_reserve_io(void)
 #define pci_reserve_io() do { } while (0)
 #endif
 
+#ifdef CONFIG_DEBUG_LL
+void __init debug_ll_io_init(void)
+{
+	struct map_desc map;
+
+	debug_ll_addr(&map.pfn, &map.virtual);
+	if (!map.pfn || !map.virtual)
+		return;
+	map.pfn = __phys_to_pfn(map.pfn);
+	map.virtual &= PAGE_MASK;
+	map.length = PAGE_SIZE;
+	map.type = MT_DEVICE;
+	create_mapping(&map);
+}
+#endif
+
 static void * __initdata vmalloc_min =
 	(void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);