arm:exynos4: Enable Multi I2C

index 4f3b451..21e45d2 100644
@@ -732,6 +732,21 @@ static unsigned long exynos5_get_i2c_clk(void)
 	return aclk_66;
 }
 
+static unsigned long exynos4_get_i2c_clk(void)
+{
+	struct exynos4_clock *clk =
+		(struct exynos4_clock *)samsung_get_base_clock();
+	unsigned long sclk, aclk_100;
+	unsigned int ratio;
+
+	sclk = get_pll_clk(APLL);
+
+	ratio = (readl(&clk->div_top)) >> 4;
+	ratio &= 0xf;
+	aclk_100 = sclk / (ratio + 1);
+	return aclk_100;
+}
+
 unsigned long get_pll_clk(int pllreg)
 {
 	if (cpu_is_exynos5())

@@ -752,6 +767,8 @@ unsigned long get_i2c_clk(void)
 {
 	if (cpu_is_exynos5()) {
 		return exynos5_get_i2c_clk();
+	} else if (cpu_is_exynos4()) {
+		return exynos4_get_i2c_clk();
 	} else {
 		debug("I2C clock is not set for this CPU\n");
 		return 0;

index 2cd4ae1..3073ca1 100644
@@ -28,6 +28,8 @@
 #define EXYNOS4_ADDR_BASE		0x10000000
 
 /* EXYNOS4 */
+#define EXYNOS4_I2C_SPACING		0x10000
+
 #define EXYNOS4_GPIO_PART3_BASE		0x03860000
 #define EXYNOS4_PRO_ID			0x10000000
 #define EXYNOS4_SYSREG_BASE		0x10010000

index 5796d56..3ebeb1d 100644
@@ -302,6 +302,47 @@ static int exynos4_mmc_config(int peripheral, int flags)
 	return 0;
 }
 
+static void exynos4_i2c_config(int peripheral, int flags)
+{
+	struct exynos4_gpio_part1 *gpio1 =
+		(struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+
+	switch (peripheral) {
+	case PERIPH_ID_I2C0:
+		s5p_gpio_cfg_pin(&gpio1->d1, 0, GPIO_FUNC(0x2));
+		s5p_gpio_cfg_pin(&gpio1->d1, 1, GPIO_FUNC(0x2));
+		break;
+	case PERIPH_ID_I2C1:
+		s5p_gpio_cfg_pin(&gpio1->d1, 2, GPIO_FUNC(0x2));
+		s5p_gpio_cfg_pin(&gpio1->d1, 3, GPIO_FUNC(0x2));
+		break;
+	case PERIPH_ID_I2C2:
+		s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C3:
+		s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C4:
+		s5p_gpio_cfg_pin(&gpio1->b, 2, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->b, 3, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C5:
+		s5p_gpio_cfg_pin(&gpio1->b, 6, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->b, 7, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C6:
+		s5p_gpio_cfg_pin(&gpio1->c1, 3, GPIO_FUNC(0x4));
+		s5p_gpio_cfg_pin(&gpio1->c1, 4, GPIO_FUNC(0x4));
+		break;
+	case PERIPH_ID_I2C7:
+		s5p_gpio_cfg_pin(&gpio1->d0, 2, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->d0, 3, GPIO_FUNC(0x3));
+		break;
+	}
+}
+
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
 	switch (peripheral) {

@@ -313,6 +354,16 @@ static int exynos4_pinmux_config(int peripheral, int flags)
 	case PERIPH_ID_SDMMC4:
 		printf("SDMMC device %d not implemented\n", peripheral);
 		return -1;
+	case PERIPH_ID_I2C0:
+	case PERIPH_ID_I2C1:
+	case PERIPH_ID_I2C2:
+	case PERIPH_ID_I2C3:
+	case PERIPH_ID_I2C4:
+	case PERIPH_ID_I2C5:
+	case PERIPH_ID_I2C6:
+	case PERIPH_ID_I2C7:
+		exynos4_i2c_config(peripheral, flags);
+		break;
 	default:
 		debug("%s: invalid peripheral %d", __func__, peripheral);
 		return -1;

index 9bc4c7f..90d297a 100644
@@ -27,7 +27,7 @@
  */
 
 #include <common.h>
-#ifdef CONFIG_EXYNOS5
+#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 #include <asm/arch/clk.h>
 #include <asm/arch/cpu.h>
 #else

@@ -62,7 +62,7 @@
 
 static unsigned int g_current_bus;	/* Stores Current I2C Bus */
 
-#ifndef CONFIG_EXYNOS5
+#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 static int GetI2CSDA(void)
 {
 	struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();

@@ -121,7 +121,12 @@ static void ReadWriteByte(struct s3c24x0_i2c *i2c)
 
 static struct s3c24x0_i2c *get_base_i2c(void)
 {
-#ifdef CONFIG_EXYNOS5
+#ifdef CONFIG_EXYNOS4
+	struct s3c24x0_i2c *i2c = (struct s3c24x0_i2c *)(samsung_get_base_i2c()
+							+ (EXYNOS4_I2C_SPACING
+							* g_current_bus));
+	return i2c;
+#elif defined CONFIG_EXYNOS5
 	struct s3c24x0_i2c *i2c = (struct s3c24x0_i2c *)(samsung_get_base_i2c()
 							+ (EXYNOS5_I2C_SPACING
 							* g_current_bus));

@@ -134,7 +139,7 @@ static struct s3c24x0_i2c *get_base_i2c(void)
 static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)
 {
 	ulong freq, pres = 16, div;
-#ifdef CONFIG_EXYNOS5
+#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 	freq = get_i2c_clk();
 #else
 	freq = get_PCLK();

@@ -188,7 +193,7 @@ unsigned int i2c_get_bus_num(void)
 void i2c_init(int speed, int slaveadd)
 {
 	struct s3c24x0_i2c *i2c;
-#ifndef CONFIG_EXYNOS5
+#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 	struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
 #endif
 	int i;

@@ -204,7 +209,7 @@ void i2c_init(int speed, int slaveadd)
 		i--;
 	}
 
-#ifndef CONFIG_EXYNOS5
+#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
 	if ((readl(&i2c->iicstat) & I2CSTAT_BSY) || GetI2CSDA() == 0) {
 #ifdef CONFIG_S3C2410
 		ulong old_gpecon = readl(&gpio->gpecon);

@@ -248,7 +253,7 @@ void i2c_init(int speed, int slaveadd)
 		writel(old_gpecon, &gpio->pgcon);
 #endif
 	}
-#endif /* #ifndef CONFIG_EXYNOS5 */
+#endif /* #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) */
 	i2c_ch_init(i2c, speed, slaveadd);
 }
 

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62 lines not on this page · raw message

index 36c6114..f50758b 100644
@@ -271,12 +271,12 @@ static int write_byte(uchar data)
 /*
  * Functions for multiple I2C bus handling
  */
-unsigned int i2c_get_bus_num(void)
+static unsigned int soft_i2c_get_bus_num(void)
 {
 	return i2c_bus_num;
 }
 
-int i2c_set_bus_num(unsigned int bus)
+static int soft_i2c_set_bus_num(unsigned int bus)
 {
 #if defined(CONFIG_I2C_MUX)
 	if (bus < CONFIG_SYS_MAX_I2C_BUS) {

@@ -337,7 +337,7 @@ static uchar read_byte(int ack)
 /*-----------------------------------------------------------------------
  * Initialization
  */
-void i2c_init (int speed, int slaveaddr)
+static void soft_i2c_init(int speed, int slaveaddr)
 {
 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
 	/* call board specific i2c bus reset routine before accessing the   */

@@ -360,7 +360,7 @@ void i2c_init (int speed, int slaveaddr)
  * completion of EEPROM writes since the chip stops responding until
  * the write completes (typically 10mSec).
  */
-int i2c_probe(uchar addr)
+static int soft_i2c_probe(uchar addr)
 {
 	int rc;
 

@@ -378,7 +378,8 @@ int i2c_probe(uchar addr)
 /*-----------------------------------------------------------------------
  * Read bytes
  */
-int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int
+soft_i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
 	int shift;
 	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",

@@ -452,7 +453,8 @@ int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 /*-----------------------------------------------------------------------
  * Write bytes
  */
-int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int
+soft_i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
 	int shift, failures = 0;
 

@@ -482,3 +484,49 @@ int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	send_stop();
 	return(failures);
 }
+
+#if defined(CONFIG_MULTI_I2C)
+struct i2c_ops soft_i2c_ops = {
+	.init        = soft_i2c_init,
+	.probe       = soft_i2c_probe,
+	.read        = soft_i2c_read,
+	.read_r      = NULL,
+	.write       = soft_i2c_write,
+	.get_bus_num = soft_i2c_get_bus_num,
+	.set_bus_num = soft_i2c_set_bus_num,
+};
+#else
+void i2c_init(int speed, int slaveaddr)
+{
+	return soft_i2c_init(speed, slaveaddr);
+}
+
+int i2c_probe(uchar chip)
+{
+	return soft_i2c_probe(chip);
+}
+
+int i2c_read(uchar chip, uint addr, int alen,
+	uchar *buffer, int len)
+{
+	return soft_i2c_read(chip, addr, alen, buffer, len);
+}
+
+int i2c_write(uchar chip, uint addr, int alen,
+	uchar *buffer, int len)
+{
+	return soft_i2c_write(chip, addr, alen, buffer, len);
+}
+
+#ifdef CONFIG_I2C_MULTI_BUS
+unsigned int i2c_get_bus_num(void)
+{
+	return soft_i2c_get_bus_num();
+}
+
+int i2c_set_bus_num(unsigned int bus)
+{
+	return soft_i2c_set_bus_num(bus);
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
+#endif

index 90d297a..d9e01f4 100644
@@ -168,7 +168,7 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd)
  */
 
 #ifdef CONFIG_I2C_MULTI_BUS
-int i2c_set_bus_num(unsigned int bus)
+static int s3c24x0_i2c_set_bus_num(unsigned int bus)
 {
 	struct s3c24x0_i2c *i2c;
 

@@ -184,13 +184,13 @@ int i2c_set_bus_num(unsigned int bus)
 	return 0;
 }
 
-unsigned int i2c_get_bus_num(void)
+static unsigned int s3c24x0_i2c_get_bus_num(void)
 {
 	return g_current_bus;
 }
 #endif
 
-void i2c_init(int speed, int slaveadd)
+static void s3c24x0_i2c_init(int speed, int slaveadd)
 {
 	struct s3c24x0_i2c *i2c;
 #if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)

@@ -415,7 +415,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
 	return result;
 }
 
-int i2c_probe(uchar chip)
+static int s3c24x0_i2c_probe(uchar chip)
 {
 	struct s3c24x0_i2c *i2c;
 	uchar buf[1];

@@ -431,7 +431,8 @@ int i2c_probe(uchar chip)
 	return i2c_transfer(i2c, I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK;
 }
 
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int
+s3c24x0_i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
 	struct s3c24x0_i2c *i2c;
 	uchar xaddr[4];

@@ -475,7 +476,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	return 0;
 }
 
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int
+s3c24x0_i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
 	struct s3c24x0_i2c *i2c;
 	uchar xaddr[4];

@@ -512,4 +514,60 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 		(i2c, I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
 		 len) != 0);
 }
+
+void s3c24x0_i2c_reset(void)
+{
+	struct s3c24x0_i2c *i2c;
+
+	i2c = get_base_i2c();
+
+	/* init to STATUS register */
+	writel(0, &i2c->iicstat);
+}
 #endif /* CONFIG_HARD_I2C */
+
+#if defined(CONFIG_MULTI_I2C)
+struct i2c_ops s3c24x0_i2c_ops = {
+	.init        = s3c24x0_i2c_init,
+	.probe       = s3c24x0_i2c_probe,
+	.read        = s3c24x0_i2c_read,
+	.write       = s3c24x0_i2c_write,
+	.get_bus_num = s3c24x0_i2c_get_bus_num,
+	.set_bus_num = s3c24x0_i2c_set_bus_num,
+	.reset       = s3c24x0_i2c_reset,
+};
+#else
+void i2c_init(int speed, int slaveaddr)
+{
+	return s3c24x0_i2c_init(speed, slaveaddr);
+}
+
+int i2c_probe(uchar chip)
+{
+	return s3c24x0_i2c_probe(chip);
+}
+
+int i2c_read(uchar chip, uint addr, int alen,
+	uchar *buffer, int len)
+{
+	return s3c24x0_i2c_read(chip, addr, alen, buffer, len);
+}
+
+int i2c_write(uchar chip, uint addr, int alen,
+	uchar *buffer, int len)
+{
+	return s3c24x0_i2c_write(chip, addr, alen, buffer, len);
+}
+
+#ifdef CONFIG_I2C_MULTI_BUS
+unsigned int i2c_get_bus_num(void)
+{
+	return s3c24x0_i2c_get_bus_num();
+}
+
+int i2c_set_bus_num(unsigned int bus)
+{
+	return s3c24x0_i2c_set_bus_num(bus);
+}
+#endif /* CONFIG_I2C_MULTI_BUS */
+#endif

index 16f099d..cc07058 100644
@@ -30,6 +30,13 @@
 #define _I2C_H_
 
 /*
+ * Multi_I2C header file.
+ */
+#if defined(CONFIG_MULTI_I2C)
+#include <multi_i2c.h>
+#endif
+
+/*
  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  *
  * The implementation MUST NOT use static or global variables if the

@@ -234,6 +241,10 @@ int i2c_set_bus_speed(unsigned int);
  *  Returns speed of currently active I2C bus in Hz
  */
 
+#if defined(CONFIG_MULTI_I2C)
+void i2c_reset(void);
+#endif
+
 unsigned int i2c_get_bus_speed(void);
 
 /* NOTE: These two functions MUST be always_inline to avoid code growth! */

index afbe4b3..b51d214 100644
@@ -24,6 +24,7 @@
  */
 
 #include <common.h>
+#include <i2c.h>
 #include <lcd.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>

@@ -65,6 +66,24 @@ static int hwrevision(int rev)
 
 struct s3c_plat_otg_data s5pc210_otg_data;
 
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+static int board_i2c_init(void)
+{
+	int i, err;
+
+	for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) {
+		err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+						PINMUX_FLAG_NONE);
+		if (err) {
+			debug("I2C%d not configured\n", (PERIPH_ID_I2C0 + i));
+			return err;
+		}
+	}
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	return 0;
+}
+#endif
+
 int board_init(void)
 {
 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;

@@ -72,19 +91,27 @@ int board_init(void)
 	check_hw_revision();
 	printf("HW Revision:\t0x%x\n", board_rev);
 
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+	board_i2c_init();
+#endif
+
 	return 0;
 }
 
 void i2c_init_board(void)
 {
+#ifndef CONFIG_MULTI_I2C
 	struct exynos4_gpio_part1 *gpio1 =
 		(struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
-	struct exynos4_gpio_part2 *gpio2 =
-		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
 
 	/* I2C_5 -> PMIC */
 	s5p_gpio_direction_output(&gpio1->b, 7, 1);
 	s5p_gpio_direction_output(&gpio1->b, 6, 1);
+#endif
+
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+
 	/* I2C_9 -> FG */
 	s5p_gpio_direction_output(&gpio2->y4, 0, 1);
 	s5p_gpio_direction_output(&gpio2->y4, 1, 1);

@@ -588,6 +615,10 @@ int board_early_init_f(void)
 	board_uart_init();
 	board_power_init();
 
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+	board_i2c_init();
+#endif
+
 	return 0;
 }
 

index 268a97b..b56fc0d 100644
@@ -32,6 +32,7 @@
  */
 #define CONFIG_SAMSUNG		/* in a SAMSUNG core */
 #define CONFIG_S5P		/* which is in a S5P Family */
+#define CONFIG_EXYNOS4		/* which is in a EXYNOS4XXX */
 #define CONFIG_EXYNOS4210	/* which is in a EXYNOS4210 */
 #define CONFIG_TRATS		/* working with TRATS */
 #define CONFIG_TIZEN		/* TIZEN lib */

@@ -216,7 +217,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_CACHELINE_SIZE       32
 
-
 #define CONFIG_SOFT_I2C
 #define CONFIG_SOFT_I2C_READ_REPEATED_START
 #define CONFIG_SYS_I2C_INIT_BOARD

@@ -225,6 +225,13 @@
 #define CONFIG_SOFT_I2C_MULTI_BUS
 #define CONFIG_SYS_MAX_I2C_BUS	15
 
+#define CONFIG_MULTI_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_MAX_I2C_NUM	7
+#define CONFIG_SYS_I2C_SLAVE	0x0
+#define CONFIG_CMD_I2C
+
 #include <asm/arch/gpio.h>
 
 /* I2C PMIC */