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Move GIC and VIC to drivers/irqchip

PATCH New Rob Herring 5 participants 15 messages Oct 30, 2012 – Oct 31, 2012

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#0 lore raw

cover Move GIC and VIC to drivers/irqchip

From: Rob Herring <[email protected]>

I think I had this action from San Francisco Linaro Connect. Well, better late than never... Now we need to move GIC for use by arm64.

This series builds on Thomas Petazzoni's series adding a common irqchip init function[1] and moves the ARM GIC and VIC irqchip code to drivers/irqchip.

Tested on highbank and compiled on all defconfigs.

Rob

[1] http://www.spinics.net/lists/arm-kernel/msg203687.html

Rob Herring (3):
irqchip: Move ARM GIC to drivers/irqchip
irqchip: Move ARM VIC to drivers/irqchip
ARM: highbank: use common irqchip_init

 arch/arm/common/Kconfig                            |   23 -------------------
 arch/arm/common/Makefile                           |    2 --
 arch/arm/mach-highbank/highbank.c                  |    8 ++-----
 drivers/irqchip/Kconfig                            |   23 +++++++++++++++++++
 drivers/irqchip/Makefile                           |    2 ++
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
 arch/arm/common/vic.c => drivers/irqchip/irq-vic.c |    0
 drivers/irqchip/irqchip.c                          |   24 ++++++++++++++++++++
 drivers/irqchip/irqchip.h                          |    2 ++
 9 files changed, 53 insertions(+), 31 deletions(-)
 rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)
 rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (100%)
Signature · 1 line
1.7.10.4
#1 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

From: Rob Herring <[email protected]>

Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64.

Cc Russell King <[email protected]>
Cc Thomas Gleixner <[email protected]>
---
 arch/arm/common/Kconfig                            |    8 --------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |    8 ++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
 drivers/irqchip/irqchip.c                          |   10 ++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 20 insertions(+), 9 deletions(-)
 rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (100%)
arch/arm/common/Kconfig +0 -8
index 45ceeb0..7bf52b2 100644
@@ -1,11 +1,3 @@
-config ARM_GIC
-	bool
-	select IRQ_DOMAIN
-	select MULTI_IRQ_HANDLER
-
-config GIC_NON_BANKED
-	bool
-
 config ARM_VIC
 	bool
 	select IRQ_DOMAIN
arch/arm/common/Makefile +0 -1
index e8a4e58..4104b82 100644
@@ -2,7 +2,6 @@
 # Makefile for the linux kernel.
 #
 
-obj-$(CONFIG_ARM_GIC)		+= gic.o
 obj-$(CONFIG_ARM_VIC)		+= vic.o
 obj-$(CONFIG_ICST)		+= icst.o
 obj-$(CONFIG_SA1111)		+= sa1111.o
drivers/irqchip/Kconfig +8 -0
index 88b0929..2d7f350 100644
@@ -1,3 +1,11 @@
 config IRQCHIP
 	def_bool y
 	depends on OF_IRQ
+
+config ARM_GIC
+	bool
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+
+config GIC_NON_BANKED
+	bool
drivers/irqchip/Makefile +1 -0
index 5148ffd..94118db 100644
@@ -1,3 +1,4 @@
 obj-$(CONFIG_IRQCHIP) += irqchip.o
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
 obj-$(CONFIG_ARCH_MVEBU)   += irq-armada-370-xp.o
+obj-$(CONFIG_ARM_GIC)   += irq-gic.o
drivers/irqchip/irq-gic.c renamed from arch/arm/common/gic.c +0 -0
similarity index 100%
rename from arch/arm/common/gic.c
rename to drivers/irqchip/irq-gic.c
drivers/irqchip/irqchip.c +10 -0
index f36d423..3f37397 100644
@@ -14,6 +14,16 @@
 #include "irqchip.h"
 
 static const struct of_device_id irqchip_of_match[] __initconst = {
+#ifdef CONFIG_ARM_GIC
+	{
+		.compatible = "arm,cortex-a15-gic",
+		.data = gic_of_init,
+	},
+	{
+		.compatible = "arm,cortex-a9-gic",
+		.data = gic_of_init,
+	},
+#endif
 #ifdef CONFIG_ARCH_BCM2835
 	{
 		.compatible = "brcm,bcm2835-armctrl-ic",
drivers/irqchip/irqchip.h +1 -0
index 0a0d7af..62773ab3 100644
@@ -14,5 +14,6 @@
 int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
 int armada_370_xp_mpic_of_init(struct device_node *node,
 			       struct device_node *parent);
+int gic_of_init(struct device_node *node, struct device_node *parent);
 
 #endif
Signature · 1 line
1.7.10.4
#2 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Rob,

Quoted 8 lines · Rob Herring

From: Rob Herring <[email protected]>

Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64.

Cc Russell King <[email protected]>
Cc Thomas Gleixner <[email protected]>
Quoted 9 lines
---
 arch/arm/common/Kconfig                            |    8 --------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |    8 ++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
 drivers/irqchip/irqchip.c                          |   10 ++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 20 insertions(+), 9 deletions(-)

What about arch/arm/include/asm/hardware/gic.h ?

Contrary to the current version of the bcm2835 IRQ controller driver and the armada-370-xp IRQ controller driver, the GIC and VIC drivers not only expose a <foo>_of_init() function, but also other functions that are directly used by several non-DT capable ARM sub-architectures.

Of course, it works by leaving gic.h where it is now, but it sounds strange to have the driver in drivers/irqchip/ and the header file in arch/arm/include/asm/hardware/, especially if the goal is to be able to use those drivers in arm64.

Best regards,

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#3 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Quoted 28 lines · Thomas Petazzoni

Rob,

Quoted 8 lines · Rob Herring

From: Rob Herring <[email protected]>

Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64.

Cc Russell King <[email protected]>
Cc Thomas Gleixner <[email protected]>
Quoted 9 lines
---
 arch/arm/common/Kconfig                            |    8 --------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |    8 ++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
 drivers/irqchip/irqchip.c                          |   10 ++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 20 insertions(+), 9 deletions(-)

What about arch/arm/include/asm/hardware/gic.h ?

Contrary to the current version of the bcm2835 IRQ controller driver and the armada-370-xp IRQ controller driver, the GIC and VIC drivers not only expose a <foo>_of_init() function, but also other functions that are directly used by several non-DT capable ARM sub-architectures.

Quoted 4 lines

Of course, it works by leaving gic.h where it is now, but it sounds strange to have the driver in drivers/irqchip/ and the header file in arch/arm/include/asm/hardware/, especially if the goal is to be able to use those drivers in arm64.

Right. I'll have to move it. I wasn't really thinking about arm64 until this morning.

Rob

#4 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Quoted 29 lines · Rob Herring
Quoted 28 lines · Thomas Petazzoni

Rob,

Quoted 8 lines · Rob Herring

From: Rob Herring <[email protected]>

Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64.

Cc Russell King <[email protected]>
Cc Thomas Gleixner <[email protected]>
Quoted 9 lines
---
 arch/arm/common/Kconfig                            |    8 --------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |    8 ++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/gic.c => drivers/irqchip/irq-gic.c |    0
 drivers/irqchip/irqchip.c                          |   10 ++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 20 insertions(+), 9 deletions(-)

What about arch/arm/include/asm/hardware/gic.h ?

Contrary to the current version of the bcm2835 IRQ controller driver and the armada-370-xp IRQ controller driver, the GIC and VIC drivers not only expose a <foo>_of_init() function, but also other functions that are directly used by several non-DT capable ARM sub-architectures.

Quoted 7 lines
Quoted 4 lines

Of course, it works by leaving gic.h where it is now, but it sounds strange to have the driver in drivers/irqchip/ and the header file in arch/arm/include/asm/hardware/, especially if the goal is to be able to use those drivers in arm64.

Right. I'll have to move it. I wasn't really thinking about arm64 until this morning.

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly. Perhaps we need to support this generically in irqchip code. So I'll leave them in the current header and arm64 can add the necessary support it needs.

Rob

#5 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Rob,

Quoted 11 lines · Rob Herring
Quoted 2 lines

Right. I'll have to move it. I wasn't really thinking about arm64 until this morning.

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly. Perhaps we need to support this generically in irqchip code. So I'll leave them in the current header and arm64 can add the necessary support it needs.

The thing is that we have the same problem for the armada-370-xp IRQ controller driver. In its current form, it doesn't need to expose any symbol to the mach-mvebu code except the initialization function. However, with the SMP support, we need to expose a bunch of symbols, which kind of violates the whole idea of the drivers/irqchip infrastructure, which was aiming at limiting the number of header files added in <linux/irqchip/...> for each and every IRQ controller driver.

As you say, we maybe need to support thing like yyy_raise_softirq() generically in the irqchip code.

Thomas

Signature · 4 lines
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
#6 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

In reply to Rob Herring
Quoted 6 lines · Rob Herring

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly.

Softirqs are about the SPIs which are used for SMP IPIs and platform specific wakeup of CPUs. And platform code _needs_ to specify the way IPIs are delivered on the platform. irqchip can't do that because irqchip knows nothing about SPIs (neither does genirq.)

The thing about gic_cascade_irq() is that it's to do with handling the (rare) case of having a system with two GICs cascaded together. There's only one set of platforms I know of which has that kind of madness and it's the ARM development platforms, where the baseboard has a GIC, and the SMP tile has its own GIC as part of the SMP implementation.

Apart from that, gic_cascade_irq() should not be used - it should probably be ifdef'd out when not on one of the ARM dev platforms which suffer this weirdness.

#7 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Quoted 8 lines · Russell King - ARM Linux
Quoted 6 lines · Rob Herring

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly.

Quoted 4 lines

Softirqs are about the SPIs which are used for SMP IPIs and platform specific wakeup of CPUs. And platform code _needs_ to specify the way IPIs are delivered on the platform. irqchip can't do that because irqchip knows nothing about SPIs (neither does genirq.)

Right. v7 is unchanged, so the question is really only about how v8 will do this. Hopefully, ARM is standardizing this for v8. We probably want the gic (or other irqchip) to setup a raise_softirq function ptr on init rather than having a direct call to gic_raise_softirq.

Rob

Quoted 10 lines

The thing about gic_cascade_irq() is that it's to do with handling the (rare) case of having a system with two GICs cascaded together. There's only one set of platforms I know of which has that kind of madness and it's the ARM development platforms, where the baseboard has a GIC, and the SMP tile has its own GIC as part of the SMP implementation.

Apart from that, gic_cascade_irq() should not be used - it should probably be ifdef'd out when not on one of the ARM dev platforms which suffer this weirdness.

#8 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Quoted 14 lines · Rob Herring
Quoted 8 lines · Russell King - ARM Linux
Quoted 6 lines · Rob Herring

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly.

Quoted 4 lines

Softirqs are about the SPIs which are used for SMP IPIs and platform specific wakeup of CPUs. And platform code _needs_ to specify the way IPIs are delivered on the platform. irqchip can't do that because irqchip knows nothing about SPIs (neither does genirq.)

Quoted 4 lines

Right. v7 is unchanged, so the question is really only about how v8 will do this. Hopefully, ARM is standardizing this for v8. We probably want the gic (or other irqchip) to setup a raise_softirq function ptr on init rather than having a direct call to gic_raise_softirq.

We already have that, except it's up to platforms to setup that pointer via a function call into the SMP code - it's called set_smp_cross_call(). We could move that into the GIC code, as we don't have anyone with a GIC which doesn't use gic_raise_softirq.

The only thing to remember is that there's non-SMP platforms with GICs.

#9 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

In reply to Rob Herring
Quoted 14 lines · Rob Herring
Quoted 8 lines · Russell King - ARM Linux
Quoted 6 lines · Rob Herring

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly.

Quoted 4 lines

Softirqs are about the SPIs which are used for SMP IPIs and platform specific wakeup of CPUs. And platform code _needs_ to specify the way IPIs are delivered on the platform. irqchip can't do that because irqchip knows nothing about SPIs (neither does genirq.)

Quoted 4 lines

Right. v7 is unchanged, so the question is really only about how v8 will do this. Hopefully, ARM is standardizing this for v8. We probably want the gic (or other irqchip) to setup a raise_softirq function ptr on init rather than having a direct call to gic_raise_softirq.

In my sample ARMv8 model code I have an older version of gic.c moved to drivers/irqchip and modified just for the arm64 needs. The gic_of_init() function calls set_smp_cross_call(git_raise_softirq).

http://git.kernel.org/?p=linux/kernel/git/cmarinas/linux-aarch64.git;a=commitdiff;h=5cd20480f4d7b56160b3312df14fba3b2bda6798

The gic_secondary_init() is done from a CPU notifier as I wanted to separate this from the SoC code (even on arch/arm, all the calls to gic_secondary_init() are the same, so it could be factored out to a notifier or some function pointer set by gic.c).

And let's assume there is no need for gic_cascade_irq().

Signature · 1 line
Catalin
#10 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Quoted 24 lines · Catalin Marinas
Quoted 14 lines · Rob Herring
Quoted 8 lines · Russell King - ARM Linux
Quoted 6 lines · Rob Herring

Looking at this some more, arm64 doesn't need most of what's in gic.h. The register defines should be moved into the .c file. The remaining function declarations either are not needed (i.e. gic_init) or should should be done like the handle_irq function pointer init. We don't want to have platform code calling gic_cascade_irq or gic_raise_softirq directly.

Quoted 4 lines

Softirqs are about the SPIs which are used for SMP IPIs and platform specific wakeup of CPUs. And platform code _needs_ to specify the way IPIs are delivered on the platform. irqchip can't do that because irqchip knows nothing about SPIs (neither does genirq.)

Quoted 4 lines

Right. v7 is unchanged, so the question is really only about how v8 will do this. Hopefully, ARM is standardizing this for v8. We probably want the gic (or other irqchip) to setup a raise_softirq function ptr on init rather than having a direct call to gic_raise_softirq.

In my sample ARMv8 model code I have an older version of gic.c moved to drivers/irqchip and modified just for the arm64 needs. The gic_of_init() function calls set_smp_cross_call(git_raise_softirq).

Quoted 8 lines

http://git.kernel.org/?p=linux/kernel/git/cmarinas/linux-aarch64.git;a=commitdiff;h=5cd20480f4d7b56160b3312df14fba3b2bda6798

The gic_secondary_init() is done from a CPU notifier as I wanted to separate this from the SoC code (even on arch/arm, all the calls to gic_secondary_init() are the same, so it could be factored out to a notifier or some function pointer set by gic.c).

And let's assume there is no need for gic_cascade_irq().

What about other asm header dependencies? cpu_logical_map is needed for example. I guess I'll leave all those for now.

Rob

#11 lore raw

PATCH 1/3 irqchip: Move ARM GIC to drivers/irqchip

Quoted 2 lines · Rob Herring

What about other asm header dependencies? cpu_logical_map is needed for example. I guess I'll leave all those for now.

That's one of the down-sides to moving this code out of arch/arm - your existing set of five patches adds to the required asm headers (eg, it now needs set_smp_cross_call() from ARMs asm/smp.h, whereas it didn't need that before) and any SMP architecture re-using the GIC will need to provide this function whether or not they use the SPI facility.

Further comments against your patch set...

#12 lore raw

PATCH 2/3 irqchip: Move ARM VIC to drivers/irqchip

In reply to Rob Herring

From: Rob Herring <[email protected]>

Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip.

Cc Russell King <[email protected]>
Cc Thomas Gleixner <[email protected]>
---
 arch/arm/common/Kconfig                            |   15 ---------------
 arch/arm/common/Makefile                           |    1 -
 drivers/irqchip/Kconfig                            |   15 +++++++++++++++
 drivers/irqchip/Makefile                           |    1 +
 arch/arm/common/vic.c => drivers/irqchip/irq-vic.c |    0
 drivers/irqchip/irqchip.c                          |   14 ++++++++++++++
 drivers/irqchip/irqchip.h                          |    1 +
 7 files changed, 31 insertions(+), 16 deletions(-)
 rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (100%)
arch/arm/common/Kconfig +0 -15
index 7bf52b2..9353184 100644
@@ -1,18 +1,3 @@
-config ARM_VIC
-	bool
-	select IRQ_DOMAIN
-	select MULTI_IRQ_HANDLER
-
-config ARM_VIC_NR
-	int
-	default 4 if ARCH_S5PV210
-	default 3 if ARCH_S5PC100
-	default 2
-	depends on ARM_VIC
-	help
-	  The maximum number of VICs available in the system, for
-	  power management.
-
 config ICST
 	bool
 
arch/arm/common/Makefile +0 -1
index 4104b82..dc8dd0d 100644
@@ -2,7 +2,6 @@
 # Makefile for the linux kernel.
 #
 
-obj-$(CONFIG_ARM_VIC)		+= vic.o
 obj-$(CONFIG_ICST)		+= icst.o
 obj-$(CONFIG_SA1111)		+= sa1111.o
 obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
drivers/irqchip/Kconfig +15 -0
index 2d7f350..d80e5c7 100644
@@ -9,3 +9,18 @@ config ARM_GIC
 
 config GIC_NON_BANKED
 	bool
+
+config ARM_VIC
+	bool
+	select IRQ_DOMAIN
+	select MULTI_IRQ_HANDLER
+
+config ARM_VIC_NR
+	int
+	default 4 if ARCH_S5PV210
+	default 3 if ARCH_S5PC100
+	default 2
+	depends on ARM_VIC
+	help
+	  The maximum number of VICs available in the system, for
+	  power management.
drivers/irqchip/Makefile +1 -0
index 94118db..9c7f91e 100644
@@ -2,3 +2,4 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o
 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
 obj-$(CONFIG_ARCH_MVEBU)   += irq-armada-370-xp.o
 obj-$(CONFIG_ARM_GIC)   += irq-gic.o
+obj-$(CONFIG_ARM_VIC)   += irq-vic.o
drivers/irqchip/irq-vic.c renamed from arch/arm/common/vic.c +0 -0
similarity index 100%
rename from arch/arm/common/vic.c
rename to drivers/irqchip/irq-vic.c
drivers/irqchip/irqchip.c +14 -0
index 3f37397..0872cd7 100644
@@ -24,6 +24,20 @@ static const struct of_device_id irqchip_of_match[] __initconst = {
 		.data = gic_of_init,
 	},
 #endif
+#ifdef CONFIG_ARM_VIC
+	{
+		.compatible = "arm,versatile-vic",
+		.data = vic_of_init,
+	},
+	{
+		.compatible = "arm,pl190-vic",
+		.data = vic_of_init,
+	},
+	{
+		.compatible = "arm,pl190-vic",
+		.data = vic_of_init,
+	},
+#endif
 #ifdef CONFIG_ARCH_BCM2835
 	{
 		.compatible = "brcm,bcm2835-armctrl-ic",
drivers/irqchip/irqchip.h +1 -0
index 62773ab3..8b8c2b2 100644
@@ -15,5 +15,6 @@ int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent);
 int armada_370_xp_mpic_of_init(struct device_node *node,
 			       struct device_node *parent);
 int gic_of_init(struct device_node *node, struct device_node *parent);
+int vic_of_init(struct device_node *node, struct device_node *parent);
 
 #endif
Signature · 1 line
1.7.10.4
#13 lore raw

PATCH 2/3 irqchip: Move ARM VIC to drivers/irqchip

drivers/irqchip/irq-vic.c

Quoted 8 lines · Rob Herring

From: Rob Herring <[email protected]>

Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip.

drivers/irqchip/irq-vic.c renamed from arch/arm/common/vic.c +0 -0
similarity index 100%
rename from arch/arm/common/vic.c
rename to drivers/irqchip/irq-vic.c

"gic" and "vic" seems a little generic for filenames and symbol names; what about irq-arm-vic.c and irq-arm-gic.c? Similarly...

drivers/irqchip/irqchip.h int bcm2835_irqchip_init(struct device_node *node, struct device_node *parent); · line 18

Quoted 4 lines
drivers/irqchip/irqchip.h +1 -0
 
 int gic_of_init(struct device_node *node, struct device_node *parent);
+int vic_of_init(struct device_node *node, struct device_node *parent);

... perhaps rename those to arm_[gv]ic_of_init()?

Are/will there be multiple versions of the GIC? I guess we can always introduce a GIC2 later if needed, and leave the current one with an unversioned name.

#14 lore raw

PATCH 3/3 ARM: highbank: use common irqchip_init

In reply to Rob Herring

From: Rob Herring <[email protected]>

Now that we have common irqchip init, use it on highbank platform.

---
 arch/arm/mach-highbank/highbank.c |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)
arch/arm/mach-highbank/highbank.c +2 -6
index 40e36a5..27b77da 100644
@@ -18,6 +18,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
@@ -82,11 +83,6 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
 			  HB_JUMP_TABLE_PHYS(cpu) + 15);
 }
 
-const static struct of_device_id irq_match[] = {
-	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
-	{}
-};
-
 #ifdef CONFIG_CACHE_L2X0
 static void highbank_l2x0_disable(void)
 {
@@ -97,7 +93,7 @@ static void highbank_l2x0_disable(void)
 
 static void __init highbank_init_irq(void)
 {
-	of_irq_init(irq_match);
+	irqchip_init();
 
 #ifdef CONFIG_CACHE_L2X0
 	/* Enable PL310 L2 Cache controller */
Signature · 1 line
1.7.10.4