Skip to contentSkip to conversation

ath9k: [DFS] add pulse width tolerance for ETSI

PATCH New Zefir Kurtisi 3 participants 5 messages Oct 31, 2012 Qualcomm Atheros ATH9K wireless driver

lore
Share & tools
lore

Zefir Kurtisi

author
#0 lore raw

PATCH 1/1 ath9k: [DFS] add pulse width tolerance for ETSI

Add 5% width tolerance for radar patterns defined by ETSI.

Signed-off-by Zefir Kurtisi <[email protected]>
---
 .../net/wireless/ath/ath9k/dfs_pattern_detector.c  |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +6 -1
index 3b12914..24877b0 100644
@@ -42,10 +42,15 @@ struct radar_types {
 #define MIN_PPB_THRESH	50
 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
 #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
+/* percentage of pulse width tolerance */
+#define WIDTH_TOLERANCE 5
+#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
+#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)
 
 #define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB)	\
 {								\
-	ID, WMIN, WMAX, (PRF2PRI(PMAX) - PRI_TOLERANCE),	\
+	ID, WIDTH_LOWER(WMIN), WIDTH_UPPER(WMAX),		\
+	(PRF2PRI(PMAX) - PRI_TOLERANCE),			\
 	(PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF,	\
 	PPB_THRESH(PPB), PRI_TOLERANCE,				\
 }
Signature · 1 line
1.7.4.1
#1 lore raw

PATCH 1/1 ath9k: [DFS] add pulse width tolerance for ETSI

Quoted 12 lines · Zefir Kurtisi

Add 5% width tolerance for radar patterns defined by ETSI.

Signed-off-by Zefir Kurtisi <[email protected]>
---
 .../net/wireless/ath/ath9k/dfs_pattern_detector.c  |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +0 -0
index 3b12914..24877b0 100644

drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c struct radar_types { · line 48

Quoted 7 lines
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +4 -0
@@ -42,10 +42,15 @@ struct radar_types {
 #define MIN_PPB_THRESH	50
 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
 #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
+/* percentage of pulse width tolerance */
+#define WIDTH_TOLERANCE 5
+#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
+#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)

                                                   ^^^

Why are you adding 50 there? If you want to just add 5% tolerance, then the +50 is wrong there, but I do not know anything about radar patterns defined by ETSI.

Hauke

#2 lore raw

PATCH 1/1 ath9k: [DFS] add pulse width tolerance for ETSI

Quoted 21 lines · Hauke Mehrtens
Quoted 12 lines · Zefir Kurtisi

Add 5% width tolerance for radar patterns defined by ETSI.

Signed-off-by Zefir Kurtisi <[email protected]>
---
 .../net/wireless/ath/ath9k/dfs_pattern_detector.c  |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +0 -0
index 3b12914..24877b0 100644

drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c struct radar_types { · line 48

Quoted 7 lines
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +4 -0
@@ -42,10 +42,15 @@ struct radar_types {
 #define MIN_PPB_THRESH	50
 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
 #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
+/* percentage of pulse width tolerance */
+#define WIDTH_TOLERANCE 5
+#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
+#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)

                                                   ^^^
Quoted 3 lines

Why are you adding 50 there? If you want to just add 5% tolerance, then the +50 is wrong there, but I do not know anything about radar patterns defined by ETSI.

I think the 50 is correct here. It's not the tolerance (which is already included via WIDTH_TOLERANCE in that macro), it's to account for rounding issues.
Having said that, I wonder if it shouldn't be -50 instead of +50 in WIDTH_LOWER().

- Felix

author
#3 lore raw

PATCH 1/1 ath9k: [DFS] add pulse width tolerance for ETSI

Quoted 25 lines · Felix Fietkau
Quoted 21 lines · Hauke Mehrtens
Quoted 12 lines · Zefir Kurtisi

Add 5% width tolerance for radar patterns defined by ETSI.

Signed-off-by Zefir Kurtisi <[email protected]>
---
 .../net/wireless/ath/ath9k/dfs_pattern_detector.c  |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +0 -0
index 3b12914..24877b0 100644

drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c struct radar_types { · line 48

Quoted 7 lines
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +4 -0
@@ -42,10 +42,15 @@ struct radar_types {
 #define MIN_PPB_THRESH	50
 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
 #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
+/* percentage of pulse width tolerance */
+#define WIDTH_TOLERANCE 5
+#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
+#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)

                                                   ^^^
Quoted 3 lines

Why are you adding 50 there? If you want to just add 5% tolerance, then the +50 is wrong there, but I do not know anything about radar patterns defined by ETSI.

Quoted 8 lines

I think the 50 is correct here. It's not the tolerance (which is already included via WIDTH_TOLERANCE in that macro), it's to account for rounding issues.
Having said that, I wonder if it shouldn't be -50 instead of +50 in WIDTH_LOWER().

- Felix

Right (you were faster on clarifying, thanks ;)).

As for the -50: the macros do rounding to the nearest int, while your proposal would resemble a floor(), which would result in the values being decremented from their current value. Given that 5us would be corrected to 4us, I think it is better to go for the round() approach to keep detection balanced.

It is maybe not relevant at all for the lower ranges, I came up with the modification since we had failures detecting type 4 patterns with maximum pulse width including margin with a total of 31us.

(FYI, other than that, the DFS detector works well enough for certification by ETSI.)

Cheers,
Zefir

author
#4 lore raw

PATCH 1/1 ath9k: [DFS] add pulse width tolerance for ETSI

In reply to Hauke Mehrtens
Quoted 21 lines · Hauke Mehrtens
Quoted 12 lines · Zefir Kurtisi

Add 5% width tolerance for radar patterns defined by ETSI.

Signed-off-by Zefir Kurtisi <[email protected]>
---
 .../net/wireless/ath/ath9k/dfs_pattern_detector.c  |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +0 -0
index 3b12914..24877b0 100644

drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c struct radar_types { · line 48

Quoted 7 lines
drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c +4 -0
@@ -42,10 +42,15 @@ struct radar_types {
 #define MIN_PPB_THRESH	50
 #define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)
 #define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)
+/* percentage of pulse width tolerance */
+#define WIDTH_TOLERANCE 5
+#define WIDTH_LOWER(X) ((X*(100-WIDTH_TOLERANCE)+50)/100)
+#define WIDTH_UPPER(X) ((X*(100+WIDTH_TOLERANCE)+50)/100)

                                                   ^^^
Quoted 6 lines

Why are you adding 50 there? If you want to just add 5% tolerance, then the +50 is wrong there, but I do not know anything about radar patterns defined by ETSI.

Hauke

Hi Hauke,

the 50 you are referring to are not the 5% defined by ETSI but used for proper rounding in the percentage domain within that macros.

Take pattern 4 with a maximum pulse width of 30us, WIDTH_UPPER(30) then calculates to 32. Since the HW's pulse width resolution is 1us, there is no need to move to the nsec domain.