ARM: dts: OMAP4/5 device-tree timer updates
cover ARM: dts: OMAP4/5 device-tree timer updates
A few device tree timer updates for OMAP4/5 devices.
This series adds ...
1. MPU private addresses for OMAP4 timers
2. Timer nodes for OMAP5
3. 32kHz counter node for OMAP5
This is based upon of Benoit Cousson's OMAP device-tree branch for v3.8.
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git for_3.8/dts
Jon Hunter (3):
ARM: dts: Update OMAP4 timer addresses
ARM: dts: Add OMAP5 timer nodes
ARM: dts: Add OMAP5 counter node
arch/arm/boot/dts/omap4.dtsi | 20 +++++---- arch/arm/boot/dts/omap5.dtsi | 95 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 107 insertions(+), 8 deletions(-)
Signature · 1 line
1.7.9.5
PATCH 1/3 ARM: dts: Update OMAP4 timer addresses
For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation.
--- arch/arm/boot/dts/omap4.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)
arch/arm/boot/dts/omap4.dtsi +12 -8
@@ -469,33 +469,37 @@ ti,hwmods = "timer4"; }; - timer5: timer at 49038000 { + timer5: timer at 40138000 { compatible = "ti,omap2-timer"; - reg = <0x49038000 0x80>; + reg = <0x40138000 0x80>, + <0x49038000 0x80>; interrupts = <0 41 0x4>; ti,hwmods = "timer5"; ti,timer-dsp; }; - timer6: timer at 4903a000 { + timer6: timer at 4013a000 { compatible = "ti,omap2-timer"; - reg = <0x4903a000 0x80>; + reg = <0x4013a000 0x80>, + <0x4903a000 0x80>; interrupts = <0 42 0x4>; ti,hwmods = "timer6"; ti,timer-dsp; }; - timer7: timer at 4903c000 { + timer7: timer at 4013c000 { compatible = "ti,omap2-timer"; - reg = <0x4903c000 0x80>; + reg = <0x4013c000 0x80>, + <0x4903c000 0x80>; interrupts = <0 43 0x4>; ti,hwmods = "timer7"; ti,timer-dsp; }; - timer8: timer at 4903e000 { + timer8: timer at 4013e000 { compatible = "ti,omap2-timer"; - reg = <0x4903e000 0x80>; + reg = <0x4013e000 0x80>, + <0x4903e000 0x80>; interrupts = <0 44 0x4>; ti,hwmods = "timer8"; ti,timer-pwm;
Signature · 1 line
1.7.9.5
PATCH 2/3 ARM: dts: Add OMAP5 timer nodes
In reply to Jon HunterAdd the 11 timer nodes for OMAP5 devices.
--- arch/arm/boot/dts/omap5.dtsi | 89 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+)
arch/arm/boot/dts/omap5.dtsi +89 -0
@@ -379,5 +379,94 @@ ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; }; + + timer1: timer at 4ae18000 { + compatible = "ti,omap2-timer"; + reg = <0x4ae18000 0x80>; + interrupts = <0 37 0x4>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer at 48032000 { + compatible = "ti,omap2-timer"; + reg = <0x48032000 0x80>; + interrupts = <0 38 0x4>; + ti,hwmods = "timer2"; + }; + + timer3: timer at 48034000 { + compatible = "ti,omap2-timer"; + reg = <0x48034000 0x80>; + interrupts = <0 39 0x4>; + ti,hwmods = "timer3"; + }; + + timer4: timer at 48036000 { + compatible = "ti,omap2-timer"; + reg = <0x48036000 0x80>; + interrupts = <0 40 0x4>; + ti,hwmods = "timer4"; + }; + + timer5: timer at 40138000 { + compatible = "ti,omap2-timer"; + reg = <0x40138000 0x80>, + <0x49038000 0x80>; + interrupts = <0 41 0x4>; + ti,hwmods = "timer5"; + ti,timer-dsp; + }; + + timer6: timer at 4013a000 { + compatible = "ti,omap2-timer"; + reg = <0x4013a000 0x80>, + <0x4903a000 0x80>; + interrupts = <0 42 0x4>; + ti,hwmods = "timer6"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer7: timer at 4013c000 { + compatible = "ti,omap2-timer"; + reg = <0x4013c000 0x80>, + <0x4903c000 0x80>; + interrupts = <0 43 0x4>; + ti,hwmods = "timer7"; + ti,timer-dsp; + }; + + timer8: timer at 4013e000 { + compatible = "ti,omap2-timer"; + reg = <0x4013e000 0x80>, + <0x4903e000 0x80>; + interrupts = <0 44 0x4>; + ti,hwmods = "timer8"; + ti,timer-dsp; + ti,timer-pwm; + }; + + timer9: timer at 4803e000 { + compatible = "ti,omap2-timer"; + reg = <0x4803e000 0x80>; + interrupts = <0 45 0x4>; + ti,hwmods = "timer9"; + }; + + timer10: timer at 48086000 { + compatible = "ti,omap2-timer"; + reg = <0x48086000 0x80>; + interrupts = <0 46 0x4>; + ti,hwmods = "timer10"; + }; + + timer11: timer at 48088000 { + compatible = "ti,omap2-timer"; + reg = <0x48088000 0x80>; + interrupts = <0 47 0x4>; + ti,hwmods = "timer11"; + ti,timer-pwm; + }; }; };
Signature · 1 line
1.7.9.5
PATCH 3/3 ARM: dts: Add OMAP5 counter node
In reply to Jon HunterAdd the 32kHz counter node for OMAP5 devices.
--- arch/arm/boot/dts/omap5.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm/boot/dts/omap5.dtsi +6 -0
@@ -77,6 +77,12 @@ ranges; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; + counter32k: counter at 4ae04000 { + compatible = "ti,omap-counter32k"; + reg = <0x4ae04000 0x40>; + ti,hwmods = "counter_32k"; + }; + omap5_pmx_core: pinmux at 4a002840 { compatible = "ti,omap4-padconf", "pinctrl-single"; reg = <0x4a002840 0x01b6>;
Signature · 1 line
1.7.9.5
cover ARM: dts: OMAP4/5 device-tree timer updates
In reply to Jon HunterHi Jon,
Quoted 6 lines · Jon Hunter
A few device tree timer updates for OMAP4/5 devices.
This series adds ...
1. MPU private addresses for OMAP4 timers
2. Timer nodes for OMAP5
3. 32kHz counter node for OMAP5
Great, thanks for that update. Just in time before the pull request.
Quoted 8 lines
This is based upon of Benoit Cousson's OMAP device-tree branch for v3.8.
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.gitfor_3.8/dtsJon Hunter (3):
ARM: dts: Update OMAP4 timer addresses
ARM: dts: Add OMAP5 timer nodes
ARM: dts: Add OMAP5 counter node
I've just updated slightly the subjects:
3b3132f ARM: dts: OMAP5: Add counter node
df692a9 ARM: dts: OMAP5: Add timer nodes
d03a93b ARM: dts: OMAP4: Update timer addresses
There are now in my for_3.8/dts branch.
Thanks,
Benoit