i2c: omap: updates
Subsystems (7)
v2 cover i2c: omap: updates
Does the followiing
- Make the revision a 32- bit consisting of rev_lo amd rev_hi each of 16 bits.
- Also use the revision register for the erratum i207.
- Refactor the i2c_omap_init code.
Also more cleanup is possible will check on that subsequently.
Tested on OMAP4430sdp ,4460 ,omap3630 ,3430 and omap2430.
For omap2 testing the below patch was used
[PATCH] ARM: vfp: fix save and restore when running on pre-VFPv3 and CONFIG_VFPv3 set
Also for using the pm testing below patches are used.
arm: sched: stop sched_clock() during suspend
ARM: OMAP: hwmod: wait for sysreset complete after enabling hwmod
Also available throughgit://gitorious.org/linus-tree/linus-tree.git i2c_omap/for_3.8
Shubhrajyoti D (7):
i2c: omap: Fix the revision register read
i2c: omap: use revision check for OMAP_I2C_FLAG_APPLY_ERRATA_I207
i2c: omap: remove the dtrev
ARM: i2c: omap: Remove the i207 errata flag
i2c: omap: re-factor omap_i2c_init function
i2c: omap: make reset a seperate function
i2c: omap: Restore i2c context always
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +- drivers/i2c/busses/i2c-omap.c | 166 +++++++++++++++++----------- include/linux/i2c-omap.h | 1 - 4 files changed, 104 insertions(+), 75 deletions(-)
Signature · 1 line
1.7.5.4
PATCH v2 1/7 i2c: omap: Fix the revision register read
The revision register on OMAP4 is a 16-bit lo and a 16-bit hi. Currently the driver reads only the lower 8-bits. Fix the same by preventing the truncating of the rev register for OMAP4.
Also use the scheme bit ie bit-14 of the hi register to know if it is OMAP_I2C_IP_VERSION_2.
On platforms previous to OMAP4 the offset 0x04 is IE register whose bit-14 reset value is 0, the code uses the same to its advantage.
Also since the omap_i2c_read_reg uses reg_map_ip_* a raw_readw is done to fetch the revision register.
The dev->regs is populated after reading the rev_hi. A NULL check has been added in the resume handler to prevent the access before the setting of the regs.
--- drivers/i2c/busses/i2c-omap.c | 61 ++++++++++++++++++++++++++++++++--------- 1 files changed, 48 insertions(+), 13 deletions(-)
drivers/i2c/busses/i2c-omap.c +48 -13
@@ -49,9 +49,10 @@#define OMAP_I2C_OMAP1_REV_2 0x20/* I2C controller revisions present on specific hardware */ -#define OMAP_I2C_REV_ON_2430 0x36 -#define OMAP_I2C_REV_ON_3430_3530 0x3C -#define OMAP_I2C_REV_ON_3630_4430 0x40 +#define OMAP_I2C_REV_ON_2430 0x00000036 +#define OMAP_I2C_REV_ON_3430_3530 0x0000003C +#define OMAP_I2C_REV_ON_3630 0x00000040 +#define OMAP_I2C_REV_ON_4430_PLUS 0x50400002/* timeout waiting for the controller to respond */ #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))
@@ -202,7 +203,7 @@ struct omap_i2c_dev {* fifo_size==0 implies no fifo * if set, should be trsh+1 */ -u8 rev; +u32 rev; unsigned b_hw:1; /* bad h/w fixes */ unsigned receiver:1; /* true when we're in receiver mode */u16 iestate;/* Saved interrupt register */
@@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)omap_i2c_write_reg (dev,OMAP_I2C_BUF_REG , buf); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ /* calculate wakeup latency constraint for MPU */
@@ -1052,6 +1053,16 @@ static const struct of_device_id omap_i2c_of_match[] = {MODULE_DEVICE_TABLE (of, omap_i2c_of_match);#endif +#define OMAP_I2C_SCHEME (rev) ((rev & 0xc000) >> 14) + +#define OMAP_I2C_REV_SCHEME_0_MAJOR (rev) (rev >> 4) +#define OMAP_I2C_REV_SCHEME_0_MINOR (rev) (rev & 0xf) + +#define OMAP_I2C_REV_SCHEME_1_MAJOR (rev) ((rev & 0x0700) >> 7) +#define OMAP_I2C_REV_SCHEME_1_MINOR (rev) (rev & 0x1f) +#define OMAP_I2C_SCHEME_0 0 +#define OMAP_I2C_SCHEME_1 1 +static int __devinit omap_i2c_probe (struct platform_device *pdev) {
@@ -1064,6 +1075,8 @@ omap_i2c_probe(struct platform_device *pdev)const struct of_device_id *match;int irq;int r; +u32 rev; +u16 minor, major;/* NOTE: driver uses the static register mapping */ mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 );
@@ -1117,11 +1130,6 @@ omap_i2c_probe(struct platform_device *pdev) dev->reg_shift = (dev->flags >>OMAP_I2C_FLAG_BUS_SHIFT__SHIFT ) &3 ; -if (dev->dtrev ==OMAP_I2C_IP_VERSION_2 ) - dev->regs = (u8 *)reg_map_ip_v2; -else - dev->regs = (u8 *)reg_map_ip_v1; -pm_runtime_enable (dev->dev);pm_runtime_set_autosuspend_delay (dev->dev,OMAP_I2C_PM_TIMEOUT );pm_runtime_use_autosuspend (dev->dev);
@@ -1130,7 +1138,31 @@ omap_i2c_probe(struct platform_device *pdev)if (IS_ERR_VALUE (r)) goto err_free_mem; - dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ; +/* +* Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2. +* On omap3 Offset 4 is IE Reg the bit [15:14] is XDR_IE which is 0 +* at reset. Also since the omap_i2c_read_reg uses reg_map_ip_* a +* raw_readw is done. +*/ + rev =__raw_readw (dev->base +0x04 ); + +switch (OMAP_I2C_SCHEME (rev)) { +case OMAP_I2C_SCHEME_0 : + dev->regs = (u8 *)reg_map_ip_v1; + dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ; + minor =OMAP_I2C_REV_SCHEME_0_MAJOR (dev->rev); + major =OMAP_I2C_REV_SCHEME_0_MAJOR (dev->rev); +break ; +case OMAP_I2C_SCHEME_1 : +/* FALLTHROUGH */ +default : + dev->regs = (u8 *)reg_map_ip_v2; + rev = (rev <<16 ) | +omap_i2c_read_reg (dev,OMAP_I2C_IP_V2_REVNB_LO ); + minor =OMAP_I2C_REV_SCHEME_1_MINOR (rev); + major =OMAP_I2C_REV_SCHEME_1_MAJOR (rev); + dev->rev = rev; + } dev->errata =0 ;
@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ /* calculate wakeup latency constraint for MPU */
@@ -1198,7 +1230,7 @@ omap_i2c_probe(struct platform_device *pdev) }dev_info (dev->dev,"bus %d rev%d.%d.%d at %d kHz\n" , adap->nr, - dev->dtrev, dev->rev >>4 , dev->rev &0xf , dev->speed); + dev->dtrev, major, minor, dev->speed);of_i2c_register_devices (adap);
@@ -1264,6 +1296,9 @@ static int omap_i2c_runtime_resume(struct device *dev)struct platform_device *pdev =to_platform_device (dev);struct omap_i2c_dev *_dev =platform_get_drvdata (pdev); +if (!_dev->regs) +return 0 ; +if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) {omap_i2c_write_reg (_dev,OMAP_I2C_CON_REG ,0 );omap_i2c_write_reg (_dev,OMAP_I2C_PSC_REG , _dev->pscstate);
Signature · 1 line
1.7.5.4
PATCH v2 1/7 i2c: omap: Fix the revision register read
Hi,
Quoted 98 lines · Shubhrajyoti D
The revision register on OMAP4 is a 16-bit lo and a 16-bit hi. Currently the driver reads only the lower 8-bits. Fix the same by preventing the truncating of the rev register for OMAP4.
Also use the scheme bit ie bit-14 of the hi register to know if it is
OMAP_I2C_IP_VERSION_2.On platforms previous to OMAP4 the offset
0x04is IE register whose bit-14 reset value is 0, the code uses the same to its advantage.Also since the
omap_i2c_read_reguses reg_map_ip_* araw_readwis done to fetch the revision register.The
dev->regsis populated after reading therev_hi. A NULL check has been added in the resume handler to prevent the access before the setting of the regs.Signed-off-by Shubhrajyoti D <[email protected]>--- drivers/i2c/busses/i2c-omap.c | 61 ++++++++++++++++++++++++++++++++--------- 1 files changed, 48 insertions(+), 13 deletions(-)drivers/i2c/busses/i2c-omap.c +18
-10@@ -49,9 +49,10 @@#define OMAP_I2C_OMAP1_REV_2 0x20/* I2C controller revisions present on specific hardware */ -#define OMAP_I2C_REV_ON_2430 0x36 -#define OMAP_I2C_REV_ON_3430_3530 0x3C -#define OMAP_I2C_REV_ON_3630_4430 0x40 +#define OMAP_I2C_REV_ON_2430 0x00000036 +#define OMAP_I2C_REV_ON_3430_3530 0x0000003C +#define OMAP_I2C_REV_ON_3630 0x00000040 +#define OMAP_I2C_REV_ON_4430_PLUS 0x50400002/* timeout waiting for the controller to respond */ #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))@@ -202,7 +203,7 @@ struct omap_i2c_dev {* fifo_size==0 implies no fifo * if set, should be trsh+1 */ -u8 rev; +u32 rev; unsigned b_hw:1; /* bad h/w fixes */ unsigned receiver:1; /* true when we're in receiver mode */u16 iestate;/* Saved interrupt register */ @@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)omap_i2c_write_reg (dev,OMAP_I2C_BUF_REG , buf); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ /* calculate wakeup latency constraint for MPU */ @@ -1052,6 +1053,16 @@ static const struct of_device_id omap_i2c_of_match[] = {MODULE_DEVICE_TABLE (of, omap_i2c_of_match);#endif +#define OMAP_I2C_SCHEME (rev) ((rev & 0xc000) >> 14) + +#define OMAP_I2C_REV_SCHEME_0_MAJOR (rev) (rev >> 4) +#define OMAP_I2C_REV_SCHEME_0_MINOR (rev) (rev & 0xf) + +#define OMAP_I2C_REV_SCHEME_1_MAJOR (rev) ((rev & 0x0700) >> 7) +#define OMAP_I2C_REV_SCHEME_1_MINOR (rev) (rev & 0x1f) +#define OMAP_I2C_SCHEME_0 0 +#define OMAP_I2C_SCHEME_1 1 +static int __devinit omap_i2c_probe (struct platform_device *pdev) {@@ -1064,6 +1075,8 @@ omap_i2c_probe(struct platform_device *pdev)const struct of_device_id *match;int irq;int r; +u32 rev; +u16 minor, major;/* NOTE: driver uses the static register mapping */ mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 );@@ -1117,11 +1130,6 @@ omap_i2c_probe(struct platform_device *pdev) dev->reg_shift = (dev->flags >>OMAP_I2C_FLAG_BUS_SHIFT__SHIFT ) &3 ; -if (dev->dtrev ==OMAP_I2C_IP_VERSION_2 ) - dev->regs = (u8 *)reg_map_ip_v2; -else - dev->regs = (u8 *)reg_map_ip_v1; -pm_runtime_enable (dev->dev);pm_runtime_set_autosuspend_delay (dev->dev,OMAP_I2C_PM_TIMEOUT );pm_runtime_use_autosuspend (dev->dev);
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1143
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +3
-1@@ -1130,7 +1138,31 @@ omap_i2c_probe(struct platform_device *pdev)if (IS_ERR_VALUE (r)) goto err_free_mem; - dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ; +/* +* Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2. +* On omap3 Offset 4 is IE Reg the bit [15:14] is XDR_IE which is 0
comment is wrong. You talk about 2 bits and document only one of them. Also, this is valid for all OMAPs until OMAP3, comment should probably
read: On OMAP1/2/3 offset 0x04 is.....
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1152
Quoted 9 lines
drivers/i2c/busses/i2c-omap.c +9
-0+* at reset. Also since the omap_i2c_read_reg uses reg_map_ip_* a +* raw_readw is done. +*/ + rev =__raw_readw (dev->base +0x04 ); + +switch (OMAP_I2C_SCHEME (rev)) { +case OMAP_I2C_SCHEME_0 : + dev->regs = (u8 *)reg_map_ip_v1; + dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ;
drop the 0xff. Top byte is supposed to be zero and if it's not, we want to know what they hold.
Quoted 17 lines
drivers/i2c/busses/i2c-omap.c +13
-0+ minor =OMAP_I2C_REV_SCHEME_0_MAJOR (dev->rev); + major =OMAP_I2C_REV_SCHEME_0_MAJOR (dev->rev); +break ; +case OMAP_I2C_SCHEME_1 : +/* FALLTHROUGH */ +default : + dev->regs = (u8 *)reg_map_ip_v2; + rev = (rev <<16 ) | +omap_i2c_read_reg (dev,OMAP_I2C_IP_V2_REVNB_LO ); + minor =OMAP_I2C_REV_SCHEME_1_MINOR (rev); + major =OMAP_I2C_REV_SCHEME_1_MAJOR (rev); + dev->rev = rev; + } dev->errata =0 ;
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 6 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */
looks like this was applicable to 4430 too, what happened ?
Signature · 8 lines
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PATCH v2 1/7 i2c: omap: Fix the revision register read
Quoted 104 lines · Felipe Balbi
Hi,
Quoted 101 lines · Shubhrajyoti D
The revision register on OMAP4 is a 16-bit lo and a 16-bit hi. Currently the driver reads only the lower 8-bits. Fix the same by preventing the truncating of the rev register for OMAP4.
Also use the scheme bit ie bit-14 of the hi register to know if it is
OMAP_I2C_IP_VERSION_2.On platforms previous to OMAP4 the offset
0x04is IE register whose bit-14 reset value is 0, the code uses the same to its advantage.Also since the
omap_i2c_read_reguses reg_map_ip_* araw_readwis done to fetch the revision register.The
dev->regsis populated after reading therev_hi. A NULL check has been added in the resume handler to prevent the access before the setting of the regs.Signed-off-by Shubhrajyoti D <[email protected]>--- drivers/i2c/busses/i2c-omap.c | 61 ++++++++++++++++++++++++++++++++--------- 1 files changed, 48 insertions(+), 13 deletions(-)drivers/i2c/busses/i2c-omap.c +18
-10@@ -49,9 +49,10 @@#define OMAP_I2C_OMAP1_REV_2 0x20/* I2C controller revisions present on specific hardware */ -#define OMAP_I2C_REV_ON_2430 0x36 -#define OMAP_I2C_REV_ON_3430_3530 0x3C -#define OMAP_I2C_REV_ON_3630_4430 0x40 +#define OMAP_I2C_REV_ON_2430 0x00000036 +#define OMAP_I2C_REV_ON_3430_3530 0x0000003C +#define OMAP_I2C_REV_ON_3630 0x00000040 +#define OMAP_I2C_REV_ON_4430_PLUS 0x50400002/* timeout waiting for the controller to respond */ #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000))@@ -202,7 +203,7 @@ struct omap_i2c_dev {* fifo_size==0 implies no fifo * if set, should be trsh+1 */ -u8 rev; +u32 rev; unsigned b_hw:1; /* bad h/w fixes */ unsigned receiver:1; /* true when we're in receiver mode */u16 iestate;/* Saved interrupt register */ @@ -490,7 +491,7 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)omap_i2c_write_reg (dev,OMAP_I2C_BUF_REG , buf); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ /* calculate wakeup latency constraint for MPU */ @@ -1052,6 +1053,16 @@ static const struct of_device_id omap_i2c_of_match[] = {MODULE_DEVICE_TABLE (of, omap_i2c_of_match);#endif +#define OMAP_I2C_SCHEME (rev) ((rev & 0xc000) >> 14) + +#define OMAP_I2C_REV_SCHEME_0_MAJOR (rev) (rev >> 4) +#define OMAP_I2C_REV_SCHEME_0_MINOR (rev) (rev & 0xf) + +#define OMAP_I2C_REV_SCHEME_1_MAJOR (rev) ((rev & 0x0700) >> 7) +#define OMAP_I2C_REV_SCHEME_1_MINOR (rev) (rev & 0x1f) +#define OMAP_I2C_SCHEME_0 0 +#define OMAP_I2C_SCHEME_1 1 +static int __devinit omap_i2c_probe (struct platform_device *pdev) {@@ -1064,6 +1075,8 @@ omap_i2c_probe(struct platform_device *pdev)const struct of_device_id *match;int irq;int r; +u32 rev; +u16 minor, major;/* NOTE: driver uses the static register mapping */ mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 );@@ -1117,11 +1130,6 @@ omap_i2c_probe(struct platform_device *pdev) dev->reg_shift = (dev->flags >>OMAP_I2C_FLAG_BUS_SHIFT__SHIFT ) &3 ; -if (dev->dtrev ==OMAP_I2C_IP_VERSION_2 ) - dev->regs = (u8 *)reg_map_ip_v2; -else - dev->regs = (u8 *)reg_map_ip_v1; -pm_runtime_enable (dev->dev);pm_runtime_set_autosuspend_delay (dev->dev,OMAP_I2C_PM_TIMEOUT );pm_runtime_use_autosuspend (dev->dev);@@ -1130,7 +1138,31 @@ omap_i2c_probe(struct platform_device *pdev)if (IS_ERR_VALUE (r)) goto err_free_mem;
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1143
Quoted 4 lines
drivers/i2c/busses/i2c-omap.c +3
-1- dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ; +/* +* Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2. +* On omap3 Offset 4 is IE Reg the bit [15:14] is XDR_IE which is 0 comment is wrong. You talk about 2 bits and document only one of them. Also, this is valid for all OMAPs until OMAP3, comment should probably
read: On OMAP1/2/3 offset0x04is.....
will fix the comment.
Quoted 11 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1152
Quoted 10 lines
drivers/i2c/busses/i2c-omap.c +9
-0+* at reset. Also since the omap_i2c_read_reg uses reg_map_ip_* a +* raw_readw is done. +*/ + rev =__raw_readw (dev->base +0x04 ); + +switch (OMAP_I2C_SCHEME (rev)) { +case OMAP_I2C_SCHEME_0 : + dev->regs = (u8 *)reg_map_ip_v1; + dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ;drop the
0xff. Top byte is supposed to be zero
yes.
Quoted 2 lines
and if it's not, we want
to know what they hold.
OK. Just thought that the reserved values can wiped off:-)
Quoted 17 lines
Quoted 17 lines
drivers/i2c/busses/i2c-omap.c +13
-0+ minor =OMAP_I2C_REV_SCHEME_0_MAJOR (dev->rev); + major =OMAP_I2C_REV_SCHEME_0_MAJOR (dev->rev); +break ; +case OMAP_I2C_SCHEME_1 : +/* FALLTHROUGH */ +default : + dev->regs = (u8 *)reg_map_ip_v2; + rev = (rev <<16 ) | +omap_i2c_read_reg (dev,OMAP_I2C_IP_V2_REVNB_LO ); + minor =OMAP_I2C_REV_SCHEME_1_MINOR (rev); + major =OMAP_I2C_REV_SCHEME_1_MAJOR (rev); + dev->rev = rev; + } dev->errata =0 ;
Quoted 8 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ looks like this was applicable to 4430 too, what happened ?
No actually this can be deleted completely once the start -> transaction -> stop sequence recommendation is followed.
Quoted 1 line
PATCH v2 1/7 i2c: omap: Fix the revision register read
Hi,
Quoted 10 lines · Shubhrajyoti
Quoted 8 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ looks like this was applicable to 4430 too, what happened ?
No actually this can be deleted completely once the start -> transaction -> stop sequence recommendation is followed.
yes, but we're not there just yet and this patch is changing the behavior of the driver in ways which don't belong to $SUBJECT.
Signature · 8 lines
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PATCH v2 1/7 i2c: omap: Fix the revision register read
Quoted 11 lines · Felipe Balbi
Hi,
Quoted 8 lines · Shubhrajyoti
Quoted 8 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ looks like this was applicable to 4430 too, what happened ?
Quoted 5 lines
Quoted 2 lines
No actually this can be deleted completely once the start -> transaction -> stop sequence recommendation is followed.
yes, but we're not there just yet and this patch is changing the behavior of the driver
No , earlier we were truncating the register for omap4 so OMAP_I2C_REV_ON_3630_4430 was there if we read both hi and lo for omap4 then we donot find 3630 and 4430 value to be similar.
In this case the behavior is same as earlier also it enabled this for lower than 3630 and
the same holds good even now.
So in essence,
Earlier OMAP_I2C_REV_ON_3630_4430 is named to OMAP_I2C_REV_ON_3630 and omap4 rev will have a 32bit value.
Quoted 5 lines
in ways which don't belong to $SUBJECT.
--
balbi
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PATCH v2 1/7 i2c: omap: Fix the revision register read
Hi,
Quoted 24 lines · Shubhrajyoti Datta
Quoted 11 lines · Felipe Balbi
Hi,
Quoted 8 lines · Shubhrajyoti
Quoted 8 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ looks like this was applicable to 4430 too, what happened ?
Quoted 5 lines
Quoted 2 lines
No actually this can be deleted completely once the start -> transaction -> stop sequence recommendation is followed.
yes, but we're not there just yet and this patch is changing the behavior of the driver
No , earlier we were truncating the register for omap4 so
OMAP_I2C_REV_ON_3630_4430was there if we read both hi and lo for omap4 then we donot find 3630 and 4430 value to be similar.
Quoted 5 lines
In this case the behavior is same as earlier also it enabled this for lower than 3630 and the same holds good even now.
So in essence, Earlier
OMAP_I2C_REV_ON_3630_4430is named toOMAP_I2C_REV_ON_3630and omap4 rev will have a 32bit value.
it's not same behavior because before dev->b_hw was set for omap4430, but now it won't be. This is the difference in behavior which I'm pointing out.
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PATCH v2 1/7 i2c: omap: Fix the revision register read
Hi,
Quoted 30 lines · Felipe Balbi
Hi,
Quoted 27 lines · Shubhrajyoti Datta
Quoted 11 lines · Felipe Balbi
Hi,
Quoted 8 lines · Shubhrajyoti
Quoted 8 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ looks like this was applicable to 4430 too, what happened ?
Quoted 5 lines
Quoted 2 lines
No actually this can be deleted completely once the start -> transaction -> stop sequence recommendation is followed.
yes, but we're not there just yet and this patch is changing the behavior of the driver
No , earlier we were truncating the register for omap4 so
OMAP_I2C_REV_ON_3630_4430was there if we read both hi and lo for omap4 then we donot find 3630 and 4430 value to be similar.In this case the behavior is same as earlier also it enabled this for lower than 3630 and the same holds good even now.
Quoted 6 lines
Quoted 2 lines
So in essence, Earlier
OMAP_I2C_REV_ON_3630_4430is named toOMAP_I2C_REV_ON_3630and omap4 rev will have a 32bit value.it's not same behavior because before
dev->b_hwwas set for omap4430, but now it won't be. This is the difference in behavior which I'm pointing out.
what I said is nonsense, since b_hw was set for anything older than 3630, so current code is no different.
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PATCH v2 1/7 i2c: omap: Fix the revision register read
In reply to Felipe BalbiQuoted 11 lines · Felipe Balbi
Hi,
Quoted 8 lines · Shubhrajyoti
Quoted 8 lines
drivers/i2c/busses/i2c-omap.c omap_i2c_probe(struct platform_device *pdev) · line 1191
Quoted 7 lines
drivers/i2c/busses/i2c-omap.c +1
-1@@ -1155,7 +1187,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size /2 ); -if (dev->rev <OMAP_I2C_REV_ON_3630_4430 ) +if (dev->rev <OMAP_I2C_REV_ON_3630 ) dev->b_hw =1 ;/* Enable hardware fixes */ looks like this was applicable to 4430 too, what happened ?
Quoted 5 lines
Quoted 2 lines
No actually this can be deleted completely once the start -> transaction -> stop sequence recommendation is followed.
yes, but we're not there just yet and this patch is changing the behavior
No , earlier we were truncating the register for omap4 so OMAP_I2C_REV_ON_3630_4430 was there if we read both hi and lo for omap4 then we donot find 3630 and 4430 value to be similar.
In this case the behavior is same as earlier also it enabled this for lower than 3630 and
the same holds good even now.
So in essence,
Earlier OMAP_I2C_REV_ON_3630_4430 is named to OMAP_I2C_REV_ON_3630 and omap4 rev will have a 32bit value which is greater.
Quoted 4 lines
of the driver in ways which don't belong to $SUBJECT.
--
balbi
PATCH v2 2/7 i2c: omap: use revision check for OMAP_I2C_FLAG_APPLY_ERRATA_I207
In reply to Shubhrajyoti DThe errata i207 is enabled for 2430 and 3xxx. Use the revision check to enable the erratum instead.
--- drivers/i2c/busses/i2c-omap.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
drivers/i2c/busses/i2c-omap.c +2 -1
@@ -1166,7 +1166,8 @@ omap_i2c_probe(struct platform_device *pdev) dev->errata =0 ; -if (dev->flags &OMAP_I2C_FLAG_APPLY_ERRATA_I207 ) +if (dev->rev >=OMAP_I2C_REV_ON_2430 && + dev->rev <OMAP_I2C_REV_ON_4430_PLUS ) dev->errata |=I2C_OMAP_ERRATA_I207 ;if (dev->rev <=OMAP_I2C_REV_ON_3430_3530 )
Signature · 1 line
1.7.5.4
PATCH v2 2/7 i2c: omap: use revision check for OMAP_I2C_FLAG_APPLY_ERRATA_I207
Quoted 4 lines · Shubhrajyoti D
The errata i207 is enabled for 2430 and 3xxx. Use the revision check to enable the erratum instead.
Signed-off-by Shubhrajyoti D <[email protected]>
Quoted 25 lines
--- drivers/i2c/busses/i2c-omap.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)drivers/i2c/busses/i2c-omap.c +2
-1@@ -1166,7 +1166,8 @@ omap_i2c_probe(struct platform_device *pdev) dev->errata =0 ; -if (dev->flags &OMAP_I2C_FLAG_APPLY_ERRATA_I207 ) +if (dev->rev >=OMAP_I2C_REV_ON_2430 && + dev->rev <OMAP_I2C_REV_ON_4430_PLUS ) dev->errata |=I2C_OMAP_ERRATA_I207 ;if (dev->rev <=OMAP_I2C_REV_ON_3430_3530 )Signature · 6 lines
1.7.5.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo at vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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PATCH v2 3/7 i2c: omap: remove the dtrev
In reply to Shubhrajyoti DThe dtrev is used only for the comments. Remove the same and use the scheme instead to know if it is version2.
--- drivers/i2c/busses/i2c-omap.c | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-)
drivers/i2c/busses/i2c-omap.c +4 -6
@@ -191,7 +191,6 @@ struct omap_i2c_dev {u32 latency;/* maximum MPU wkup latency */ struct pm_qos_request pm_qos_request;u32 speed;/* Speed of bus in kHz */ -u32 dtrev;/* extra revision from DT */ u32 flags;u16 cmd_err;u8 *buf;
@@ -1076,7 +1075,7 @@ omap_i2c_probe(struct platform_device *pdev)int irq;int r;u32 rev; -u16 minor, major; +u16 minor, major, scheme;/* NOTE: driver uses the static register mapping */ mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 );
@@ -1108,7 +1107,6 @@ omap_i2c_probe(struct platform_device *pdev)u32 freq =100000 ;/* default to 100000 Hz */ pdata = match->data; - dev->dtrev = pdata->rev; dev->flags = pdata->flags;of_property_read_u32 (node,"clock-frequency" , &freq);
@@ -1117,7 +1115,6 @@ omap_i2c_probe(struct platform_device *pdev) }else if (pdata !=NULL ) { dev->speed = pdata->clkrate; dev->flags = pdata->flags; - dev->dtrev = pdata->rev; } dev->dev = &pdev->dev;
@@ -1146,7 +1143,8 @@ omap_i2c_probe(struct platform_device *pdev)*/ rev =__raw_readw (dev->base +0x04 ); -switch (OMAP_I2C_SCHEME (rev)) { + scheme =OMAP_I2C_SCHEME (rev); +switch (scheme) {case OMAP_I2C_SCHEME_0 : dev->regs = (u8 *)reg_map_ip_v1; dev->rev =omap_i2c_read_reg (dev,OMAP_I2C_REV_REG ) &0xff ;
@@ -1231,7 +1229,7 @@ omap_i2c_probe(struct platform_device *pdev) }dev_info (dev->dev,"bus %d rev%d.%d.%d at %d kHz\n" , adap->nr, - dev->dtrev, major, minor, dev->speed); + scheme, major, minor, dev->speed);of_i2c_register_devices (adap);
Signature · 1 line
1.7.5.4
PATCH v2 3/7 i2c: omap: remove the dtrev
Hi,
Quoted 4 lines · Shubhrajyoti D
The dtrev is used only for the comments. Remove the same and use the scheme instead to know if it is version2.
Signed-off-by Shubhrajyoti D <[email protected]>
I would drop dtrev completely and not use scheme to "emulate" it. dtrev is wrong and unnecessary; it was only created due to the wrong assumption that HW revision register was wrong. Looks like that assumption was made based on the driver which is clearly wrong wrt revision detection.
Also, when dropping dtrev, also drop it from platform_data and omap_hwmod database (could be done on a separate patch).
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PATCH v2 3/7 i2c: omap: remove the dtrev
Quoted 8 lines · Felipe Balbi
Hi,
Quoted 4 lines · Shubhrajyoti D
The dtrev is used only for the comments. Remove the same and use the scheme instead to know if it is version2.
Signed-off-by Shubhrajyoti D <[email protected]>I would drop dtrev completely and not use scheme to "emulate" it.
However for ver2 ie omap4plus and previous versions the register map is different.
So the scheme may still be required.
Quoted 8 lines
dtrev
is wrong and unnecessary; it was only created due to the wrong assumption that HW revision register was wrong. Looks like that assumption was made based on the driver which is clearly wrong wrt revision detection.Also, when dropping dtrev, also drop it from
platform_dataandomap_hwmoddatabase (could be done on a separate patch).
OK would do that.
Quoted 1 line
PATCH v2 3/7 i2c: omap: remove the dtrev
Hi,
Quoted 7 lines · Shubhrajyoti
Quoted 6 lines · Felipe Balbi
Hi,
Quoted 3 lines · Shubhrajyoti D
The dtrev is used only for the comments. Remove the same and use the scheme instead to know if it is version2.
Quoted 6 lines
Quoted 2 lines
Quoted 1 line
Signed-off-by Shubhrajyoti D <[email protected]>I would drop dtrev completely and not use scheme to "emulate" it.
However for ver2 ie omap4plus and previous versions the register map is different.
So the scheme may still be required.
fair enough, but drop it from debugging messages.
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PATCH v2 3/7 i2c: omap: remove the dtrev
Quoted 4 lines · Felipe Balbi
Quoted 3 lines
egister map is different.
Quoted 2 lines
So the scheme may still be required.
fair enough, but drop it from debugging messages.
OK thanks.
PATCH v2 4/7 ARM: i2c: omap: Remove the i207 errata flag
In reply to Shubhrajyoti DThe commit [i2c: omap: use revision check for OMAP_I2C_FLAG_APPLY_ERRATA_I207] uses the revision id instead of the flag. So the flag can be safely removed.
--- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +-- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +++------ drivers/i2c/busses/i2c-omap.c | 3 +-- include/linux/i2c-omap.h | 1 - 4 files changed, 5 insertions(+), 11 deletions(-)
arch/arm/mach-omap2/omap_hwmod_2430_data.c +1 -2
@@ -76,8 +76,7 @@ static struct omap_hwmod_class i2c_class = {static struct omap_i2c_dev_attr i2c_dev_attr = { .fifo_depth =8 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_BUS_SHIFT_2 | + .flags =OMAP_I2C_FLAG_BUS_SHIFT_2 |OMAP_I2C_FLAG_FORCE_19200_INT_CLK , };
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +3 -6
@@ -791,8 +791,7 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {/* I2C1 */ static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth =8 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };
@@ -818,8 +817,7 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {/* I2C2 */ static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth =8 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };
@@ -845,8 +843,7 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {/* I2C3 */ static struct omap_i2c_dev_attr i2c3_dev_attr = { .fifo_depth =64 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };
drivers/i2c/busses/i2c-omap.c +1 -2
@@ -1029,8 +1029,7 @@ static const struct i2c_algorithm omap_i2c_algo = {#ifdef CONFIG_OF static struct omap_i2c_bus_platform_data omap3_pdata = { .rev =OMAP_I2C_IP_VERSION_1 , - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };
include/linux/i2c-omap.h +0 -1
@@ -21,7 +21,6 @@#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1)#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2)#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) -#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4)#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5)#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6)/* how the CPU address bus must be translated for I2C unit access */
Signature · 1 line
1.7.5.4
PATCH v2 4/7 ARM: i2c: omap: Remove the i207 errata flag
Quoted 4 lines · Shubhrajyoti D
The commit [i2c: omap: use revision check for
OMAP_I2C_FLAG_APPLY_ERRATA_I207] uses the revision id instead of the flag. So the flag can be safely removed.Signed-off-by Shubhrajyoti D <[email protected]>
Quoted 88 lines
--- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +-- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +++------ drivers/i2c/busses/i2c-omap.c | 3 +-- include/linux/i2c-omap.h | 1 - 4 files changed, 5 insertions(+), 11 deletions(-)arch/arm/mach-omap2/omap_hwmod_2430_data.c +1
-2@@ -76,8 +76,7 @@ static struct omap_hwmod_class i2c_class = {static struct omap_i2c_dev_attr i2c_dev_attr = { .fifo_depth =8 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_BUS_SHIFT_2 | + .flags =OMAP_I2C_FLAG_BUS_SHIFT_2 |OMAP_I2C_FLAG_FORCE_19200_INT_CLK , };arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +3
-6@@ -791,8 +791,7 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {/* I2C1 */ static struct omap_i2c_dev_attr i2c1_dev_attr = { .fifo_depth =8 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };@@ -818,8 +817,7 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {/* I2C2 */ static struct omap_i2c_dev_attr i2c2_dev_attr = { .fifo_depth =8 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };@@ -845,8 +843,7 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {/* I2C3 */ static struct omap_i2c_dev_attr i2c3_dev_attr = { .fifo_depth =64 ,/* bytes */ - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };drivers/i2c/busses/i2c-omap.c +1
-2@@ -1029,8 +1029,7 @@ static const struct i2c_algorithm omap_i2c_algo = {#ifdef CONFIG_OF static struct omap_i2c_bus_platform_data omap3_pdata = { .rev =OMAP_I2C_IP_VERSION_1 , - .flags =OMAP_I2C_FLAG_APPLY_ERRATA_I207 | -OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + .flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |OMAP_I2C_FLAG_BUS_SHIFT_2 , };include/linux/i2c-omap.h +0
-1@@ -21,7 +21,6 @@#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1)#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2)#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) -#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4)#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5)#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6)/* how the CPU address bus must be translated for I2C unit access */ Signature · 6 lines
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PATCH v2 5/7 i2c: omap: re-factor omap_i2c_init function
In reply to Shubhrajyoti Dre-factor omap_i2c_init() so that we can re-use it for resume. While at it also remove the bufstate variable as we write it in omap_i2c_resize_fifo for every transfer.
--- drivers/i2c/busses/i2c-omap.c | 75 +++++++++++++++++++---------------------- 1 files changed, 35 insertions(+), 40 deletions(-)
drivers/i2c/busses/i2c-omap.c +35 -40
@@ -209,7 +209,6 @@ struct omap_i2c_dev {u16 pscstate;u16 scllstate;u16 sclhstate; -u16 bufstate;u16 syscstate;u16 westate;u16 errata;
@@ -275,9 +274,34 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) (i2c_dev->regs[reg] << i2c_dev->reg_shift)); } +static void __omap_i2c_init (struct omap_i2c_dev *dev) +{ + +omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,0 ); + +/* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ +omap_i2c_write_reg (dev,OMAP_I2C_PSC_REG , dev->pscstate); + +/* SCL low and high time values */ +omap_i2c_write_reg (dev,OMAP_I2C_SCLL_REG , dev->scllstate); +omap_i2c_write_reg (dev,OMAP_I2C_SCLH_REG , dev->sclhstate); +if (dev->rev >=OMAP_I2C_REV_ON_3430_3530 ) +omap_i2c_write_reg (dev,OMAP_I2C_WE_REG , dev->westate); + +/* Take the I2C module out of reset: */ +omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,OMAP_I2C_CON_EN ); + +/* +* Don't write to this register if the IE state is 0 as it can +* cause deadlock. +*/ +if (dev->iestate) +omap_i2c_write_reg (dev,OMAP_I2C_IE_REG , dev->iestate); +} +static int omap_i2c_init (struct omap_i2c_dev *dev) { -u16 psc =0 , scll =0 , sclh =0 , buf =0 ; +u16 psc =0 , scll =0 , sclh =0 ;u16 fsscll =0 , fssclh =0 , hsscll =0 , hssclh =0 ;unsigned long fclk_rate =12000000 ;unsigned long timeout;
@@ -327,11 +351,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)* REVISIT: Some wkup sources might not be needed. */ dev->westate =OMAP_I2C_WE_ALL ; -omap_i2c_write_reg (dev,OMAP_I2C_WE_REG , - dev->westate); } } -omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,0 );if (dev->flags &OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK ) {/*
@@ -416,28 +437,17 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) sclh = fclk_rate / (dev->speed *2 ) -7 + psc; } -/* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ -omap_i2c_write_reg (dev,OMAP_I2C_PSC_REG , psc); - -/* SCL low and high time values */ -omap_i2c_write_reg (dev,OMAP_I2C_SCLL_REG , scll); -omap_i2c_write_reg (dev,OMAP_I2C_SCLH_REG , sclh); - -/* Take the I2C module out of reset: */ -omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,OMAP_I2C_CON_EN ); - -/* Enable interrupts */ dev->iestate = (OMAP_I2C_IE_XRDY |OMAP_I2C_IE_RRDY |OMAP_I2C_IE_ARDY |OMAP_I2C_IE_NACK |OMAP_I2C_IE_AL ) | ((dev->fifo_size) ? (OMAP_I2C_IE_RDR |OMAP_I2C_IE_XDR ) :0 ); -omap_i2c_write_reg (dev,OMAP_I2C_IE_REG , dev->iestate); -if (dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) { - dev->pscstate = psc; - dev->scllstate = scll; - dev->sclhstate = sclh; - dev->bufstate = buf; - } + + dev->pscstate = psc; + dev->scllstate = scll; + dev->sclhstate = sclh; + +__omap_i2c_init (dev); +return 0 ; }
@@ -1297,23 +1307,8 @@ static int omap_i2c_runtime_resume(struct device *dev)if (!_dev->regs)return 0 ; -if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) { -omap_i2c_write_reg (_dev,OMAP_I2C_CON_REG ,0 ); -omap_i2c_write_reg (_dev,OMAP_I2C_PSC_REG , _dev->pscstate); -omap_i2c_write_reg (_dev,OMAP_I2C_SCLL_REG , _dev->scllstate); -omap_i2c_write_reg (_dev,OMAP_I2C_SCLH_REG , _dev->sclhstate); -omap_i2c_write_reg (_dev,OMAP_I2C_BUF_REG , _dev->bufstate); -omap_i2c_write_reg (_dev,OMAP_I2C_SYSC_REG , _dev->syscstate); -omap_i2c_write_reg (_dev,OMAP_I2C_WE_REG , _dev->westate); -omap_i2c_write_reg (_dev,OMAP_I2C_CON_REG ,OMAP_I2C_CON_EN ); - } - -/* -* Don't write to this register if the IE state is 0 as it can -* cause deadlock. -*/ -if (_dev->iestate) -omap_i2c_write_reg (_dev,OMAP_I2C_IE_REG , _dev->iestate); +if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) +__omap_i2c_init (_dev);return 0 ; }
Signature · 1 line
1.7.5.4
PATCH v2 5/7 i2c: omap: re-factor omap_i2c_init function
Quoted 5 lines · Shubhrajyoti D
re-factor
omap_i2c_init()so that we can re-use it for resume. While at it also remove the bufstate variable as we write it inomap_i2c_resize_fifofor every transfer.Signed-off-by Shubhrajyoti D <[email protected]>
Quoted 133 lines
--- drivers/i2c/busses/i2c-omap.c | 75 +++++++++++++++++++---------------------- 1 files changed, 35 insertions(+), 40 deletions(-)drivers/i2c/busses/i2c-omap.c +35
-40@@ -209,7 +209,6 @@ struct omap_i2c_dev {u16 pscstate;u16 scllstate;u16 sclhstate; -u16 bufstate;u16 syscstate;u16 westate;u16 errata;@@ -275,9 +274,34 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) (i2c_dev->regs[reg] << i2c_dev->reg_shift)); } +static void __omap_i2c_init (struct omap_i2c_dev *dev) +{ + +omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,0 ); + +/* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ +omap_i2c_write_reg (dev,OMAP_I2C_PSC_REG , dev->pscstate); + +/* SCL low and high time values */ +omap_i2c_write_reg (dev,OMAP_I2C_SCLL_REG , dev->scllstate); +omap_i2c_write_reg (dev,OMAP_I2C_SCLH_REG , dev->sclhstate); +if (dev->rev >=OMAP_I2C_REV_ON_3430_3530 ) +omap_i2c_write_reg (dev,OMAP_I2C_WE_REG , dev->westate); + +/* Take the I2C module out of reset: */ +omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,OMAP_I2C_CON_EN ); + +/* +* Don't write to this register if the IE state is 0 as it can +* cause deadlock. +*/ +if (dev->iestate) +omap_i2c_write_reg (dev,OMAP_I2C_IE_REG , dev->iestate); +} +static int omap_i2c_init (struct omap_i2c_dev *dev) { -u16 psc =0 , scll =0 , sclh =0 , buf =0 ; +u16 psc =0 , scll =0 , sclh =0 ;u16 fsscll =0 , fssclh =0 , hsscll =0 , hssclh =0 ;unsigned long fclk_rate =12000000 ;unsigned long timeout;@@ -327,11 +351,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)* REVISIT: Some wkup sources might not be needed. */ dev->westate =OMAP_I2C_WE_ALL ; -omap_i2c_write_reg (dev,OMAP_I2C_WE_REG , - dev->westate); } } -omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,0 );if (dev->flags &OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK ) {/* @@ -416,28 +437,17 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) sclh = fclk_rate / (dev->speed *2 ) -7 + psc; } -/* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ -omap_i2c_write_reg (dev,OMAP_I2C_PSC_REG , psc); - -/* SCL low and high time values */ -omap_i2c_write_reg (dev,OMAP_I2C_SCLL_REG , scll); -omap_i2c_write_reg (dev,OMAP_I2C_SCLH_REG , sclh); - -/* Take the I2C module out of reset: */ -omap_i2c_write_reg (dev,OMAP_I2C_CON_REG ,OMAP_I2C_CON_EN ); - -/* Enable interrupts */ dev->iestate = (OMAP_I2C_IE_XRDY |OMAP_I2C_IE_RRDY |OMAP_I2C_IE_ARDY |OMAP_I2C_IE_NACK |OMAP_I2C_IE_AL ) | ((dev->fifo_size) ? (OMAP_I2C_IE_RDR |OMAP_I2C_IE_XDR ) :0 ); -omap_i2c_write_reg (dev,OMAP_I2C_IE_REG , dev->iestate); -if (dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) { - dev->pscstate = psc; - dev->scllstate = scll; - dev->sclhstate = sclh; - dev->bufstate = buf; - } + + dev->pscstate = psc; + dev->scllstate = scll; + dev->sclhstate = sclh; + +__omap_i2c_init (dev); +return 0 ; }@@ -1297,23 +1307,8 @@ static int omap_i2c_runtime_resume(struct device *dev)if (!_dev->regs)return 0 ; -if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) { -omap_i2c_write_reg (_dev,OMAP_I2C_CON_REG ,0 ); -omap_i2c_write_reg (_dev,OMAP_I2C_PSC_REG , _dev->pscstate); -omap_i2c_write_reg (_dev,OMAP_I2C_SCLL_REG , _dev->scllstate); -omap_i2c_write_reg (_dev,OMAP_I2C_SCLH_REG , _dev->sclhstate); -omap_i2c_write_reg (_dev,OMAP_I2C_BUF_REG , _dev->bufstate); -omap_i2c_write_reg (_dev,OMAP_I2C_SYSC_REG , _dev->syscstate); -omap_i2c_write_reg (_dev,OMAP_I2C_WE_REG , _dev->westate); -omap_i2c_write_reg (_dev,OMAP_I2C_CON_REG ,OMAP_I2C_CON_EN ); - } - -/* -* Don't write to this register if the IE state is 0 as it can -* cause deadlock. -*/ -if (_dev->iestate) -omap_i2c_write_reg (_dev,OMAP_I2C_IE_REG , _dev->iestate); +if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) +__omap_i2c_init (_dev);return 0 ; }Signature · 6 lines
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PATCH v2 6/7 i2c: omap: make reset a seperate function
In reply to Shubhrajyoti DImplement reset as a separate function.
This will enable us to make sure that we don't do the calculation again on every transfer.
Also at probe the reset is not added as the hwmod is doing that for us.
---
todo: reprodue the errors and optimise the reset if possible.
drivers/i2c/busses/i2c-omap.c | 25 ++++++++++++++++--------- 1 files changed, 16 insertions(+), 9 deletions(-)
drivers/i2c/busses/i2c-omap.c +16 -9
@@ -299,15 +299,9 @@ static void __omap_i2c_init(struct omap_i2c_dev *dev)omap_i2c_write_reg (dev,OMAP_I2C_IE_REG , dev->iestate); } -static int omap_i2c_init (struct omap_i2c_dev *dev) +static int omap_i2c_reset (struct omap_i2c_dev *dev) { -u16 psc =0 , scll =0 , sclh =0 ; -u16 fsscll =0 , fssclh =0 , hsscll =0 , hssclh =0 ; -unsigned long fclk_rate =12000000 ;unsigned long timeout; -unsigned long internal_clk =0 ; -struct clk *fclk; -if (dev->rev >=OMAP_I2C_OMAP1_REV_2 ) {/* Disable I2C controller before soft reset */ omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
@@ -353,6 +347,17 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) dev->westate =OMAP_I2C_WE_ALL ; } } +return 0 ; +} + +static int omap_i2c_init (struct omap_i2c_dev *dev) +{ +u16 psc =0 , scll =0 , sclh =0 ; +u16 fsscll =0 , fssclh =0 , hsscll =0 , hssclh =0 ; +unsigned long fclk_rate =12000000 ; +unsigned long internal_clk =0 ; +struct clk *fclk; +if (dev->flags &OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK ) {/*
@@ -592,7 +597,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, dev->buf_len =0 ;if (timeout ==0 ) {dev_err (dev->dev,"controller timed out\n" ); -omap_i2c_init (dev); +omap_i2c_reset (dev); +__omap_i2c_init (dev);return -ETIMEDOUT ; }
@@ -602,7 +608,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,/* We have an error */ if (dev->cmd_err & (OMAP_I2C_STAT_AL |OMAP_I2C_STAT_ROVR |OMAP_I2C_STAT_XUDF )) { -omap_i2c_init (dev); +omap_i2c_reset (dev); +__omap_i2c_init (dev);return -EIO ; }
Signature · 1 line
1.7.5.4
PATCH v2 6/7 i2c: omap: make reset a seperate function
Hi,
Quoted 7 lines · Shubhrajyoti D
Implement reset as a separate function.
This will enable us to make sure that we don't do the calculation again on every transfer.
Also at probe the reset is not added as the hwmod is doing that for us.Signed-off-by Shubhrajyoti D <[email protected]>
Quoted 72 lines
---
todo: reprodue the errors and optimise the reset if possible.drivers/i2c/busses/i2c-omap.c | 25 ++++++++++++++++--------- 1 files changed, 16 insertions(+), 9 deletions(-)drivers/i2c/busses/i2c-omap.c +16
-9@@ -299,15 +299,9 @@ static void __omap_i2c_init(struct omap_i2c_dev *dev)omap_i2c_write_reg (dev,OMAP_I2C_IE_REG , dev->iestate); } -static int omap_i2c_init (struct omap_i2c_dev *dev) +static int omap_i2c_reset (struct omap_i2c_dev *dev) { -u16 psc =0 , scll =0 , sclh =0 ; -u16 fsscll =0 , fssclh =0 , hsscll =0 , hssclh =0 ; -unsigned long fclk_rate =12000000 ;unsigned long timeout; -unsigned long internal_clk =0 ; -struct clk *fclk; -if (dev->rev >=OMAP_I2C_OMAP1_REV_2 ) {/* Disable I2C controller before soft reset */ omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,@@ -353,6 +347,17 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) dev->westate =OMAP_I2C_WE_ALL ; } } +return 0 ; +} + +static int omap_i2c_init (struct omap_i2c_dev *dev) +{ +u16 psc =0 , scll =0 , sclh =0 ; +u16 fsscll =0 , fssclh =0 , hsscll =0 , hssclh =0 ; +unsigned long fclk_rate =12000000 ; +unsigned long internal_clk =0 ; +struct clk *fclk; +if (dev->flags &OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK ) {/* @@ -592,7 +597,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, dev->buf_len =0 ;if (timeout ==0 ) {dev_err (dev->dev,"controller timed out\n" ); -omap_i2c_init (dev); +omap_i2c_reset (dev); +__omap_i2c_init (dev);return -ETIMEDOUT ; }@@ -602,7 +608,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,/* We have an error */ if (dev->cmd_err & (OMAP_I2C_STAT_AL |OMAP_I2C_STAT_ROVR |OMAP_I2C_STAT_XUDF )) { -omap_i2c_init (dev); +omap_i2c_reset (dev); +__omap_i2c_init (dev);return -EIO ; }Signature · 6 lines
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PATCH v2 7/7 i2c: omap: Restore i2c context always
In reply to Shubhrajyoti DCurrently the restore is done based on the flag OMAP_I2C_FLAG_RESET_REGS_POSTIDLE.
This helps the following
- The driver is always capable of restoring regardless of the off mode support being there or not.
- While testing omap2430 it is found that in case of certain error paths (timeout) a reset is done. However the restore never happens as it is dependent on the POSTIDLE flag. The other option would be to call a restore in the reset case. As there are only a few registers to be restored the penalty in the idle case should not be much.
---
Todo: the flag could be deleted if the patch is accepted.
drivers/i2c/busses/i2c-omap.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)
drivers/i2c/busses/i2c-omap.c +1 -2
@@ -1314,8 +1314,7 @@ static int omap_i2c_runtime_resume(struct device *dev)if (!_dev->regs)return 0 ; -if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) -__omap_i2c_init (_dev); +__omap_i2c_init (_dev);return 0 ; }
Signature · 1 line
1.7.5.4
PATCH v2 7/7 i2c: omap: Restore i2c context always
Hi,
Quoted 7 lines · Shubhrajyoti D
Currently the restore is done based on the flag
OMAP_I2C_FLAG_RESET_REGS_POSTIDLE.This helps the following
- The driver is always capable of restoring regardless of the off mode support being there or not.
Quoted 8 lines
- While testing omap2430 it is found that in case of certain error paths (timeout) a reset is done. However the restore never happens as it is dependent on the POSTIDLE flag. The other option would be to call a restore in the reset case. As there are only a few registers to be restored the penalty in the idle case should not be much.
Signed-off-by Shubhrajyoti D <[email protected]>
Looks ok to me, one less unnecessary flag.
Quoted 27 lines
---
Todo: the flag could be deleted if the patch is accepted.drivers/i2c/busses/i2c-omap.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)drivers/i2c/busses/i2c-omap.c +1
-2@@ -1314,8 +1314,7 @@ static int omap_i2c_runtime_resume(struct device *dev)if (!_dev->regs)return 0 ; -if (_dev->flags &OMAP_I2C_FLAG_RESET_REGS_POSTIDLE ) -__omap_i2c_init (_dev); +__omap_i2c_init (_dev);return 0 ; }Signature · 6 lines
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v2 cover i2c: omap: updates
In reply to Shubhrajyoti DHI,
Quoted 34 lines · Shubhrajyoti D
Does the followiing
- Make the revision a 32- bit consisting ofrev_loamdrev_hieach of 16 bits.- Also use the revision register for the erratum i207.
- Refactor thei2c_omap_initcode.Also more cleanup is possible will check on that subsequently.
Tested on OMAP4430sdp ,4460 ,omap3630 ,3430 and omap2430.
For omap2 testing the below patch was used
[PATCH] ARM: vfp: fix save and restore when running on pre-VFPv3 andCONFIG_VFPv3setAlso for using the pm testing below patches are used.
arm: sched: stop
sched_clock()during suspend
ARM: OMAP: hwmod: wait for sysreset complete after enabling hwmodAlso available through
git://gitorious.org/linus-tree/linus-tree.giti2c_omap/for_3.8Shubhrajyoti D (7):
i2c: omap: Fix the revision register read
i2c: omap: use revision check forOMAP_I2C_FLAG_APPLY_ERRATA_I207
i2c: omap: remove the dtrev
ARM: i2c: omap: Remove the i207 errata flag
i2c: omap: re-factoromap_i2c_initfunction
i2c: omap: make reset a seperate function
i2c: omap: Restore i2c context always
Quoted 5 lines
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +- drivers/i2c/busses/i2c-omap.c | 166 +++++++++++++++++----------- include/linux/i2c-omap.h | 1 - 4 files changed, 104 insertions(+), 75 deletions(-)
since I have reviewed your previous version, it would be nice to Cc me so I don't loose your series ;-)
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v2 cover i2c: omap: updates
Quoted 4 lines · Felipe Balbi
Quoted 2 lines
include/linux/i2c-omap.h | 1 -Quoted 1 line
4 files changed, 104 insertions(+), 75 deletions(-)since I have reviewed your previous version, it would be nice to Cc me so I don't loose your series ;-)
OK will do that. thanks :-)