Introduce irqchip infrastructure
Subsystems (18)
PATCH v4 1/1 Introduce irqchip infrastructure
Hello,
Here is a set of patches that introduces a small irqchip infrastructure that allows the registration of irqchip drivers without having each of those drivers to expose a public API and header in include/linux/irqchip/, and moves a number of existing irqchip controller to this infrastructure.
This new version (detailed changelog below) provides a number of
improvements: usage of a special link section to avoid the central registration in irqchip.{c,h} of all irqchip drivers, and addition of the GIC, VIC and Versatile FPGA IRQ drivers move, thanks to Rob Herring and Linus Walleij.
Remaining issues to solve:
* Russell would like arch/arm/include/asm/hardware/vic.h and arch/arm/include/asm/hardware/gic.h to move elsewhere, since the corresponding code is no longer in arch/arm/. I can move them in <linux/irqchip>, but that will cause a fairly large change as there are a big number of users of those headers in arch/arm.
* The arch/arm/include/asm/hardware/vic.h has a few offset macros that should move into the .c file of the irqchip driver, but some of those offsets are bizarrely used in some other pieces of code in arch/arm/.
* How to get rid entirely of the headers in <linux/irqchip/>. The remaining problematic functions are <foo>_handle_irq() and <foo>_irq_init() that are used by non-DT platforms. And the special case of gic_cascade_irq().
* Move all the users of gic_of_init() to the irqchip mechanism (Exynos, i.MX 6, MSM, OMAP, SH Mobile, socfpga, spear13xx, tegra, ux500, vexpress) so that gic_of_init() no longer has to be exported.
Of course, I don't expect any of this to go in 3.8, it is 3.9 material if we manage to reach a consensus on the remaining issues to solve (and the other issues that will certainly show up or be raised by other people).
This series has been built and boot tested for BCM2835 and Armada XP. It has been built tested on Versatile with OF and without OF, spear3xx, spear6xx and a multi_v6_v7 configuration with all possible architectures enabled (therefore including picoxcell).
Changes since v3:
* Switch to a link-trick based registration of the irqchip drivers, using the IRQCHIP_DECLARE() macro.
* Integrate Rob Herring's patches to move the GIC and VIC irq controller drivers in drivers/irqchip/.
* Migrate picoxcell, spear3xx and spear6xx to using the irqchip platform, so that no direct user of vic_of_init() remains.
* Don't export vic_of_init() anymore: all users go through irqchip_init() now.
* Integrate Linus Walleij patch that moves the Versatile FPGA irq controller driver to drivers/irqchip.
* A set_handle_irq() ARM function was added to properly set the handle_arch_irq pointer to the right handler of the parent IRQ controller.
Changes since v2:
* Fixed the entry in the MAINTAINERS file. Noticed by Rob Herring.
* Simplified the Kconfig logic by making the IRQCHIP option enabled by default as soon as OF_IRQ is enabled. The individual ARCH_<foo> Kconfig options no longer have to select IRQCHIP. Also, the option was renamed from USE_IRQCHIP to just IRQCHIP. Suggested by Rob Herring.
* Added Reviewed-by tags given by Rob Herring.
Changes since v1:
* Add a new patch mentionning the drivers/irqchip in the list of directories part of the IRQ subsystem maintained by Thomas Gleixner in the MAINTAINERS file. Requested by Arnd Bergmann.
* Reduce the amount of code movement in the irq-bcm2835.c and irq-armada-370-xp.c files by using one forward declaration for the IRQ handling entry point. Requested by Stephen Warren.
* Rename the armctrl_of_init() function to bcm2835_irqchip_init() as requested by Stephen Warren.
* Added the formal Acked-by and Reviewed-by received from Stephen Warren.
Thanks,
Thomas
PATCH 1/16 irqchip: add basic infrastructure
With the recent creation of the drivers/irqchip/ directory, it is desirable to move irq controller drivers here. At the moment, the only driver here is irq-bcm2835, the driver for the irq controller found in the ARM BCM2835 SoC, present in Rasberry Pi systems. This irq controller driver was exporting its initialization function and its irq handling function through a header file in <linux/irqchip/bcm2835.h>.
When proposing to also move another irq controller driver in drivers/irqchip, Rob Herring raised the very valid point that moving things to drivers/irqchip was good in order to remove more stuff from arch/arm, but if it means adding gazillions of headers files in include/linux/irqchip/, it would not be very nice.
So, upon the suggestion of Rob Herring and Arnd Bergmann, this commit introduces a small infrastructure that defines a central irqchip_init() function in drivers/irqchip/irqchip.c, which is meant to be called as the ->init_irq() callback of ARM platforms. This function calls of_irq_init() with an array that will progressively contain the compatible strings of each irq controller driver, and also a reference to the initialization functions of such drivers. The drivers/irqchip/irqchip.h header file, currently empty, is added to allow irq controller drivers to expose their initialization function to the main irqchip.c file. Note that the irq controller driver initialization function is responsible for setting the global handle_arch_irq() variable, so that ARM platforms no longer have to define the ->handle_irq field in their DT_MACHINE structure.
A global header, <linux/irqchip.h> is also added to expose the single irqchip_init() function to the reset of the kernel.
A further commit moves the BCM2835 irq controller driver to this new small infrastructure, therefore removing the include/linux/irqchip/ directory.
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/Makefile | 1 + drivers/irqchip/irqchip.c | 30 ++++++++++++++++++++++++++++++ drivers/irqchip/irqchip.h | 29 +++++++++++++++++++++++++++++ include/asm-generic/vmlinux.lds.h | 12 +++++++++++- include/linux/irqchip.h | 16 ++++++++++++++++ 6 files changed, 90 insertions(+), 2 deletions(-) create mode 100644 drivers/irqchip/irqchip.c create mode 100644 drivers/irqchip/irqchip.h create mode 100644 include/linux/irqchip.h
drivers/irqchip/Kconfig +3 -1
@@ -1 +1,3 @@ -# empty +config IRQCHIP + def_bool y + depends on OF_IRQ
drivers/irqchip/Makefile +1 -0
@@ -1 +1,2 @@ +obj-$(CONFIG_IRQCHIP) += irqchip.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
drivers/irqchip/irqchip.c new file +30 -0
@@ -0,0 +1,30 @@ +/* +* Copyright (C) 2012 Thomas Petazzoni +* +* Thomas Petazzoni <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#include <linux/init.h> +#include <linux/of_irq.h> + +#include "irqchip.h" + +/* +* This special of_device_id is the sentinel at the end of the +* of_device_id[] array of all irqchips. It is automatically placed at +* the end of the array by the linker, thanks to being part of a +* special section. +*/ +static const struct of_device_id +irqchip_of_match_end __used __section(__irqchip_of_end); + +extern struct of_device_id __irqchip_begin[]; + +void __init irqchip_init (void ) +{ +of_irq_init (__irqchip_begin); +}
drivers/irqchip/irqchip.h new file +29 -0
@@ -0,0 +1,29 @@ +/* +* Copyright (C) 2012 Thomas Petazzoni +* +* Thomas Petazzoni <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifndef _IRQCHIP_H +#define _IRQCHIP_H + +/* +* This macro must be used by the different irqchip drivers to declare +* the association between their DT compatible string and their +* initialization function. +* +* @name: name that must be unique accross all IRQCHIP_DECLARE of the +* same file. +* @compstr: compatible string of the irqchip driver +* @fn: initialization function +*/ +#define IRQCHIP_DECLARE (name,compstr,fn) \ + static const struct of_device_id irqchip_of_match_##name \ + __used __section(__irqchip_of_table) \ + = { .compatible = compstr, .data = fn } + +#endif
include/asm-generic/vmlinux.lds.h +11 -1
@@ -149,6 +149,15 @@#define TRACE_SYSCALLS ()#endif +#ifdef CONFIG_IRQCHIP +#define IRQCHIP_OF_MATCH_TABLE () \ + . = ALIGN(8); \ + VMLINUX_SYMBOL(__irqchip_begin) = .; \ + *(__irqchip_of_table) \ + *(__irqchip_of_end) +#else +#define IRQCHIP_OF_MATCH_TABLE () +#endif #define KERNEL_DTB () \ STRUCT_ALIGN(); \
@@ -493,7 +502,8 @@ DEV_DISCARD(init.rodata) \ CPU_DISCARD(init.rodata) \ MEM_DISCARD(init.rodata) \ - KERNEL_DTB() + KERNEL_DTB() \ + IRQCHIP_OF_MATCH_TABLE()#define INIT_TEXT \ *(.init.text) \
include/linux/irqchip.h new file +16 -0
@@ -0,0 +1,16 @@ +/* +* Copyright (C) 2012 Thomas Petazzoni +* +* Thomas Petazzoni <[email protected]> +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#ifndef _LINUX_IRQCHIP_H +#define _LINUX_IRQCHIP_H + +void irqchip_init (void ); + +#endif
Signature · 1 line
1.7.9.5
PATCH 1/16 irqchip: add basic infrastructure
Quoted 7 lines · Thomas Petazzoni
With the recent creation of the
drivers/irqchip/directory, it is desirable to move irq controller drivers here. At the moment, the only driver here is irq-bcm2835, the driver for the irq controller found in the ARM BCM2835 SoC, present in Rasberry Pi systems. This irq controller driver was exporting its initialization function and its irq handling function through a header file in <linux/irqchip/bcm2835.h>.
...
Quoted 1 line
Reviewed-by Stephen Warren <[email protected]>
That still stands as:
... although I think in this case the implementation changed enough it probably shouldn't have been kept in v4.
drivers/irqchip/Kconfig
Quoted 3 lines
drivers/irqchip/Kconfig +1
-0+config IRQCHIP
I wonder if it should be IRQCHIP_OF, since it's OF-specific?
drivers/irqchip/Kconfig line 3
Quoted 2 lines
drivers/irqchip/Kconfig +2
-0+ def_bool y + depends on OF_IRQ
For the drivers/clocksource patch I created, I required the architecture/machine config option to select it rather than making it a def_bool. Would that be better? I suppose if it's going to be selected in a lot of places anyway, and since the code will just be dropped if it isn't used, then making it default to on is reasonable though.
include/asm-generic/vmlinux.lds.h line 506
Quoted 9 lines
include/asm-generic/vmlinux.lds.h +2
-1@@ -493,7 +502,8 @@ DEV_DISCARD(init.rodata) \ CPU_DISCARD(init.rodata) \ MEM_DISCARD(init.rodata) \ -KERNEL_DTB () + KERNEL_DTB() \ +IRQCHIP_OF_MATCH_TABLE ()
Does it make sense to put that before KERNEL_DTB()? I did in my drivers/clocksource patch just in case anything depended on KERNEL_DTB being last along the lines of APPENDED_DTB. That said, now that I think about it, nothing really should depend on the order...
PATCH 1/16 irqchip: add basic infrastructure
Stephen,
Quoted 8 lines · Stephen Warren
Quoted 1 line
Reviewed-by Stephen Warren <[email protected]>That still stands as:
Reviewed-by Stephen Warren <[email protected]>... although I think in this case the implementation changed enough it probably shouldn't have been kept in v4.
Indeed, my apologies. I was seeing some interest in this irqchip thing in the recent days, and I wanted to show some of the progress but have been quite busy with the mvebu development. So I was quite certainly a bit too quick.
Quoted 6 lines
drivers/irqchip/Kconfig
Quoted 3 lines
drivers/irqchip/Kconfig +1
-0+config IRQCHIPI wonder if it should be
IRQCHIP_OF, since it's OF-specific?
Quoted 8 lines
drivers/irqchip/Kconfig line 3
Quoted 2 lines
drivers/irqchip/Kconfig +2
-0+ def_bool y + depends on OF_IRQFor the
drivers/clocksourcepatch I created, I required the architecture/machine config option to select it rather than making it adef_bool. Would that be better? I suppose if it's going to be selected in a lot of places anyway, and since the code will just be dropped if it isn't used, then making it default to on is reasonable though.
Well, Rob Herring suggesting this def_bool y originally, I think it makes sense as all new DT platforms will most likely this mechanism for their IRQ driver. But if people feel like having a per-platform 'select IRQCHIP', I'm fine as well.
Quoted 14 lines
include/asm-generic/vmlinux.lds.h line 506
Quoted 9 lines
include/asm-generic/vmlinux.lds.h +2
-1@@ -493,7 +502,8 @@ DEV_DISCARD(init.rodata) \ CPU_DISCARD(init.rodata) \ MEM_DISCARD(init.rodata) \ -KERNEL_DTB () + KERNEL_DTB() \ +IRQCHIP_OF_MATCH_TABLE ()Does it make sense to put that before
KERNEL_DTB()? I did in mydrivers/clocksourcepatch just in case anything depended onKERNEL_DTBbeing last along the lines ofAPPENDED_DTB. That said, now that I think about it, nothing really should depend on the order...
I haven't thought about this, and I actually booted an APPENDED_DTB kernel with this IRQCHIP_OF_MATCH_TABLE thing on Armada XP, and it worked. I admit I haven't looked in details at what this KERNEL_DTB() thing was.
Thanks!
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 2/16 arm: add set_handle_irq() to register the parent IRQ controller handler function
In reply to Thomas PetazzoniIn order to allow irqchip drivers to register their IRQ handling function as the parent IRQ controller handler function, we provide a convenience function. This will avoid poking directly into the global handle_arch_irq variable, and ensures that the user gets warned if we're trying to register a second IRQ controller as the parent one.
Suggested by Arnd Bergmann.
--- arch/arm/include/asm/mach/irq.h | 1 + arch/arm/kernel/irq.c | 10 ++++++++++ 2 files changed, 11 insertions(+)
arch/arm/include/asm/mach/irq.h +1 -0
@@ -22,6 +22,7 @@ extern int show_fiq_list(struct seq_file *, int);#ifdef CONFIG_MULTI_IRQ_HANDLER extern void (*handle_arch_irq)(struct pt_regs *); +extern void set_handle_irq (void (*handle_irq)(struct pt_regs *));#endif /*
arch/arm/kernel/irq.c +10 -0
@@ -117,6 +117,16 @@ void __init init_IRQ(void) machine_desc->init_irq (); } +#ifdef CONFIG_MULTI_IRQ_HANDLER +void __init set_handle_irq (void (*handle_irq)(struct pt_regs *)) +{ +if (WARN_ON (handle_arch_irq)) +return ; + + handle_arch_irq = handle_irq; +} +#endif +#ifdef CONFIG_SPARSE_IRQ int __init arch_probe_nr_irqs (void ) {
Signature · 1 line
1.7.9.5
PATCH 2/16 arm: add set_handle_irq() to register the parent IRQ controller handler function
Quoted 31 lines · Thomas Petazzoni
In order to allow irqchip drivers to register their IRQ handling function as the parent IRQ controller handler function, we provide a convenience function. This will avoid poking directly into the global
handle_arch_irqvariable, and ensures that the user gets warned if we're trying to register a second IRQ controller as the parent one.Suggested by Arnd Bergmann.
Signed-off-by Thomas Petazzoni <[email protected]>--- arch/arm/include/asm/mach/irq.h | 1 + arch/arm/kernel/irq.c | 10 ++++++++++ 2 files changed, 11 insertions(+)arch/arm/include/asm/mach/irq.h +1
-0@@ -22,6 +22,7 @@ extern int show_fiq_list(struct seq_file *, int);#ifdef CONFIG_MULTI_IRQ_HANDLER extern void (*handle_arch_irq)(struct pt_regs *); +extern void set_handle_irq (void (*handle_irq)(struct pt_regs *));#endif /* arch/arm/kernel/irq.c +0
-0
arch/arm/kernel/irq.c void __init init_IRQ(void) · line 124
Quoted 8 lines
arch/arm/kernel/irq.c +5
-0@@ -117,6 +117,16 @@ void __init init_IRQ(void) machine_desc->init_irq (); } +#ifdef CONFIG_MULTI_IRQ_HANDLER +void __init set_handle_irq (void (*handle_irq)(struct pt_regs *)) +{ +if (WARN_ON (handle_arch_irq)) +return ;
I wonder if we should just return silently without warning and rely on the top level controller being initialized 1st. For the DT case, this is guaranteed. In the non-DT case, we don't really know if we are the top-level controller at least in a consistent way. AFAIK, it happens that the 1st instance of the VIC or GIC is always the top level and we can use that (i.e. gic_nr == 0). However, theoretically you could have a VIC connected to a top-level GIC or even vice-versa.
Rob
Quoted 9 lines
arch/arm/kernel/irq.c +5
-0+ + handle_arch_irq = handle_irq; +} +#endif +#ifdef CONFIG_SPARSE_IRQ int __init arch_probe_nr_irqs (void ) {
PATCH 3/16 arm: bcm2835: convert to the irqchip infrastructure
In reply to Thomas PetazzoniRegister the irq controller driver in the main drivers/irqchip/irqchip.c file, and make sure that the initialization function of the driver sets handle_arch_irq() appropriately. This requires a bit of movement in the driver since the bcm2835_handle_irq() must move before the armctrl_of_init() function to avoid a forward declaration.
On the arch/arm side, use irqchip_init() as the ->init_irq() callback, and remove the definition of ->handle_irq() since this is now done by the irq controller driver.
--- arch/arm/mach-bcm2835/bcm2835.c | 5 ++--- drivers/irqchip/irq-bcm2835.c | 27 ++++++++++++++------------- include/linux/irqchip/bcm2835.h | 29 ----------------------------- 3 files changed, 16 insertions(+), 45 deletions(-) delete mode 100644 include/linux/irqchip/bcm2835.h
arch/arm/mach-bcm2835/bcm2835.c +2 -3
@@ -13,10 +13,10 @@*/ #include <linux/init.h> -#include <linux/irqchip/bcm2835.h> #include <linux/of_platform.h> #include <linux/bcm2835_timer.h> #include <linux/clk/bcm2835.h> +#include <linux/irqchip.h> #include <asm/mach/arch.h> #include <asm/mach/map.h>
@@ -56,8 +56,7 @@ static const char * const bcm2835_compat[] = {DT_MACHINE_START (BCM2835 ,"BCM2835" ) .map_io = bcm2835_map_io, - .init_irq = bcm2835_init_irq, - .handle_irq = bcm2835_handle_irq, + .init_irq = irqchip_init, .init_machine = bcm2835_init, .timer = &bcm2835_timer, .dt_compat = bcm2835_compat
drivers/irqchip/irq-bcm2835.c +14 -13
@@ -49,9 +49,11 @@#include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/irqdomain.h> -#include <linux/irqchip/bcm2835.h> #include <asm/exception.h> +#include <asm/mach/irq.h> + +#include "irqchip.h" /* Put the bank and irq (32 bits) into the hwirq */ #define MAKE_HWIRQ (b, n) ((b << 5) | (n))
@@ -135,8 +137,10 @@ static struct irq_domain_ops armctrl_ops = { .xlate = armctrl_xlate }; -static int __init armctrl_of_init (struct device_node *node, -struct device_node *parent) +static asmlinkage void bcm2835_handle_irq(struct pt_regs *regs); + +static int __init bcm2835_irqchip_init (struct device_node *node, +struct device_node *parent) {void __iomem *base;int irq, b, i;
@@ -164,16 +168,10 @@ static int __init armctrl_of_init(struct device_node *node,set_irq_flags (irq,IRQF_VALID |IRQF_PROBE ); } } -return 0 ; -} -static struct of_device_id irq_of_match[]__initconst = { - { .compatible ="brcm,bcm2835-armctrl-ic" , .data = armctrl_of_init } -}; +set_handle_irq (bcm2835_handle_irq); -void __init bcm2835_init_irq (void ) -{ -of_irq_init (irq_of_match); +return 0 ; }/*
@@ -199,8 +197,8 @@ static void armctrl_handle_shortcut(int bank, struct pt_regs *regs,handle_IRQ (irq_linear_revmap (intc.domain, irq), regs); } -asmlinkage void __exception_irq_entry bcm2835_handle_irq( -struct pt_regs *regs) +static asmlinkage void __exception_irq_entry +bcm2835_handle_irq (struct pt_regs *regs) {u32 stat, irq;
@@ -221,3 +219,6 @@ asmlinkage void __exception_irq_entry bcm2835_handle_irq( } } } + +IRQCHIP_DECLARE (bcm2835_armctrl_ic,"brcm,bcm2835-armctrl-ic" , + bcm2835_irqchip_init);
include/linux/irqchip/bcm2835.h deleted +0 -29
@@ -1,29 +0,0 @@ -/* -* Copyright (C) 2010 Broadcom -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License as published by -* the Free Software Foundation; either version 2 of the License, or -* (at your option) any later version. -* -* This program is distributed in the hope that it will be useful, -* but WITHOUT ANY WARRANTY; without even the implied warranty of -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -* GNU General Public License for more details. -* -* You should have received a copy of the GNU General Public License -* along with this program; if not, write to the Free Software -* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#ifndef __LINUX_IRQCHIP_BCM2835_H_ -#define __LINUX_IRQCHIP_BCM2835_H_ - -#include <asm/exception.h> - -extern void bcm2835_init_irq (void ); - -extern asmlinkage void __exception_irq_entry bcm2835_handle_irq( -struct pt_regs *regs); - -#endif
Signature · 1 line
1.7.9.5
PATCH 4/16 arm: mvebu: move irq controller driver to drivers/irqchip
In reply to Thomas PetazzoniNow that the drivers/irqchip/ directory has a minimal infrastructure to support the addition of irq controller driver, we move the irq controller driver for Armada 370 and Armada XP ARM SoCs from the arch/arm/mach-mvebu/ directory to the drivers/irqchip/ directory and update the irqchip infrastructure to take into account this new driver.
---
arch/arm/mach-mvebu/Makefile | 2 +-
arch/arm/mach-mvebu/armada-370-xp.c | 4 +--
arch/arm/mach-mvebu/common.h | 3 ---
drivers/irqchip/Makefile | 1 +
.../irqchip}/irq-armada-370-xp.c | 28 +++++++++++---------
5 files changed, 19 insertions(+), 19 deletions(-)
rename {arch/arm/mach-mvebu => drivers/irqchip}/irq-armada-370-xp.c (87%)arch/arm/mach-mvebu/Makefile +1 -1
@@ -2,4 +2,4 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ -I$(srctree)/arch/arm/plat-orion/include obj-y += system-controller.o -obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o +obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o addr-map.o
arch/arm/mach-mvebu/armada-370-xp.c +2 -2
@@ -16,6 +16,7 @@#include <linux/init.h> #include <linux/of_platform.h> #include <linux/io.h> +#include <linux/irqchip.h> #include <linux/time-armada-370-xp.h> #include <asm/mach/arch.h> #include <asm/mach/map.h>
@@ -54,8 +55,7 @@ static const char * const armada_370_xp_dt_compat[] = {DT_MACHINE_START (ARMADA_XP_DT ,"Marvell Armada 370/XP (Device Tree)" ) .init_machine = armada_370_xp_dt_init, .map_io = armada_370_xp_map_io, - .init_irq = armada_370_xp_init_irq, - .handle_irq = armada_370_xp_handle_irq, + .init_irq = irqchip_init, .timer = &armada_370_xp_timer, .restart = mvebu_restart, .dt_compat = armada_370_xp_dt_compat,
arch/arm/mach-mvebu/common.h +0 -3
@@ -17,7 +17,4 @@void mvebu_restart (char mode,const char *cmd); -void armada_370_xp_init_irq (void ); -void armada_370_xp_handle_irq (struct pt_regs *regs); -#endif
drivers/irqchip/Makefile +1 -0
@@ -1,2 +1,3 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o +obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
drivers/irqchip/irq-armada-370-xp.c renamed from arch/arm/mach-mvebu/irq-armada-370-xp.c +15 -13
@@ -23,8 +23,11 @@#include <linux/of_irq.h> #include <linux/irqdomain.h> #include <asm/mach/arch.h> +#include <asm/mach/irq.h> #include <asm/exception.h> +#include "irqchip.h" +/* Interrupt Controller Registers Map */ #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48)#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C)
@@ -77,8 +80,12 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = { .xlate = irq_domain_xlate_onecell, }; -static int __init armada_370_xp_mpic_of_init (struct device_node *node, -struct device_node *parent) +static asmlinkage void +armada_370_xp_handle_irq (struct pt_regs *regs); + +static int __init +armada_370_xp_mpic_of_init (struct device_node *node, +struct device_node *parent) {u32 control;
@@ -98,11 +105,14 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,panic ("Unable to add Armada_370_Xp MPIC irq domain (DT)\n" );irq_set_default_host (armada_370_xp_mpic_domain); + +set_handle_irq (armada_370_xp_handle_irq); +return 0 ; } -asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs - *regs) +static asmlinkage void __exception_irq_entry +armada_370_xp_handle_irq (struct pt_regs *regs) {u32 irqstat, irqnr;
@@ -122,12 +132,4 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs }while (1 ); } -static const struct of_device_id mpic_of_match[]__initconst = { - {.compatible ="marvell,mpic" , .data = armada_370_xp_mpic_of_init}, - {}, -}; - -void __init armada_370_xp_init_irq (void ) -{ -of_irq_init (mpic_of_match); -} +IRQCHIP_DECLARE (mpic,"marvell,mpic" , armada_370_xp_mpic_of_init);
Signature · 1 line
1.7.9.5
PATCH 5/16 irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS
In reply to Thomas PetazzoniNow that the drivers/irqchip/ directory is getting more code, it needs a maintainer. The obvious maintainer for it is Thomas Gleixner, who is maintaining the overall IRQ subsystem. So we add drivers/irqchip/ in the list of directories that are part of the IRQ subsystem.
--- MAINTAINERS | 1 + 1 file changed, 1 insertion(+)
MAINTAINERS +1 -0
@@ -4043,6 +4043,7 @@ M: Thomas Gleixner <[email protected]> S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core F: kernel/irq/ +F: drivers/irqchip/ IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) M: Benjamin Herrenschmidt <[email protected]>
Signature · 1 line
1.7.9.5
PATCH 6/16 ARM: gic: move register definitions into .c file
In reply to Thomas PetazzoniFrom: Rob Herring <[email protected]>
There's only 1 user of gic registers outside of gic.c, so move the register definitions into gic.c. For now, keep GIC_DIST_CNT as Tegra uses it.
--- arch/arm/common/gic.c | 21 ++++++++++++++++++++- arch/arm/include/asm/hardware/gic.h | 18 ------------------ 2 files changed, 20 insertions(+), 19 deletions(-)
arch/arm/common/gic.c +20 -1
@@ -43,7 +43,26 @@#include <asm/exception.h> #include <asm/smp_plat.h> #include <asm/mach/irq.h> -#include <asm/hardware/gic.h> + +#define GIC_CPU_CTRL 0x00 +#define GIC_CPU_PRIMASK 0x04 +#define GIC_CPU_BINPOINT 0x08 +#define GIC_CPU_INTACK 0x0c +#define GIC_CPU_EOI 0x10 +#define GIC_CPU_RUNNINGPRI 0x14 +#define GIC_CPU_HIGHPRI 0x18 + +#define GIC_DIST_CTRL 0x000 +#define GIC_DIST_CTR 0x004 +#define GIC_DIST_ENABLE_SET 0x100 +#define GIC_DIST_ENABLE_CLEAR 0x180 +#define GIC_DIST_PENDING_SET 0x200 +#define GIC_DIST_PENDING_CLEAR 0x280 +#define GIC_DIST_ACTIVE_BIT 0x300 +#define GIC_DIST_PRI 0x400 +#define GIC_DIST_TARGET 0x800 +#define GIC_DIST_CONFIG 0xc00 +#define GIC_DIST_SOFTINT 0xf00union gic_base {void __iomem *common_base;
arch/arm/include/asm/hardware/gic.h +0 -18
@@ -12,25 +12,7 @@#include <linux/compiler.h> -#define GIC_CPU_CTRL 0x00 -#define GIC_CPU_PRIMASK 0x04 -#define GIC_CPU_BINPOINT 0x08 -#define GIC_CPU_INTACK 0x0c -#define GIC_CPU_EOI 0x10 -#define GIC_CPU_RUNNINGPRI 0x14 -#define GIC_CPU_HIGHPRI 0x18 - -#define GIC_DIST_CTRL 0x000#define GIC_DIST_CTR 0x004 -#define GIC_DIST_ENABLE_SET 0x100 -#define GIC_DIST_ENABLE_CLEAR 0x180 -#define GIC_DIST_PENDING_SET 0x200 -#define GIC_DIST_PENDING_CLEAR 0x280 -#define GIC_DIST_ACTIVE_BIT 0x300 -#define GIC_DIST_PRI 0x400 -#define GIC_DIST_TARGET 0x800 -#define GIC_DIST_CONFIG 0xc00 -#define GIC_DIST_SOFTINT 0xf00#ifndef __ASSEMBLY__#include <linux/irqdomain.h>
Signature · 1 line
1.7.9.5
PATCH 6/16 ARM: gic: move register definitions into .c file
Quoted 11 lines · Thomas Petazzoni
From: Rob Herring <[email protected]>
There's only 1 user of gic registers outside of
gic.c, so move the register definitions intogic.c. For now, keepGIC_DIST_CNTas Tegra uses it.Signed-off-by Rob Herring <[email protected]>--- arch/arm/common/gic.c | 21 ++++++++++++++++++++- arch/arm/include/asm/hardware/gic.h | 18 ------------------ 2 files changed, 20 insertions(+), 19 deletions(-)
We need to drop this patch as Marc Zyngier pointed out to me that KVM will need the distributor register definitions as part of the GIC distributor emulation. It probably doesn't make sense to move only the cpu interface registers.
Rob
Quoted 64 lines
arch/arm/common/gic.c +20
-1@@ -43,7 +43,26 @@#include <asm/exception.h> #include <asm/smp_plat.h> #include <asm/mach/irq.h> -#include <asm/hardware/gic.h> + +#define GIC_CPU_CTRL 0x00 +#define GIC_CPU_PRIMASK 0x04 +#define GIC_CPU_BINPOINT 0x08 +#define GIC_CPU_INTACK 0x0c +#define GIC_CPU_EOI 0x10 +#define GIC_CPU_RUNNINGPRI 0x14 +#define GIC_CPU_HIGHPRI 0x18 + +#define GIC_DIST_CTRL 0x000 +#define GIC_DIST_CTR 0x004 +#define GIC_DIST_ENABLE_SET 0x100 +#define GIC_DIST_ENABLE_CLEAR 0x180 +#define GIC_DIST_PENDING_SET 0x200 +#define GIC_DIST_PENDING_CLEAR 0x280 +#define GIC_DIST_ACTIVE_BIT 0x300 +#define GIC_DIST_PRI 0x400 +#define GIC_DIST_TARGET 0x800 +#define GIC_DIST_CONFIG 0xc00 +#define GIC_DIST_SOFTINT 0xf00union gic_base {void __iomem *common_base;arch/arm/include/asm/hardware/gic.h +0
-18@@ -12,25 +12,7 @@#include <linux/compiler.h> -#define GIC_CPU_CTRL 0x00 -#define GIC_CPU_PRIMASK 0x04 -#define GIC_CPU_BINPOINT 0x08 -#define GIC_CPU_INTACK 0x0c -#define GIC_CPU_EOI 0x10 -#define GIC_CPU_RUNNINGPRI 0x14 -#define GIC_CPU_HIGHPRI 0x18 - -#define GIC_DIST_CTRL 0x000#define GIC_DIST_CTR 0x004 -#define GIC_DIST_ENABLE_SET 0x100 -#define GIC_DIST_ENABLE_CLEAR 0x180 -#define GIC_DIST_PENDING_SET 0x200 -#define GIC_DIST_PENDING_CLEAR 0x280 -#define GIC_DIST_ACTIVE_BIT 0x300 -#define GIC_DIST_PRI 0x400 -#define GIC_DIST_TARGET 0x800 -#define GIC_DIST_CONFIG 0xc00 -#define GIC_DIST_SOFTINT 0xf00#ifndef __ASSEMBLY__#include <linux/irqdomain.h>
PATCH 7/16 ARM: gic: remove direct use of gic_raise_softirq
In reply to Thomas PetazzoniFrom: Rob Herring <[email protected]>
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code. Now that all platforms are using IPI#0 for core wakeup, create a common wakeup ipi function.
--- arch/arm/common/gic.c | 45 +++++++++++++++++++---------------- arch/arm/include/asm/hardware/gic.h | 1 - arch/arm/include/asm/smp.h | 1 + arch/arm/kernel/smp.c | 5 ++++ arch/arm/mach-exynos/platsmp.c | 4 +--- arch/arm/mach-highbank/platsmp.c | 4 +--- arch/arm/mach-imx/platsmp.c | 2 -- arch/arm/mach-msm/platsmp.c | 4 +--- arch/arm/mach-omap2/omap-smp.c | 4 +--- arch/arm/mach-realview/platsmp.c | 2 -- arch/arm/mach-shmobile/platsmp.c | 2 -- arch/arm/mach-shmobile/smp-emev2.c | 2 +- arch/arm/mach-spear13xx/platsmp.c | 2 -- arch/arm/mach-tegra/platsmp.c | 2 -- arch/arm/mach-ux500/platsmp.c | 2 -- arch/arm/mach-vexpress/ct-ca9x4.c | 2 -- arch/arm/mach-vexpress/platsmp.c | 2 -- arch/arm/plat-versatile/platsmp.c | 2 +- 18 files changed, 36 insertions(+), 52 deletions(-)
arch/arm/common/gic.c +24 -21
@@ -616,6 +616,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic) }#endif +#ifdef CONFIG_SMP +static void gic_raise_softirq (const struct cpumask *mask,unsigned int irq) +{ +int cpu; +unsigned long map =0 ; + +/* Convert our logical CPU mask into a physical one. */ +for_each_cpu (cpu, mask) + map |=1 <<cpu_logical_map (cpu); + +/* +* Ensure that stores to Normal memory are visible to the +* other CPUs before issuing the IPI. +*/ +dsb (); + +/* this always happens on GIC0 */ +writel_relaxed (map <<16 | irq,gic_data_dist_base (&gic_data[0 ]) +GIC_DIST_SOFTINT ); +} +#endif +static int gic_irq_domain_map (struct irq_domain *d,unsigned int irq,irq_hw_number_t hw) {
@@ -735,6 +756,9 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,if (WARN_ON (!gic->domain))return ; +#ifdef CONFIG_SMP +set_smp_cross_call (gic_raise_softirq); +#endif gic_chip.flags |= gic_arch_extn.flags;gic_dist_init (gic);gic_cpu_init (gic);
@@ -748,27 +772,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr)gic_cpu_init (&gic_data[gic_nr]); } -#ifdef CONFIG_SMP -void gic_raise_softirq (const struct cpumask *mask,unsigned int irq) -{ -int cpu; -unsigned long map =0 ; - -/* Convert our logical CPU mask into a physical one. */ -for_each_cpu (cpu, mask) - map |=1 <<cpu_logical_map (cpu); - -/* -* Ensure that stores to Normal memory are visible to the -* other CPUs before issuing the IPI. -*/ -dsb (); - -/* this always happens on GIC0 */ -writel_relaxed (map <<16 | irq,gic_data_dist_base (&gic_data[0 ]) +GIC_DIST_SOFTINT ); -} -#endif -#ifdef CONFIG_OF static int gic_cnt__initdata =0 ;
arch/arm/include/asm/hardware/gic.h +0 -1
@@ -26,7 +26,6 @@ int gic_of_init(struct device_node *node, struct device_node *parent);void gic_secondary_init (unsigned int );void gic_handle_irq (struct pt_regs *regs);void gic_cascade_irq (unsigned int gic_nr,unsigned int irq); -void gic_raise_softirq (const struct cpumask *mask,unsigned int irq);static inline void gic_init (unsigned int nr,int start,void __iomem *dist ,void __iomem *cpu)
arch/arm/include/asm/smp.h +1 -0
@@ -79,6 +79,7 @@ extern void cpu_die(void);extern void arch_send_call_function_single_ipi (int cpu);extern void arch_send_call_function_ipi_mask (const struct cpumask *mask); +extern void arch_send_wakeup_ipi (int cpu);struct smp_operations {#ifdef CONFIG_SMP
arch/arm/kernel/smp.c +5 -0
@@ -426,6 +426,11 @@ void arch_send_call_function_single_ipi(int cpu)smp_cross_call (cpumask_of (cpu),IPI_CALL_FUNC_SINGLE ); } +void arch_send_wakeup_ipi (int cpu) +{ +smp_cross_call (cpumask_of (cpu),IPI_WAKEUP ); +} +static const char *ipi_types[NR_IPI ] = { #define S(x,s) [x] = sS (IPI_WAKEUP ,"CPU wakeup interrupts" ),
arch/arm/mach-exynos/platsmp.c +1 -3
@@ -134,7 +134,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct__raw_writel (virt_to_phys (exynos4_secondary_startup),CPU1_BOOT_REG ); -gic_raise_softirq (cpumask_of (cpu),0 ); +arch_send_wakeup_ipi (cpu);if (pen_release ==-1 )break ;
@@ -175,8 +175,6 @@ static void __init exynos_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init exynos_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-highbank/platsmp.c +1 -3
@@ -32,7 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)static int __cpuinit highbank_boot_secondary (unsigned int cpu,struct task_struct *idle) { -gic_raise_softirq (cpumask_of (cpu),0 ); +arch_send_wakeup_ipi (cpu);return 0 ; }
@@ -57,8 +57,6 @@ static void __init highbank_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init highbank_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-imx/platsmp.c +0 -2
@@ -70,8 +70,6 @@ static void __init imx_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }void imx_smp_prepare (void )
arch/arm/mach-msm/platsmp.c +1 -3
@@ -115,7 +115,7 @@ static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *id* the boot monitor to read the system wide flags register, * and branch to the address found there. */ -gic_raise_softirq (cpumask_of (cpu),0 ); +arch_send_wakeup_ipi (cpu); timeout = jiffies + (1 *HZ );while (time_before (jiffies, timeout)) {
@@ -153,8 +153,6 @@ static void __init msm_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init msm_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-omap2/omap-smp.c +1 -3
@@ -125,7 +125,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * booted = true; } -gic_raise_softirq (cpumask_of (cpu),0 ); +arch_send_wakeup_ipi (cpu);/* * Now the secondary core is starting up let it run its
@@ -192,8 +192,6 @@ static void __init omap4_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init omap4_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-realview/platsmp.c +0 -2
@@ -59,8 +59,6 @@ static void __init realview_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init realview_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-shmobile/platsmp.c +0 -2
@@ -26,6 +26,4 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }
arch/arm/mach-shmobile/smp-emev2.c +1 -1
@@ -100,7 +100,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct */* Tell ROM loader about our vector (in headsmp.S) */ emev2_set_boot_vector (__pa (shmobile_secondary_vector)); -gic_raise_softirq (cpumask_of (cpu),0 ); +arch_send_wakeup_ipi (cpu);return 0 ; }
arch/arm/mach-spear13xx/platsmp.c +0 -2
@@ -104,8 +104,6 @@ static void __init spear13xx_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init spear13xx_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-tegra/platsmp.c +0 -2
@@ -160,8 +160,6 @@ static void __init tegra_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init tegra_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-ux500/platsmp.c +0 -2
@@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)for (i =0 ; i < ncores; i++)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init ux500_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/mach-vexpress/ct-ca9x4.c +0 -2
@@ -195,8 +195,6 @@ static void __init ct_ca9x4_init_cpu_map(void)for (i =0 ; i < ncores; ++i)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init ct_ca9x4_smp_enable (unsigned int max_cpus)
arch/arm/mach-vexpress/platsmp.c +0 -2
@@ -127,8 +127,6 @@ static void __init vexpress_dt_smp_init_cpus(void)for (i =0 ; i < ncores; ++i)set_cpu_possible (i, true); - -set_smp_cross_call (gic_raise_softirq); }static void __init vexpress_dt_smp_prepare_cpus (unsigned int max_cpus)
arch/arm/plat-versatile/platsmp.c +1 -1
@@ -79,7 +79,7 @@ int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idl* the boot monitor to read the system wide flags register, * and branch to the address found there. */ -gic_raise_softirq (cpumask_of (cpu),0 ); +arch_send_wakeup_ipi (cpu); timeout = jiffies + (1 *HZ );while (time_before (jiffies, timeout)) {
Signature · 1 line
1.7.9.5
PATCH 8/16 irqchip: Move ARM GIC to drivers/irqchip
In reply to Thomas PetazzoniFrom: Rob Herring <[email protected]>
Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64.
--- arch/arm/common/Kconfig | 8 -------- arch/arm/common/Makefile | 1 - drivers/irqchip/Kconfig | 8 ++++++++ drivers/irqchip/Makefile | 1 + arch/arm/common/gic.c => drivers/irqchip/irq-gic.c | 8 ++++++++ 5 files changed, 17 insertions(+), 9 deletions(-) rename arch/arm/common/gic.c => drivers/irqchip/irq-gic.c (99%)
arch/arm/common/Kconfig +0 -8
@@ -1,11 +1,3 @@ -config ARM_GIC - bool - select IRQ_DOMAIN - select MULTI_IRQ_HANDLER - -config GIC_NON_BANKED - bool - config ARM_VIC bool select IRQ_DOMAIN
arch/arm/common/Makefile +0 -1
@@ -2,7 +2,6 @@ # Makefile for the linux kernel. # -obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_ARM_VIC) += vic.o obj-$(CONFIG_ICST) += icst.o obj-$(CONFIG_SA1111) += sa1111.o
drivers/irqchip/Kconfig +8 -0
@@ -1,3 +1,11 @@ config IRQCHIP def_bool y depends on OF_IRQ + +config ARM_GIC + bool + select IRQ_DOMAIN + select MULTI_IRQ_HANDLER + +config GIC_NON_BANKED + bool
drivers/irqchip/Makefile +1 -0
@@ -1,3 +1,4 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o +obj-$(CONFIG_ARM_GIC) += irq-gic.o
drivers/irqchip/irq-gic.c renamed from arch/arm/common/gic.c +8 -0
@@ -44,6 +44,8 @@#include <asm/smp_plat.h> #include <asm/mach/irq.h> +#include "irqchip.h" +#define GIC_CPU_CTRL 0x00#define GIC_CPU_PRIMASK 0x04#define GIC_CPU_BINPOINT 0x08
@@ -799,8 +801,14 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)if (parent) { irq =irq_of_parse_and_map (node,0 );gic_cascade_irq (gic_cnt, irq); + }else { +set_handle_irq (gic_handle_irq); } + gic_cnt++; return 0; }#endif + +IRQCHIP_DECLARE (cortex_a15_gic,"arm,cortex-a15-gic" , gic_of_init); +IRQCHIP_DECLARE (cortex_a9_gic,"arm,cortex-a9-gic" , gic_of_init);
Signature · 1 line
1.7.9.5
PATCH 9/16 irqchip: Move ARM VIC to drivers/irqchip
In reply to Thomas PetazzoniFrom: Rob Herring <[email protected]>
Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip.
--- arch/arm/common/Kconfig | 15 ---- arch/arm/common/Makefile | 1 - drivers/irqchip/Kconfig | 15 ++++ drivers/irqchip/Makefile | 1 + arch/arm/common/vic.c => drivers/irqchip/irq-vic.c | 75 +++++++++++--------- 5 files changed, 58 insertions(+), 49 deletions(-) rename arch/arm/common/vic.c => drivers/irqchip/irq-vic.c (98%)
arch/arm/common/Kconfig +0 -15
@@ -1,18 +1,3 @@ -config ARM_VIC - bool - select IRQ_DOMAIN - select MULTI_IRQ_HANDLER - -config ARM_VIC_NR - int - default 4 if ARCH_S5PV210 - default 3 if ARCH_S5PC100 - default 2 - depends on ARM_VIC - help - The maximum number of VICs available in the system, for - power management. - config ICST bool
arch/arm/common/Makefile +0 -1
@@ -2,7 +2,6 @@ # Makefile for the linux kernel. # -obj-$(CONFIG_ARM_VIC) += vic.o obj-$(CONFIG_ICST) += icst.o obj-$(CONFIG_SA1111) += sa1111.o obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
drivers/irqchip/Kconfig +15 -0
@@ -9,3 +9,18 @@ config ARM_GIC config GIC_NON_BANKED bool + +config ARM_VIC + bool + select IRQ_DOMAIN + select MULTI_IRQ_HANDLER + +config ARM_VIC_NR + int + default 4 if ARCH_S5PV210 + default 3 if ARCH_S5PC100 + default 2 + depends on ARM_VIC + help + The maximum number of VICs available in the system, for + power management.
drivers/irqchip/Makefile +1 -0
@@ -2,3 +2,4 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o obj-$(CONFIG_ARM_GIC) += irq-gic.o +obj-$(CONFIG_ARM_VIC) += irq-vic.o
drivers/irqchip/irq-vic.c renamed from arch/arm/common/vic.c +42 -33
98 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 9/16 irqchip: Move ARM VIC to drivers/irqchip
Hi Thomas,
drivers/irqchip/irq-vic.c void __init __vic_init(void __iomem *base, unsigned int irq_start, · line 427
Quoted 13 lines · Thomas Petazzoni
drivers/irqchip/irq-vic.c renamed from arch/arm/common/vic.c +13
-0+/* +* Keep iterating over all registered VIC's until there are no pending +* interrupts. +*/ +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs) +{ +int i, handled; + +do { +for (i =0 , handled =0 ; i < vic_id; ++i) + handled |=handle_one_vic (&vic_devices[i], regs); + }while (handled); +}
__exception_irq_entry is only defined for ARM, so I think we either need to add a Kconfig dependency on ARM or allow some other way to build on non-ARM platforms.
Jamie
PATCH 10/16 ARM: highbank: use common irqchip_init
In reply to Thomas PetazzoniFrom: Rob Herring <[email protected]>
Now that we have common irqchip init, use it on highbank platform.
[Thomas Petazzoni: remove .handle_irq from DT_MACHINE_STRUCT, as it is set by the the irq-gic driver].
--- arch/arm/mach-highbank/highbank.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)
arch/arm/mach-highbank/highbank.c +2 -7
@@ -18,6 +18,7 @@#include <linux/dma-mapping.h> #include <linux/io.h> #include <linux/irq.h> +#include <linux/irqchip.h> #include <linux/irqdomain.h> #include <linux/of.h> #include <linux/of_irq.h>
@@ -82,11 +83,6 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr) HB_JUMP_TABLE_PHYS(cpu) + 15); } -const static struct of_device_id irq_match[] = { - { .compatible ="arm,cortex-a9-gic" , .data = gic_of_init, }, - {} -}; -#ifdef CONFIG_CACHE_L2X0 static void highbank_l2x0_disable (void ) {
@@ -97,7 +93,7 @@ static void highbank_l2x0_disable(void)static void __init highbank_init_irq (void ) { -of_irq_init (irq_match); +irqchip_init ();#ifdef CONFIG_CACHE_L2X0 /* Enable PL310 L2 Cache controller */
@@ -219,7 +215,6 @@ DT_MACHINE_START(HIGHBANK, "Highbank") .map_io = highbank_map_io, .init_irq = highbank_init_irq, .timer = &highbank_timer, - .handle_irq = gic_handle_irq, .init_machine = highbank_init, .dt_compat = highbank_match, .restart = highbank_restart,
Signature · 1 line
1.7.9.5
PATCH 11/16 ARM: picoxcell: use common irqchip_init
In reply to Thomas PetazzoniNow that we have a common irqchip infrastructure, use it on the picoxcell platform:
* Use irqchip_init() as the ->irq_init() machine function. The irqchip infrastructure already knows about the compatible strings for the VIC IRQ controller driver.
* No longer needed to set ->handle_irq() in the machine structure, as it will be set by the VIC IRQ controller driver.
--- arch/arm/mach-picoxcell/common.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-)
arch/arm/mach-picoxcell/common.c +2 -12
@@ -9,6 +9,7 @@*/ #include <linux/delay.h> #include <linux/irq.h> +#include <linux/irqchip.h> #include <linux/irqdomain.h> #include <linux/of.h> #include <linux/of_address.h>
@@ -70,16 +71,6 @@ static const char *picoxcell_dt_match[] = { NULL }; -static const struct of_device_id vic_of_match[]__initconst = { - { .compatible ="arm,pl192-vic" , .data = vic_of_init, }, - {/* Sentinel */ } -}; - -static void __init picoxcell_init_irq (void ) -{ -of_irq_init (vic_of_match); -} -static void picoxcell_wdt_restart (char mode,const char *cmd) {/*
@@ -97,8 +88,7 @@ static void picoxcell_wdt_restart(char mode, const char *cmd)DT_MACHINE_START (PICOXCELL ,"Picochip picoXcell" ) .map_io = picoxcell_map_io, .nr_irqs = NR_IRQS_LEGACY, - .init_irq = picoxcell_init_irq, - .handle_irq = vic_handle_irq, + .init_irq = irqchip_init, .timer = &dw_apb_timer, .init_machine = picoxcell_init_machine, .dt_compat = picoxcell_dt_match,
Signature · 1 line
1.7.9.5
PATCH 11/16 ARM: picoxcell: use common irqchip_init
Quoted 11 lines · Thomas Petazzoni
Now that we have a common irqchip infrastructure, use it on the picoxcell platform:
* Use
irqchip_init()as the ->irq_init() machine function. The irqchip infrastructure already knows about the compatible strings for the VIC IRQ controller driver.* No longer needed to set ->handle_irq() in the machine structure, as it will be set by the VIC IRQ controller driver.
Signed-off-by Thomas Petazzoni <[email protected]>
Thanks,
Jamie
PATCH 12/16 ARM: spear3xx: use common irqchip_init
In reply to Thomas PetazzoniNow that we have a common irqchip infrastructure, use it on the spear3xx platform:
* Use irqchip_init() as the ->irq_init() machine function. The irqchip infrastructure already knows about the compatible strings for the VIC IRQ controller driver.
* No longer needed to set ->handle_irq() in the machine structure, as it will be set by the VIC IRQ controller driver.
--- arch/arm/mach-spear3xx/include/mach/generic.h | 1 - arch/arm/mach-spear3xx/spear300.c | 5 ++--- arch/arm/mach-spear3xx/spear310.c | 5 ++--- arch/arm/mach-spear3xx/spear320.c | 5 ++--- arch/arm/mach-spear3xx/spear3xx.c | 10 ---------- 5 files changed, 6 insertions(+), 20 deletions(-)
arch/arm/mach-spear3xx/include/mach/generic.h +0 -1
@@ -30,7 +30,6 @@ extern struct pl08x_platform_data pl080_plat_data;void __init spear_setup_of_timer (void );void __init spear3xx_clk_init (void );void __init spear3xx_map_io (void ); -void __init spear3xx_dt_init_irq (void );void spear_restart (char ,const char *);
arch/arm/mach-spear3xx/spear300.c +2 -3
@@ -15,7 +15,7 @@#include <linux/amba/pl08x.h> #include <linux/of_platform.h> -#include <asm/hardware/vic.h> +#include <linux/irqchip.h> #include <asm/mach/arch.h> #include <plat/shirq.h> #include <mach/generic.h>
@@ -315,8 +315,7 @@ static void __init spear300_map_io(void)DT_MACHINE_START (SPEAR300_DT ,"ST SPEAr300 SoC with Flattened Device Tree" ) .map_io = spear300_map_io, - .init_irq = spear3xx_dt_init_irq, - .handle_irq = vic_handle_irq, + .init_irq = irqchip_init, .timer = &spear3xx_timer, .init_machine = spear300_dt_init, .restart = spear_restart,
arch/arm/mach-spear3xx/spear310.c +2 -3
@@ -15,8 +15,8 @@#include <linux/amba/pl08x.h> #include <linux/amba/serial.h> +#include <linux/irqchip.h> #include <linux/of_platform.h> -#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <plat/shirq.h> #include <mach/generic.h>
@@ -456,8 +456,7 @@ static void __init spear310_map_io(void)DT_MACHINE_START (SPEAR310_DT ,"ST SPEAr310 SoC with Flattened Device Tree" ) .map_io = spear310_map_io, - .init_irq = spear3xx_dt_init_irq, - .handle_irq = vic_handle_irq, + .init_irq = irqchip_init, .timer = &spear3xx_timer, .init_machine = spear310_dt_init, .restart = spear_restart,
arch/arm/mach-spear3xx/spear320.c +2 -3
@@ -13,11 +13,11 @@#define pr_fmt (fmt) "SPEAr320: " fmt +#include <linux/irqchip.h> #include <linux/amba/pl022.h> #include <linux/amba/pl08x.h> #include <linux/amba/serial.h> #include <linux/of_platform.h> -#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <plat/shirq.h> #include <mach/generic.h>
@@ -471,8 +471,7 @@ static void __init spear320_map_io(void)DT_MACHINE_START (SPEAR320_DT ,"ST SPEAr320 SoC with Flattened Device Tree" ) .map_io = spear320_map_io, - .init_irq = spear3xx_dt_init_irq, - .handle_irq = vic_handle_irq, + .init_irq = irqchip_init, .timer = &spear3xx_timer, .init_machine = spear320_dt_init, .restart = spear_restart,
arch/arm/mach-spear3xx/spear3xx.c +0 -10
@@ -118,13 +118,3 @@ static void __init spear3xx_timer_init(void)struct sys_timer spear3xx_timer = { .init = spear3xx_timer_init, }; - -static const struct of_device_id vic_of_match[]__initconst = { - { .compatible ="arm,pl190-vic" , .data = vic_of_init, }, - {/* Sentinel */ } -}; - -void __init spear3xx_dt_init_irq (void ) -{ -of_irq_init (vic_of_match); -}
Signature · 1 line
1.7.9.5
PATCH 13/16 ARM: spear6xx: use common irqchip_init
In reply to Thomas PetazzoniNow that we have a common irqchip infrastructure, use it on the spear6xx platform:
* Use irqchip_init() as the ->irq_init() machine function. The irqchip infrastructure already knows about the compatible strings for the VIC IRQ controller driver.
* No longer needed to set ->handle_irq() in the machine structure, as it will be set by the VIC IRQ controller driver.
--- arch/arm/mach-spear6xx/spear6xx.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-)
arch/arm/mach-spear6xx/spear6xx.c +2 -12
@@ -16,6 +16,7 @@#include <linux/amba/pl08x.h> #include <linux/clk.h> #include <linux/err.h> +#include <linux/irqchip.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h>
@@ -425,20 +426,9 @@ static const char *spear600_dt_board_compat[] = {NULL }; -static const struct of_device_id vic_of_match[]__initconst = { - { .compatible ="arm,pl190-vic" , .data = vic_of_init, }, - {/* Sentinel */ } -}; - -static void __init spear6xx_dt_init_irq (void ) -{ -of_irq_init (vic_of_match); -} -DT_MACHINE_START (SPEAR600_DT ,"ST SPEAr600 (Flattened Device Tree)" ) .map_io = spear6xx_map_io, - .init_irq = spear6xx_dt_init_irq, - .handle_irq = vic_handle_irq, + .init_irq = irqchip_init, .timer = &spear6xx_timer, .init_machine = spear600_dt_init, .restart = spear_restart,
Signature · 1 line
1.7.9.5
PATCH 14/16 arm: vic: don't expose vic_of_init() anymore
In reply to Thomas PetazzoniAll users of vic_of_init() have been converted to the irqchip infrastructure, and all future users should go through this new infrastructure. Therefore, we no longer expose the vic_of_init() function through the vic.h header.
--- arch/arm/include/asm/hardware/vic.h | 1 - 1 file changed, 1 deletion(-)
arch/arm/include/asm/hardware/vic.h +0 -1
@@ -50,7 +50,6 @@ struct pt_regs;void __vic_init (void __iomem *base,unsigned int irq_start,u32 vic_sources,u32 resume_sources,struct device_node *node);void vic_init (void __iomem *base,unsigned int irq_start,u32 vic_sources,u32 resume_sources); -int vic_of_init (struct device_node *node,struct device_node *parent);void vic_handle_irq (struct pt_regs *regs);#endif /* __ASSEMBLY__ */
Signature · 1 line
1.7.9.5
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
In reply to Thomas PetazzoniWith all vic_of_init() users converted to the irqchip infrastructure, there is no longer a reason for this function to be exported. Therefore, mark it as static.
--- drivers/irqchip/irq-vic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/irqchip/irq-vic.c +2 -1
@@ -440,7 +440,8 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, }#ifdef CONFIG_OF -int __init vic_of_init (struct device_node *node,struct device_node *parent) +static int __init vic_of_init (struct device_node *node, +struct device_node *parent) {void __iomem *regs;int irq_base;
Signature · 1 line
1.7.9.5
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
Quoted 5 lines · Thomas Petazzoni
With all
vic_of_init()users converted to the irqchip infrastructure, there is no longer a reason for this function to be exported. Therefore, mark it as static.Signed-off-by Thomas Petazzoni <[email protected]>
It may be that I have missed some patches, but are really all VIC users converted in this patch series?
In arch/arm/mach-u300/core.c I have this:
vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
mask[0], mask[0]);
vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
mask[1], mask[1]);arch/arm/mach-nomadik/cpu-8815.c:
/* This modified VIC cell has two register blocks, at 0 and 0x20 */
vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0);
vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0);And there are more still I think? I didn't see those converted so I guess I must have missed some patches or something?
PS please make sure u300_defconfig and nhk8815_defconfig builds, or I will be a sad puppy ...
Yours,
Linus Walleij
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
Dear Linus Walleij,
Quoted 18 lines · Linus Walleij
Quoted 5 lines · Thomas Petazzoni
With all
vic_of_init()users converted to the irqchip infrastructure, there is no longer a reason for this function to be exported. Therefore, mark it as static.Signed-off-by Thomas Petazzoni <[email protected]>It may be that I have missed some patches, but are really all VIC users converted in this patch series?
In
arch/arm/mach-u300/core.cI have this:vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START, mask[0], mask[0]); vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START, mask[1], mask[1]);
Quoted 8 lines
arch/arm/mach-nomadik/cpu-8815.c:/* This modified VIC cell has two register blocks, at 0 and 0x20 */ vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0);And there are more still I think? I didn't see those converted so I guess I must have missed some patches or something?
In this patch series, I'm making vic_of_init() static. vic_init() used by non-DT platforms is kept as is, with no change, so I'm not sure why you're worried about vic_init() being a problem.
Quoted 2 lines
PS please make sure
u300_defconfigandnhk8815_defconfigbuilds, or I will be a sad puppy ...
Indeed. The whole thing needs more testing, for sure. I guess I should have labeled it as RFC, because it's really what it is.
Best regards,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
Quoted 8 lines · Thomas Petazzoni
Quoted 2 lines · Linus Walleij
It may be that I have missed some patches, but are really all VIC users converted in this patch series?
In this patch series, I'm making
vic_of_init()static.vic_init()used by non-DT platforms is kept as is, with no change, so I'm not sure why you're worried aboutvic_init()being a problem.
Probably because I didn't parse the _of_ part :-/
Sorry about the fuzz!
But the idea is to use the same convenient mechanism for the non-DT platforms later, so we get rid of all the incldue headers I guess?
Yours,
Linus Walleij
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
Linus,
Quoted 7 lines · Linus Walleij
Quoted 5 lines · Thomas Petazzoni
Quoted 2 lines · Linus Walleij
It may be that I have missed some patches, but are really all VIC users converted in this patch series?
Quoted 7 lines
Quoted 3 lines
In this patch series, I'm making
vic_of_init()static.vic_init()used by non-DT platforms is kept as is, with no change, so I'm not sure why you're worried aboutvic_init()being a problem.Probably because I didn't parse the _of_ part :-/
Sorry about the fuzz!
No problem :)
Quoted 3 lines
But the idea is to use the same convenient mechanism for the non-DT platforms later, so we get rid of all the incldue headers I guess?
Yes. I personally haven't yet thought of this part of the problem, but I think Rob has a plan, and if not, we can certainly think of one without too much problems.
Best regards,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
Quoted 20 lines · Thomas Petazzoni
Linus,
Quoted 7 lines · Linus Walleij
Quoted 5 lines · Thomas Petazzoni
Quoted 2 lines · Linus Walleij
It may be that I have missed some patches, but are really all VIC users converted in this patch series?
Quoted 7 lines
Quoted 3 lines
In this patch series, I'm making
vic_of_init()static.vic_init()used by non-DT platforms is kept as is, with no change, so I'm not sure why you're worried aboutvic_init()being a problem.Probably because I didn't parse the _of_ part :-/
Sorry about the fuzz!
No problem :)
Quoted 7 lines
Quoted 3 lines
But the idea is to use the same convenient mechanism for the non-DT platforms later, so we get rid of all the incldue headers I guess?
Yes. I personally haven't yet thought of this part of the problem, but I think Rob has a plan, and if not, we can certainly think of one without too much problems.
While we can trim down the headers, I don't think we will get rid of them in all cases. My only plan was everything gets converted to DT. Then we can remove gic_init, gic_cascade_irq, and vic_init.
Rob
PATCH 15/16 irqchip: vic: mark vic_of_init() as static
Rob,
Quoted 7 lines · Rob Herring
Quoted 3 lines
Yes. I personally haven't yet thought of this part of the problem, but I think Rob has a plan, and if not, we can certainly think of one without too much problems.
While we can trim down the headers, I don't think we will get rid of them in all cases. My only plan was everything gets converted to DT. Then we can remove
gic_init,gic_cascade_irq, andvic_init.
Sounds like a good plan :-)
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH 16/16 ARM: plat-versatile: move FPGA irq driver to drivers/irqchip
In reply to Thomas PetazzoniFrom: Linus Walleij <[email protected]>
This moves the Versatile FPGA interrupt controller driver, used in the Integrator/AP, Integrator/CP and some Versatile boards, out of arch/arm/plat-versatile and down to drivers/irqchip where we have consensus that such drivers belong. The header file is consequently moved to <linux/platform_data/irq-versatile-fpga.h>.
--- arch/arm/Kconfig | 4 +- arch/arm/mach-integrator/integrator_ap.c | 12 +--- arch/arm/mach-integrator/integrator_cp.c | 11 +--- arch/arm/mach-versatile/core.c | 2 +- arch/arm/plat-versatile/Kconfig | 9 --- arch/arm/plat-versatile/Makefile | 1 - drivers/irqchip/Kconfig | 9 +++ drivers/irqchip/Makefile | 1 + .../irqchip/irq-versatile-fpga.c | 60 ++++++++++---------- .../linux/irqchip/versatile-fpga.h | 2 - 10 files changed, 49 insertions(+), 62 deletions(-) rename arch/arm/plat-versatile/fpga-irq.c => drivers/irqchip/irq-versatile-fpga.c (83%) rename arch/arm/plat-versatile/include/plat/fpga-irq.h => include/linux/irqchip/versatile-fpga.h (73%)
arch/arm/Kconfig +2 -2
@@ -284,8 +284,8 @@ config ARCH_INTEGRATOR select MULTI_IRQ_HANDLER select NEED_MACH_MEMORY_H select PLAT_VERSATILE - select PLAT_VERSATILE_FPGA_IRQ select SPARSE_IRQ + select VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform.
@@ -318,7 +318,7 @@ config ARCH_VERSATILE select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_CLOCK - select PLAT_VERSATILE_FPGA_IRQ + select VERSATILE_FPGA_IRQ help This enables support for ARM Ltd Versatile board.
arch/arm/mach-integrator/integrator_ap.c +3 -9
@@ -20,6 +20,7 @@#include <linux/types.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/irqchip.h> #include <linux/list.h> #include <linux/platform_device.h> #include <linux/slab.h>
@@ -31,6 +32,7 @@#include <linux/clockchips.h> #include <linux/interrupt.h> #include <linux/io.h> +#include <linux/irqchip/versatile-fpga.h> #include <linux/mtd/physmap.h> #include <linux/clk.h> #include <linux/platform_data/clk-integrator.h>
@@ -56,8 +58,6 @@#include <asm/mach/pci.h> #include <asm/mach/time.h> -#include <plat/fpga-irq.h> -#include "common.h" /*
@@ -432,16 +432,11 @@ static struct sys_timer ap_of_timer = { .init = ap_init_timer_of, }; -static const struct of_device_id fpga_irq_of_match[]__initconst = { - { .compatible ="arm,versatile-fpga-irq" , .data = fpga_irq_of_init, }, - {/* Sentinel */ } -}; -static void __init ap_init_irq_of (void ) {/* disable core module IRQs */ writel (0xffffffffU ,VA_CMIC_BASE +IRQ_ENABLE_CLEAR ); -of_irq_init (fpga_irq_of_match); +irqchip_init ();integrator_clk_init (false); }
@@ -502,7 +497,6 @@ DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)") .nr_irqs = NR_IRQS_INTEGRATOR_AP, .init_early = ap_init_early, .init_irq = ap_init_irq_of, - .handle_irq = fpga_handle_irq, .timer = &ap_of_timer, .init_machine = ap_init_of, .restart = integrator_restart,
arch/arm/mach-integrator/integrator_cp.c +3 -8
@@ -10,6 +10,7 @@#include <linux/types.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/irqchip.h> #include <linux/list.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h>
@@ -20,6 +21,7 @@#include <linux/amba/clcd.h> #include <linux/amba/mmci.h> #include <linux/io.h> +#include <linux/irqchip/versatile-fpga.h> #include <linux/gfp.h> #include <linux/mtd/physmap.h> #include <linux/platform_data/clk-integrator.h>
@@ -46,7 +48,6 @@#include <asm/hardware/timer-sp.h> #include <plat/clcd.h> -#include <plat/fpga-irq.h> #include <plat/sched_clock.h> #include "common.h"
@@ -299,14 +300,9 @@ static struct sys_timer cp_of_timer = { .init = intcp_timer_init_of, }; -static const struct of_device_id fpga_irq_of_match[]__initconst = { - { .compatible ="arm,versatile-fpga-irq" , .data = fpga_irq_of_init, }, - {/* Sentinel */ } -}; -static void __init intcp_init_irq_of (void ) { -of_irq_init (fpga_irq_of_match); +irqchip_init ();integrator_clk_init (true); }
@@ -353,7 +349,6 @@ DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)") .nr_irqs = NR_IRQS_INTEGRATOR_CP, .init_early = intcp_init_early, .init_irq = intcp_init_irq_of, - .handle_irq = fpga_handle_irq, .timer = &cp_of_timer, .init_machine = intcp_init_of, .restart = integrator_restart,
arch/arm/mach-versatile/core.c +1 -1
@@ -32,6 +32,7 @@#include <linux/amba/mmci.h> #include <linux/amba/pl022.h> #include <linux/io.h> +#include <linux/irqchip/versatile-fpga.h> #include <linux/gfp.h> #include <linux/clkdev.h> #include <linux/mtd/physmap.h>
@@ -51,7 +52,6 @@#include <asm/hardware/timer-sp.h> #include <plat/clcd.h> -#include <plat/fpga-irq.h> #include <plat/sched_clock.h> #include "core.h"
arch/arm/plat-versatile/Kconfig +0 -9
@@ -6,15 +6,6 @@ config PLAT_VERSATILE_CLOCK config PLAT_VERSATILE_CLCD bool -config PLAT_VERSATILE_FPGA_IRQ - bool - select IRQ_DOMAIN - -config PLAT_VERSATILE_FPGA_IRQ_NR - int - default 4 - depends on PLAT_VERSATILE_FPGA_IRQ - config PLAT_VERSATILE_LEDS def_bool y if NEW_LEDS depends on ARCH_REALVIEW || ARCH_VERSATILE
arch/arm/plat-versatile/Makefile +0 -1
@@ -2,7 +2,6 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include obj-$(CONFIG_PLAT_VERSATILE_CLOCK) += clock.o obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o -obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o obj-$(CONFIG_SMP) += headsmp.o platsmp.o
drivers/irqchip/Kconfig +9 -0
@@ -24,3 +24,12 @@ config ARM_VIC_NR help The maximum number of VICs available in the system, for power management. + +config VERSATILE_FPGA_IRQ + bool + select IRQ_DOMAIN + +config VERSATILE_FPGA_IRQ_NR + int + default 4 + depends on VERSATILE_FPGA_IRQ
drivers/irqchip/Makefile +1 -0
@@ -3,3 +3,4 @@ obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o obj-$(CONFIG_ARM_GIC) += irq-gic.o obj-$(CONFIG_ARM_VIC) += irq-vic.o +obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
drivers/irqchip/irq-versatile-fpga.c renamed from arch/arm/plat-versatile/fpga-irq.c +30 -30
125 lines not on this page · raw message
include/linux/irqchip/versatile-fpga.h renamed from arch/arm/plat-versatile/include/plat/fpga-irq.h +0 -2
@@ -7,7 +7,5 @@ struct pt_regs;void fpga_handle_irq (struct pt_regs *regs);void fpga_irq_init (void __iomem *,const char *,int ,int ,u32 ,struct device_node *node); -int fpga_irq_of_init (struct device_node *node, -struct device_node *parent);#endif
Signature · 1 line
1.7.9.5
PATCH 16/16 ARM: plat-versatile: move FPGA irq driver to drivers/irqchip
Quoted 9 lines · Thomas Petazzoni
From: Linus Walleij <[email protected]>
This moves the Versatile FPGA interrupt controller driver, used in the Integrator/AP, Integrator/CP and some Versatile boards, out of
arch/arm/plat-versatileand down todrivers/irqchipwhere we have consensus that such drivers belong. The header file is consequently moved to <linux/platform_data/irq-versatile-fpga.h>.Signed-off-by Linus Walleij <[email protected]>
It appears you have modified my commit so this is not the whole story right?
This doesn't look like I wrote it:
+IRQCHIP_DECLARE(versatile_fpga_irq, "arm,versatile-fpga-irq",
+ fpga_irq_of_init);
+
Is it possible to do your changes on top of my commit instead?
Atleast add your Signed-off-by please...
Yours,
Linus Walleij
PATCH 16/16 ARM: plat-versatile: move FPGA irq driver to drivers/irqchip
Linus,
Quoted 12 lines · Linus Walleij
Quoted 7 lines
This moves the Versatile FPGA interrupt controller driver, used in the Integrator/AP, Integrator/CP and some Versatile boards, out of
arch/arm/plat-versatileand down todrivers/irqchipwhere we have consensus that such drivers belong. The header file is consequently moved to <linux/platform_data/irq-versatile-fpga.h>.Signed-off-by Linus Walleij <[email protected]>It appears you have modified my commit so this is not the whole story right?
This doesn't look like I wrote it:
drivers/irqchip/irq-versatile-fpga.c int __init fpga_irq_of_init(struct device_node *node, · line 209
Quoted 3 lines
drivers/irqchip/irq-versatile-fpga.c renamed from arch/arm/plat-versatile/fpga-irq.c +3
-0+IRQCHIP_DECLARE (versatile_fpga_irq,"arm,versatile-fpga-irq" , + fpga_irq_of_init); +
Right, sorry. As I said earlier, this v4 is not intended for merging, but only to show the current state, and define together what remains to be fixed/changed.
Quoted 2 lines
Is it possible to do your changes on top of my commit instead?
Not if we want to keep bisectability.
Quoted 1 line
Atleast add your Signed-off-by please...
Will do, thanks for the notice.
Best regards,
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH v4 1/1 Introduce irqchip infrastructure
In reply to Thomas PetazzoniQuoted 14 lines · Thomas Petazzoni
Hello,
Here is a set of patches that introduces a small irqchip infrastructure that allows the registration of irqchip drivers without having each of those drivers to expose a public API and header in
include/linux/irqchip/, and moves a number of existing irqchip controller to this infrastructure.This new version (detailed changelog below) provides a number of
improvements: usage of a special link section to avoid the central registration in irqchip.{c,h} of all irqchip drivers, and addition of the GIC, VIC and Versatile FPGA IRQ drivers move, thanks to Rob Herring and Linus Walleij.
Quoted 7 lines
Remaining issues to solve:
* Russell would like
arch/arm/include/asm/hardware/vic.handarch/arm/include/asm/hardware/gic.hto move elsewhere, since the corresponding code is no longer inarch/arm/. I can move them in <linux/irqchip>, but that will cause a fairly large change as there are a big number of users of those headers inarch/arm.
We need to do this. KVM will need the header as well, so we can't move the register definitions out either.
Quoted 4 lines
* The
arch/arm/include/asm/hardware/vic.hhas a few offset macros that should move into the .c file of the irqchip driver, but some of those offsets are bizarrely used in some other pieces of code inarch/arm/.
Not really a good solution that I can see there. We could punt on doing the VIC for now.
Quoted 5 lines
* How to get rid entirely of the headers in <linux/irqchip/>. The remaining problematic functions are <foo>_handle_irq() and <foo>_irq_init() that are used by non-DT platforms. And the special case of
gic_cascade_irq().
I have patches for removing vic/gic_handle_irq. It is going to take a while for the others, so I don't think we should wait for that. KVM needs the GIC header anyway.
Quoted 4 lines
* Move all the users of
gic_of_init()to the irqchip mechanism (Exynos, i.MX 6, MSM, OMAP, SH Mobile, socfpga, spear13xx, tegra, ux500, vexpress) so thatgic_of_init()no longer has to be exported.
I have a patch doing this. I will try to get this sent out today. I've split this into clean-up and then the move, so the clean-up could go in for 3.8. It is only dependent on patch 2.
Quoted 4 lines
Of course, I don't expect any of this to go in 3.8, it is 3.9 material if we manage to reach a consensus on the remaining issues to solve (and the other issues that will certainly show up or be raised by other people).
I still would like to try to get this in for 3.8. If not the move, some of the clean-up.
Rob
Quoted 59 lines
This series has been built and boot tested for BCM2835 and Armada XP. It has been built tested on Versatile with OF and without OF, spear3xx, spear6xx and a
multi_v6_v7configuration with all possible architectures enabled (therefore including picoxcell).Changes since v3:
* Switch to a link-trick based registration of the irqchip drivers, using the
IRQCHIP_DECLARE()macro.* Integrate Rob Herring's patches to move the GIC and VIC irq controller drivers in
drivers/irqchip/.* Migrate picoxcell, spear3xx and spear6xx to using the irqchip platform, so that no direct user of
vic_of_init()remains.* Don't export
vic_of_init()anymore: all users go throughirqchip_init()now.* Integrate Linus Walleij patch that moves the Versatile FPGA irq controller driver to
drivers/irqchip.* A
set_handle_irq()ARM function was added to properly set thehandle_arch_irqpointer to the right handler of the parent IRQ controller.Changes since v2:
* Fixed the entry in the
MAINTAINERSfile. Noticed by Rob Herring.* Simplified the
Kconfiglogic by making the IRQCHIP option enabled by default as soon asOF_IRQis enabled. The individual ARCH_<foo>Kconfigoptions no longer have to select IRQCHIP. Also, the option was renamed fromUSE_IRQCHIPto just IRQCHIP. Suggested by Rob Herring.* Added Reviewed-by tags given by Rob Herring.
Changes since v1:
* Add a new patch mentionning the
drivers/irqchipin the list of directories part of the IRQ subsystem maintained by Thomas Gleixner in theMAINTAINERSfile. Requested by Arnd Bergmann.* Reduce the amount of code movement in the
irq-bcm2835.candirq-armada-370-xp.cfiles by using one forward declaration for the IRQ handling entry point. Requested by Stephen Warren.* Rename the
armctrl_of_init()function tobcm2835_irqchip_init()as requested by Stephen Warren.* Added the formal Acked-by and Reviewed-by received from Stephen Warren.
Thanks,
Thomas
PATCH v4 1/1 Introduce irqchip infrastructure
Rob,
Quoted 10 lines · Rob Herring
Quoted 7 lines
Remaining issues to solve:
* Russell would like
arch/arm/include/asm/hardware/vic.handarch/arm/include/asm/hardware/gic.hto move elsewhere, since the corresponding code is no longer inarch/arm/. I can move them in <linux/irqchip>, but that will cause a fairly large change as there are a big number of users of those headers inarch/arm.We need to do this. KVM will need the header as well, so we can't move the register definitions out either.
Which register definitions are you talking about? The one from vic.h ?
Quoted 7 lines
Quoted 4 lines
* The
arch/arm/include/asm/hardware/vic.hhas a few offset macros that should move into the .c file of the irqchip driver, but some of those offsets are bizarrely used in some other pieces of code inarch/arm/.Not really a good solution that I can see there. We could punt on doing the VIC for now.
Well, most of the VIC macro users are strange. Most of them probably need their own macro definition instead of shamelessly borrowing the VIC definitions.
Quoted 8 lines
Quoted 4 lines
* How to get rid entirely of the headers in <linux/irqchip/>. The remaining problematic functions are <foo>_handle_irq() and <foo>_irq_init() that are used by non-DT platforms. And the special case of
gic_cascade_irq().I have patches for removing vic/gic_handle_irq. It is going to take a while for the others, so I don't think we should wait for that. KVM needs the GIC header anyway.
What is your approach to remove vic/gic_handle_irq? I'll see in your patches I guess.
That said, I think that having <linux/irqchip/gic.h> and <linux/irqchip/vic.h> for now is not a big problem. What we want to avoid is to have gazillions of headers here, but as new platforms are DT-capable, those platforms shouldn't need to add a header in <linux/irqchip/>, so I think we could live with <linux/irqchip/{gic,vic}.h> for a while, and progressively clean up/improve what needs to be done. Doing the perfect migration as an unique step is going to be difficult.
Quoted 8 lines
Quoted 4 lines
* Move all the users of
gic_of_init()to the irqchip mechanism (Exynos, i.MX 6, MSM, OMAP, SH Mobile, socfpga, spear13xx, tegra, ux500, vexpress) so thatgic_of_init()no longer has to be exported.I have a patch doing this. I will try to get this sent out today. I've split this into clean-up and then the move, so the clean-up could go in for 3.8. It is only dependent on patch 2.
Ok.
Quoted 7 lines
Quoted 4 lines
Of course, I don't expect any of this to go in 3.8, it is 3.9 material if we manage to reach a consensus on the remaining issues to solve (and the other issues that will certainly show up or be raised by other people).
I still would like to try to get this in for 3.8. If not the move, some of the clean-up.
So the cleanup series for 3.8 would contain:
[PATCH 02/16], needed for the clean up you will send later today [PATCH 06/16]
[PATCH 07/16]
I think all the other ones are directly related to the introduction of the irqchip infrastructure, so they most likely cannot be part of 3.8.
So, I can prepare a pull request with 2, 6, 7 and your upcoming clean up patch, if you want.
Thomas
Signature · 4 lines
Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH v4 1/1 Introduce irqchip infrastructure
Quoted 41 lines · Thomas Petazzoni
Rob,
Quoted 10 lines · Rob Herring
Quoted 7 lines
Remaining issues to solve:
* Russell would like
arch/arm/include/asm/hardware/vic.handarch/arm/include/asm/hardware/gic.hto move elsewhere, since the corresponding code is no longer inarch/arm/. I can move them in <linux/irqchip>, but that will cause a fairly large change as there are a big number of users of those headers inarch/arm.We need to do this. KVM will need the header as well, so we can't move the register definitions out either.
Which register definitions are you talking about? The one from
vic.h?Quoted 7 lines
Quoted 4 lines
* The
arch/arm/include/asm/hardware/vic.hhas a few offset macros that should move into the .c file of the irqchip driver, but some of those offsets are bizarrely used in some other pieces of code inarch/arm/.Not really a good solution that I can see there. We could punt on doing the VIC for now.
Well, most of the VIC macro users are strange. Most of them probably need their own macro definition instead of shamelessly borrowing the VIC definitions.
Quoted 8 lines
Quoted 4 lines
* How to get rid entirely of the headers in <linux/irqchip/>. The remaining problematic functions are <foo>_handle_irq() and <foo>_irq_init() that are used by non-DT platforms. And the special case of
gic_cascade_irq().I have patches for removing vic/gic_handle_irq. It is going to take a while for the others, so I don't think we should wait for that. KVM needs the GIC header anyway.
What is your approach to remove vic/gic_handle_irq? I'll see in your patches I guess.
Quoted 17 lines
That said, I think that having <
linux/irqchip/gic.h> and <linux/irqchip/vic.h> for now is not a big problem. What we want to avoid is to have gazillions of headers here, but as new platforms are DT-capable, those platforms shouldn't need to add a header in <linux/irqchip/>, so I think we could live with <linux/irqchip/{gic,vic}.h> for a while, and progressively clean up/improve what needs to be done. Doing the perfect migration as an unique step is going to be difficult.Quoted 8 lines
Quoted 4 lines
* Move all the users of
gic_of_init()to the irqchip mechanism (Exynos, i.MX 6, MSM, OMAP, SH Mobile, socfpga, spear13xx, tegra, ux500, vexpress) so thatgic_of_init()no longer has to be exported.I have a patch doing this. I will try to get this sent out today. I've split this into clean-up and then the move, so the clean-up could go in for 3.8. It is only dependent on patch 2.
I've pushed out patches that moves gic.h and converts all GIC DT platforms over to irqchip_init:
git://sources.calxeda.com/kernel/linux.git gic-irqchip
I haven't gotten to rebasing the VIC ones yet.
One issue I found is it would be easier to move things if IRQCHIP_DECLARE was accessible in arch/arm. Then I can convert all the init over to irqchip_init first and then move gic.c and gic.h together in one patch.
Rob
PATCH v4 1/1 Introduce irqchip infrastructure
In reply to Thomas PetazzoniQuoted 8 lines · Thomas Petazzoni
Hello,
Here is a set of patches that introduces a small irqchip infrastructure that allows the registration of irqchip drivers without having each of those drivers to expose a public API and header in
include/linux/irqchip/, and moves a number of existing irqchip controller to this infrastructure.
Quoted 5 lines
This new version (detailed changelog below) provides a number of
improvements: usage of a special link section to avoid the central registration in irqchip.{c,h} of all irqchip drivers, and addition of the GIC, VIC and Versatile FPGA IRQ drivers move, thanks to Rob Herring and Linus Walleij.
Hey Thomas,
This looks pretty darn sensible. Good job.
I've not reviewed deeply, but you can add my:
g.