S3C24XX: Add support to MINI2416 board

Support for the MINI2416 board based on a Samsung's S3C2416 SoC with 64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.

Changes for v2:
- Coding style cleanup
- Removed new serial and rtc drivers
- Use of in-tree serial and rtc drivers

Changes for v3:
- Rebased on new SPL framework:
http://github.com/trini/u-boot WIP/spl-improvements
- Removed patch "ARM: fix relocation on ARM926EJS"
- Add patch to configure printf() inclusion on SPL
- Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin
- Removed magic numbers
- Checkpatch clean except:
- False positive:
ERROR: spaces required around that ':' (ctx:VxV) #692: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDR FE:11:22:33:44:55
- Following preexistent coding style:
WARNING: please, no spaces at the start of a line #1716: FILE: include/common.h:631:
+ defined(CONFIG_S3C24XX) || \$

Changes for v4:
- NAND Flash driver cleanup and optimization

Changes for v5:
- Changed image filename for SPL + u-boot
- Minor change in the NAND Flash driver
- Coding style cleanup
- Removal of #define CONFIG_SYS_BAUDRATE_TABLE as this in the defaults now
- Checkpatch clean with the exceptions indicated in the v3 changes

Jos? Miguel Gon?alves (11):
Add configuration option to select printf() inclusion on SPL
S3C24XX: Add core support for Samsung's S3C24XX SoCs
serial: Add support to 4 ports in serial_s3c24x0
serial: Use a more precise baud rate generation for serial_s3c24x0
serial: Remove unnecessary delay in serial_s3c24x0
rtc: Improve rtc_get() on s3c24x0_rtc
rtc: Fix rtc_reset() on s3c24x0_rtc
rtc: Don't allow setting unsuported years on s3c24x0_rtc
S3C24XX: Add NAND Flash driver
Add u-boot-with-spl.bin target to the Makefile
S3C24XX: Add support to MINI2416 board

 MAINTAINERS                                     |    4 +
 Makefile                                        |   11 +-
 README                                          |    3 +
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile         |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c            |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c       |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +++++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +++++
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c          |  152 ++++++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h     |  130 +++++
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h     |  183 +++++++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h     |  615 +++++++++++++++++++++++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 arch/arm/include/asm/arch-s3c24xx/spl.h         |   29 ++
 board/boardcon/mini2416/Makefile                |   47 ++
 board/boardcon/mini2416/config.mk               |    4 +
 board/boardcon/mini2416/mini2416.c              |  104 ++++
 board/boardcon/mini2416/mini2416_spl.c          |  202 ++++++++
 board/boardcon/mini2416/u-boot-spl.lds          |   63 +++
 boards.cfg                                      |    1 +
 drivers/mtd/nand/Makefile                       |    1 +
 drivers/mtd/nand/s3c24xx_nand.c                 |  255 ++++++++++
 drivers/rtc/s3c24x0_rtc.c                       |   30 +-
 drivers/serial/serial_s3c24x0.c                 |   52 +-
 include/common.h                                |   12 +
 include/configs/VCMA9.h                         |    2 +-
 include/configs/mini2416.h                      |  202 ++++++++
 include/configs/smdk2410.h                      |    2 +-
 spl/Makefile                                    |    4 +-
 30 files changed, 2550 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c
 create mode 100644 include/configs/mini2416.h

1.7.9.5

The printf() implementation needs 4~5KB of storage space which may not be available when building an SPL for SoCs with scarce internal RAM (8KB or less). This patch adds a new option, CONFIG_SPL_PRINTF_SUPPORT, to deal with this.

---
Changes for v3:
- New patch

Changes for v4:
- None

Changes for v5:
- None

---
 README           |    3 +++
 include/common.h |   11 +++++++++++
 2 files changed, 14 insertions(+)

index 016d8bc..988812c 100644
@@ -2576,6 +2576,9 @@ FIT uImage format:
 		CONFIG_SPL_LIBCOMMON_SUPPORT
 		Support for common/libcommon.o in SPL binary
 
+		CONFIG_SPL_PRINTF_SUPPORT
+		Enable printf() support in common/libcommon.o
+
 		CONFIG_SPL_LIBDISK_SUPPORT
 		Support for disk/libdisk.o in SPL binary
 

index 55025c0..c10d745 100644
@@ -805,9 +805,20 @@ int	tstc(void);
 /* stdout */
 void	putc(const char c);
 void	puts(const char *s);
+/*
+ * The printf() implementation needs 4~5KB of storage space which may not be
+ * available when building an SPL for SoCs with scarce internal RAM
+ * (8KB or less). To force printf() inclusion on an SPL we must define
+ * CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_PRINTF_SUPPORT.
+ */
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_PRINTF_SUPPORT)
 int	printf(const char *fmt, ...)
 		__attribute__ ((format (__printf__, 1, 2)));
 int	vprintf(const char *fmt, va_list args);
+#else
+#define printf(fmt...) do {} while (0)
+#define vprintf(fmt, args) do {} while (0)
+#endif
 
 /* stderr */
 #define eputc(c)		fputc(stderr, c)

1.7.9.5

This patch adds the support for Samsung's S3C24XX SoCs that have an ARM926EJS core. Currently it supports S3C2412, S3C2413, S3C2416 and S3C2450.
Tested on an S3C2416 platform.

---
Changes for v2:
- Added register bit macros to avoid magic numbers
- Removed volatile attribute from register structs
- Added s3c24x0_cpu.h to be able to use drivers from s3c24x0 family
- Fixed EPLL computation in get_PLLCLK for S3C2416
- Added display of UCLK in print_cpu_info
- Use of clrsetbits_le32()

Changes for v3:
- Add __noreturn attribute to reset_cpu()
- Removed magic numbers
- Add arch/arm/include/asm/arch-s3c24xx/spl.h for new SPL framework

Changes for v4:
- None

Changes for v5:
- None

---
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile         |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c            |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c       |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +++++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +++++
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c          |  152 ++++++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h     |  130 +++++
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h     |  183 +++++++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h     |  615 +++++++++++++++++++++++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 arch/arm/include/asm/arch-s3c24xx/spl.h         |   29 ++
 include/common.h                                |    1 +
 13 files changed, 1581 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h

new file mode 100644
index 0000000..d7f5e0d
@@ -0,0 +1,56 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(SOC).o
+
+ifndef CONFIG_SPL_BUILD
+COBJS-$(CONFIG_DISPLAY_CPUINFO)	+= cpu_info.o
+endif
+
+ifeq ($(filter y,$(CONFIG_S3C2412) $(CONFIG_S3C2413)),y)
+COBJS-y	+= s3c2412_speed.o
+else
+COBJS-y	+= s3c2416_speed.o
+endif
+
+COBJS-y	+= cpu.o
+COBJS-y	+= timer.o
+
+SRCS	:= $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+
+all:	$(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..59ccfd4
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#if defined(CONFIG_S3C2412) || defined(CONFIG_S3C2413)
+#include <asm/arch/s3c2412.h>
+#elif defined(CONFIG_S3C2416) || defined(CONFIG_S3C2450)
+#include <asm/arch/s3c2416.h>
+#else
+#error Please define the S3C24XX SoC type
+#endif

new file mode 100644
index 0000000..2741fe7
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef	_ASM_ARCH_SPL_H_
+#define	_ASM_SPL_H_
+
+#define BOOT_DEVICE_NAND	1
+#define BOOT_DEVICE_MMC1	2
+
+#endif

index c10d745..b63e814 100644
@@ -628,6 +628,7 @@ ulong	get_OPB_freq (void);
 ulong	get_PCI_freq (void);
 #endif
 #if defined(CONFIG_S3C24X0) || \
+    defined(CONFIG_S3C24XX) || \
     defined(CONFIG_LH7A40X) || \
     defined(CONFIG_S3C6400) || \
     defined(CONFIG_EP93XX)

1.7.9.5

S3C2416 and S3C2450 have 4 UARTs insted of 3 found on older chips. This patch adds support to the additional UART port and changes the mapping between CONFIG_SERIAL? and S3C24X0_UART? in order they have a direct correspondence.

---
Changes for v2:
- New patch

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None

---
 drivers/serial/serial_s3c24x0.c |   25 ++++++++++++++++++-------
 include/configs/VCMA9.h         |    2 +-
 include/configs/smdk2410.h      |    2 +-
 3 files changed, 20 insertions(+), 9 deletions(-)

index 12bcdd3..280cd2d 100644
@@ -2,6 +2,9 @@
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, <[email protected]>
  *
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves <[email protected]>
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or

@@ -24,17 +27,20 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SERIAL1
+#if defined(CONFIG_SERIAL0)
 #define UART_NR	S3C24X0_UART0
 
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
 #define UART_NR	S3C24X0_UART1
 
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
 #define UART_NR	S3C24X0_UART2
 
+#elif defined(CONFIG_SERIAL3)
+#define UART_NR	S3C24X0_UART3
+
 #else
-#error "Bad: you didn't configure serial ..."
+#error "You didn't configure serial."
 #endif
 
 #include <asm/io.h>

@@ -310,15 +316,20 @@ INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1");
 DECLARE_S3C_SERIAL_FUNCTIONS(2);
 struct serial_device s3c24xx_serial2_device =
 INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2");
+DECLARE_S3C_SERIAL_FUNCTIONS(3);
+struct serial_device s3c24xx_serial3_device =
+INIT_S3C_SERIAL_STRUCTURE(3, "s3ser3");
 
 __weak struct serial_device *default_serial_console(void)
 {
-#if defined(CONFIG_SERIAL1)
+#if defined(CONFIG_SERIAL0)
 	return &s3c24xx_serial0_device;
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
 	return &s3c24xx_serial1_device;
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
 	return &s3c24xx_serial2_device;
+#elif defined(CONFIG_SERIAL3)
+	return &s3c24xx_serial3_device;
 #else
 #error "CONFIG_SERIAL? missing."
 #endif

index 6ad4a6b..82db58f 100644
@@ -122,7 +122,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on VCMA9 */
+#define CONFIG_SERIAL0		1	/* we use SERIAL 0 on VCMA9 */
 
 /* USB support (currently only works with D-cache off) */
 #define CONFIG_USB_OHCI

index 8792c85..ea05f16 100644
@@ -62,7 +62,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL0		1	/* we use SERIAL 0 on SMDK2410 */
 
 /************************************************************
  * USB support (currently only works with D-cache off)

1.7.9.5

The values stored in the baud rate divisor register (UBRDIVn) and dividing slot register (UDIVSLOTn), are used to determine the serial baudrate. Previously only UBRDIVn was set. This patch initializes also UDIVSLOTn which allows to obtain a more precise baudrate.

---
Changes for v2:
- New patch

Changes for v3:
- Verbose patch description

Changes for v4:
- None

Changes for v5:
- None

---
 drivers/serial/serial_s3c24x0.c |   24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

index 280cd2d..c9bc121 100644
@@ -92,16 +92,32 @@ DECLARE_GLOBAL_DATA_PTR;
 static int hwflow;
 #endif
 
+/*
+ * The values stored in the baud rate divisor register (UBRDIVn) and dividing
+ * slot register (UDIVSLOTn), are used to determine the serial Tx/Rx clock rate
+ * (baud rate) as follows:
+ *     DIV_VAL = UBRDIVn + (num of 1?s in UDIVSLOTn) / 16
+ * Using UDIVSLOT, which is the factor of floating point divisor, you can make
+ * more accurate baud rate. Section 2.1.10 of the S3C2416 User's Manual suggests
+ * using the constants on the following table.
+ */
+static const int udivslot[] = {
+	0x0000, 0x0080, 0x0808, 0x0888, 0x2222, 0x4924, 0x4A52, 0x54AA,
+	0x5555, 0xD555, 0xD5D5, 0xDDD5, 0xDDDD, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
 void _serial_setbrg(const int dev_index)
 {
 	struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-	unsigned int reg = 0;
+	u32 pclk;
+	u32 baudrate;
 	int i;
 
-	/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-	reg = get_PCLK() / (16 * gd->baudrate) - 1;
+	pclk = get_PCLK();
+	baudrate = gd->baudrate;
 
-	writel(reg, &uart->ubrdiv);
+	writel((pclk / baudrate / 16) - 1, &uart->ubrdiv);
+	writel(udivslot[(pclk / baudrate) % 16], &uart->udivslot);
 	for (i = 0; i < 100; i++)
 		/* Delay */ ;
 }

1.7.9.5

The loop used to make a delay after baudrate setting is not necessary. Moreover it is removed by the GCC optimizer (at least with GCC 4.6).

---
Changes for v2:
- New patch

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None

---
 drivers/serial/serial_s3c24x0.c |    3 ---
 1 file changed, 3 deletions(-)

index c9bc121..ec5d1cb 100644
@@ -111,15 +111,12 @@ void _serial_setbrg(const int dev_index)
 	struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
 	u32 pclk;
 	u32 baudrate;
-	int i;
 
 	pclk = get_PCLK();
 	baudrate = gd->baudrate;
 
 	writel((pclk / baudrate / 16) - 1, &uart->ubrdiv);
 	writel(udivslot[(pclk / baudrate) % 16], &uart->udivslot);
-	for (i = 0; i < 100; i++)
-		/* Delay */ ;
 }
 
 #if defined(CONFIG_SERIAL_MULTI)

1.7.9.5

A better approach to avoid reading the RTC during updates, as sugested in the S3C2416 User's Manual.

---
Changes for v2:
- New patch

Changes for v3:
- Removed unneeded parenthesis

Changes for v4:
- None

Changes for v5:
- None

---
 drivers/rtc/s3c24x0_rtc.c |   10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

index c16ff2e..b31dc53 100644
@@ -65,20 +65,26 @@ int rtc_get(struct rtc_time *tmp)
 	uchar sec, min, hour, mday, wday, mon, year;
 	__maybe_unused uchar a_sec, a_min, a_hour, a_date,
 			     a_mon, a_year, a_armed;
+	int have_retried = 0;
 
 	/* enable access to RTC registers */
 	SetRTC_Access(RTC_ENABLE);
 
 	/* read RTC registers */
 	do {
-		sec  = readb(&rtc->bcdsec);
 		min  = readb(&rtc->bcdmin);
 		hour = readb(&rtc->bcdhour);
 		mday = readb(&rtc->bcddate);
 		wday = readb(&rtc->bcdday);
 		mon  = readb(&rtc->bcdmon);
 		year = readb(&rtc->bcdyear);
-	} while (sec != readb(&rtc->bcdsec));
+		sec  = readb(&rtc->bcdsec);
+		/*
+		 * The only way to work out whether the RTC was mid-update
+		 * when we read it is to check the seconds counter.
+		 * If it's zero, then we re-try the entire read.
+		 */
+	} while (sec == 0 && !have_retried++);
 
 	/* read ALARM registers */
 	a_sec   = readb(&rtc->almsec);

1.7.9.5

rtc_reset() must set the RTC date to the UNIX Epoch.

---
Changes for v2:
- New patch

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None

---
 drivers/rtc/s3c24x0_rtc.c |   15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

index b31dc53..3fd5cec 100644
@@ -167,10 +167,17 @@ int rtc_set(struct rtc_time *tmp)
 
 void rtc_reset(void)
 {
-	struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
-
-	writeb((readb(&rtc->rtccon) & ~0x06) | 0x08, &rtc->rtccon);
-	writeb(readb(&rtc->rtccon) & ~(0x08 | 0x01), &rtc->rtccon);
+	static struct rtc_time tmp = {
+		.tm_year = 1970,
+		.tm_mon = 1,
+		.tm_mday = 1,
+		.tm_wday = 4,
+		.tm_hour = 0,
+		.tm_min = 0,
+		.tm_sec = 0,
+	};
+
+	rtc_set(&tmp);
 }
 
 #endif

1.7.9.5

This RTC only supports a 100 years range so rtc_set() should not allow setting years bellow 1970 or above 2069.

---
Changes for v2:
- New patch

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None

---
 drivers/rtc/s3c24x0_rtc.c |    5 +++++
 1 file changed, 5 insertions(+)

index 3fd5cec..bcd6d44 100644
@@ -139,6 +139,11 @@ int rtc_set(struct rtc_time *tmp)
 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
 #endif
+	if (tmp->tm_year < 1970 || tmp->tm_year > 2069) {
+		puts("ERROR: year should be between 1970 and 2069!\n");
+		return -1;
+	}
+
 	year = bin2bcd(tmp->tm_year % 100);
 	mon  = bin2bcd(tmp->tm_mon);
 	wday = bin2bcd(tmp->tm_wday);

1.7.9.5

NAND Flash driver with HW ECC for the S3C24XX SoCs. Currently it only supports SLC NAND chips.

---
Changes for v2:
- Coding style cleanup
- Use of clrsetbits_le32()
- Use of register bit macros instead of magic numbers

Changes for v3:
- Removed magic numbers
- Removed a macro to declare a void printf()
- Replaced one printf() with a puts()

Changes for v4:
- Coding style cleanup
- Use of a struct to store chip private data
- Replaced u_long by u32
- Replaced u_char by uint8_t
- Added error message in s3c_nand_select_chip()
- Optimization of s3c_nand_hwcontrol()

Changes for v5:
- Dropped const attribute in the private struct
- Added const attribute to 'cs' field in the private struct

---
 drivers/mtd/nand/Makefile       |    1 +
 drivers/mtd/nand/s3c24xx_nand.c |  255 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 256 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

index 29dc20e..791ec44 100644
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o

1.7.9.5

Minkyu, what's the status of this patchset? I don't see any comments in patchwork. Is this patch still active and needing my ack?

-Scott

Hi Scott,

This patch series was missed by Minkyu when I posted it one year ago. I've promised to rebase it on the latest u-boot tree, but still did not have time for doing it;

http://lists.denx.de/pipermail/u-boot/2013-September/163467.html

Best regards,
Jos? Gon?alves

Samsung's S3C24XX SoCs need this in order to generate a binary image with a padded SPL concatenated with U-Boot.

---
Changes for v2:
- None

Changes for v3:
- Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin

Changes for v4:
- None

Changes for v5:
- Changed new binary target name from u-boot-pad.bin to u-boot-with-spl.bin
- The padded SPL is now generated in the SPL directory

---
 Makefile     |   11 +++++------
 spl/Makefile |    4 +++-
 2 files changed, 8 insertions(+), 7 deletions(-)

index 8738d55..fad8b33 100644
@@ -433,13 +433,12 @@ $(obj)u-boot.sha1:	$(obj)u-boot.bin
 $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
-$(obj)u-boot.ubl:       $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
-		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $(obj)u-boot-ubl.bin
+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+		cat $^ > $@
+
+$(obj)u-boot.ubl:       $(obj)u-boot-with-spl.bin
 		$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-		-e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin $(obj)u-boot.ubl
-		rm $(obj)u-boot-ubl.bin
-		rm $(obj)spl/u-boot-spl-pad.bin
+		-e $(CONFIG_SYS_TEXT_BASE) -d $< $@
 
 $(obj)u-boot.ais:       $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
 		$(obj)tools/mkimage -s -n /dev/null -T aisimage \

index f96c08e..6ea9f26 100644
@@ -23,6 +23,8 @@ include $(TOPDIR)/config.mk
 # We want the final binaries in this directory
 obj := $(OBJTREE)/spl/
 
+PAD_TO ?= 1
+
 HAVE_VENDOR_COMMON_LIB := $(shell [ -f $(SRCTREE)/board/$(VENDOR)/common/Makefile ] \
 			&& echo y || echo n)
 

@@ -124,7 +126,7 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
 endif
 
 $(obj)u-boot-spl.bin:	$(obj)u-boot-spl
-	$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
 
 GEN_UBOOT = \
 	UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) | \

1.7.9.5

The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC. This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers that can supply it with a selectable NAND chip from 128MB to 1GB.

---
Changes for v2:
- Coding style cleanup
- Use of Use of clrbits_le32(), setbits_le32() and clrsetbits_le32()
- Use of register bit macros instead of magic numbers
- Use of serial and rtc drivers implemented for s3c24x0

Changes for v3:
- Changed target name from u-boot-ubl.bin to u-boot-pad.bin
- Removed magic numbers
- Changes to support new SPL framework

Changes for v4:
- None

Changes for v5:
- Changed target name from u-boot-pad.bin to u-boot-with-spl.bin
- Coding style cleanup - removal of TABS after #define (this is not detected by checkpatch.pl!)
- Removal of #define CONFIG_SYS_BAUDRATE_TABLE as this in the defaults now

---
 MAINTAINERS                            |    4 +
 board/boardcon/mini2416/Makefile       |   47 ++++++++
 board/boardcon/mini2416/config.mk      |    4 +
 board/boardcon/mini2416/mini2416.c     |  104 ++++++++++++++++
 board/boardcon/mini2416/mini2416_spl.c |  202 ++++++++++++++++++++++++++++++++
 board/boardcon/mini2416/u-boot-spl.lds |   63 ++++++++++
 boards.cfg                             |    1 +
 include/configs/mini2416.h             |  202 ++++++++++++++++++++++++++++++++
 8 files changed, 627 insertions(+)
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 include/configs/mini2416.h

index c5a6f2f..80ad29e 100644
@@ -653,6 +653,10 @@ Fabio Estevam <[email protected]>
 	mx53ard		i.MX53
 	mx53smd		i.MX53
 
+Jos? Gon?alves <[email protected]>
+
+	mini2416	ARM926EJS (S3C2416 SoC)
+
 Daniel Gorsulowski <[email protected]>
 
 	meesc		ARM926EJS (AT91SAM9263 SoC)

new file mode 100644
index 0000000..17d8166
@@ -0,0 +1,4 @@
+PAD_TO	:= 0x2000
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot-with-spl.bin
+endif

index fdb84ad..823d5e6 100644
@@ -185,6 +185,7 @@ omap730p2_cs0boot	     arm         arm926ejs   omap730p2		 ti             omap
 omap730p2_cs3boot	     arm         arm926ejs   omap730p2		 ti             omap        omap730p2:CS3_BOOT
 edminiv2                     arm         arm926ejs   -                   LaCie          orion5x
 dkb			     arm         arm926ejs   -                   Marvell        pantheon
+mini2416                     arm         arm926ejs   mini2416            boardcon       s3c24xx
 spear300                     arm         arm926ejs   spear300            spear          spear       spear3xx_evb:spear300
 spear300_nand                arm         arm926ejs   spear300            spear          spear       spear3xx_evb:spear300,nand
 spear300_usbtty              arm         arm926ejs   spear300            spear          spear       spear3xx_evb:spear300,usbtty

1.7.9.5

Hi,

Can you tell me if this patch series is going to be included on next u-boot release? Do you need anything from my side in order to push this?

Best regards,
Jos? Gon?alves

The NAND driver patch is:

-Scott

Dear Jos? Miguel Gon?alves,

[...]

Ccing Minkyu.

Best regards,
Marek Vasut