EXYNOS5: FDT Support for I2C

index 8b2218c..883961f 100644
@@ -69,6 +69,7 @@ enum fdt_compat_id {
 	COMPAT_SMSC_LAN9215,		/* SMSC 10/100 Ethernet LAN9215 */
 	COMPAT_SAMSUNG_EXYNOS5_SROMC,	/* Exynos5 SROMC */
 	COMPAT_SAMSUNG_EXYNOS_TMU,	/* Exynos TMU */
+	COMPAT_SAMSUNG_S3C2440_I2C,	/* Exynos I2C Controller */
 
 	COMPAT_COUNT,
 };

index b9519f9..ff25db6 100644
@@ -46,6 +46,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(SMSC_LAN9215, "smsc,lan9215"),
 	COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
 	COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
+	COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

index f02f441..f9f6911 100644
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>

@@ -396,3 +397,30 @@ int exynos_pinmux_config(int peripheral, int flags)
 		return -1;
 	}
 }
+
+#ifdef CONFIG_OF_CONTROL
+static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
+{
+	int err;
+	u32 cell[3];
+
+	err = fdtdec_get_int_array(blob, node, "interrupts", cell,
+					ARRAY_SIZE(cell));
+	if (err)
+		return PERIPH_ID_NONE;
+
+	if ((130 > cell[1]) || (cell[1] < 31))
+		return cell[1];
+
+	debug(" invalid peripheral id\n");
+	return PERIPH_ID_NONE;
+}
+
+int pinmux_decode_periph_id(const void *blob, int node)
+{
+	if (cpu_is_exynos5())
+		return  exynos5_pinmux_decode_periph_id(blob, node);
+	else
+		return PERIPH_ID_NONE;
+}
+#endif

index 13abd2d..783b77c 100644
@@ -25,12 +25,17 @@
 #define __ASM_ARM_ARCH_PERIPH_H
 
 /*
- * Peripherals requiring clock/pinmux configuration. List will
+ * Peripherals requiring pinmux configuration0. List will
  * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
  *
  */
 enum periph_id {
-	PERIPH_ID_I2C0,
+	PERIPH_ID_UART0 = 51,
+	PERIPH_ID_UART1,
+	PERIPH_ID_UART2,
+	PERIPH_ID_UART3,
+	PERIPH_ID_I2C0 = 56,
 	PERIPH_ID_I2C1,
 	PERIPH_ID_I2C2,
 	PERIPH_ID_I2C3,

@@ -38,22 +43,22 @@ enum periph_id {
 	PERIPH_ID_I2C5,
 	PERIPH_ID_I2C6,
 	PERIPH_ID_I2C7,
-	PERIPH_ID_I2S1,
-	PERIPH_ID_SDMMC0,
+	PERIPH_ID_SPI0 = 68,
+	PERIPH_ID_SPI1,
+	PERIPH_ID_SPI2,
+	PERIPH_ID_SDMMC0 = 75,
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
-	PERIPH_ID_SDMMC4,
-	PERIPH_ID_SROMC,
-	PERIPH_ID_SPI0,
-	PERIPH_ID_SPI1,
-	PERIPH_ID_SPI2,
+	PERIPH_ID_I2S1 = 99,
+
+/* Since following peripherals do not have shared peripheral interrupts (SPIs)
+ * they are numbered arbitiraly after the maximum SPIs Exynos has (128)
+ */
+	PERIPH_ID_SROMC = 128,
 	PERIPH_ID_SPI3,
 	PERIPH_ID_SPI4,
-	PERIPH_ID_UART0,
-	PERIPH_ID_UART1,
-	PERIPH_ID_UART2,
-	PERIPH_ID_UART3,
+	PERIPH_ID_SDMMC4,
 
 	PERIPH_ID_COUNT,
 	PERIPH_ID_NONE = -1,

index 10ea736..00cbb0d 100644
@@ -55,4 +55,12 @@ enum {
  */
 int exynos_pinmux_config(int peripheral, int flags);
 
+/**
+ * Decode the peripheral id using the interrpt numbers.
+ *
+ * @param blob  Device tree blbo
+ * @param node  FDT I2C node to find
+ * @return peripheral id if ok, PERIPH_ID_NONE on error
+ */
+int pinmux_decode_periph_id(const void *blob, int node);
 #endif

index 9bc4c7f..94a093e 100644
@@ -27,9 +27,11 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #ifdef CONFIG_EXYNOS5
 #include <asm/arch/clk.h>
 #include <asm/arch/cpu.h>
+#include <asm/arch/pinmux.h>
 #else
 #include <asm/arch/s3c24x0_cpu.h>
 #endif

@@ -60,7 +62,14 @@
 #define I2C_TIMEOUT 1		/* 1 second */
 
 
-static unsigned int g_current_bus;	/* Stores Current I2C Bus */
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialised so force
+ * variables to live in SRAM
+ */
+static unsigned int g_current_bus __attribute__((section(".data")));
+static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
+			__attribute__((section(".data")));
+static int i2c_busses __attribute__((section(".data")));
 
 #ifndef CONFIG_EXYNOS5
 static int GetI2CSDA(void)

@@ -507,4 +516,76 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 		(i2c, I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
 		 len) != 0);
 }
+
+#ifdef CONFIG_OF_CONTROL
+void board_i2c_init(const void *blob)
+{
+
+	int node_list[CONFIG_MAX_I2C_NUM];
+	int count, i;
+
+	count = fdtdec_find_aliases_for_id(blob, "i2c",
+		COMPAT_SAMSUNG_S3C2440_I2C, node_list,
+		CONFIG_MAX_I2C_NUM);
+	for (i = 0; i < count; i++) {
+		struct s3c24x0_i2c_bus *bus;
+		int node = node_list[i];
+
+		if (node < 0)
+			continue;
+		bus = &i2c_bus[i];
+		bus->regs = (struct s3c24x0_i2c *)
+			fdtdec_get_addr(blob, node, "reg");
+		bus->id = pinmux_decode_periph_id(blob, node);
+		bus->node = node;
+		bus->bus_num = i2c_busses++;
+		exynos_pinmux_config(bus->id, 0);
+	}
+
+}
+
+static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
+{
+	if (bus_idx < i2c_busses)
+		return &i2c_bus[bus_idx];
+	debug("Undefined bus: %d\n", bus_idx);
+	return NULL;
+}
+
+int i2c_get_bus_num_fdt(int node)
+{
+	int i;
+
+	for (i = 0; i < i2c_busses; i++) {
+		if (node == i2c_bus[i].node)
+			return i;
+	}
+
+	debug("%s: Can't find any matched I2C bus\n", __func__);
+	return -1;
+}
+
+int i2c_reset_port_fdt(const void *blob, int node)
+{
+	struct s3c24x0_i2c_bus *i2c;
+
+	int bus;
+
+	bus = i2c_get_bus_num_fdt(node);
+	if (bus < 0) {
+		debug("could not get bus for node %d\n", node);
+		return -1;
+	}
+	i2c = get_bus(bus);
+	if (!i2c) {
+		debug("get_bus() failed for node node %d\n", node);
+		return -1;
+	}
+
+	i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+	return 0;
+}
+#endif
+
 #endif /* CONFIG_HARD_I2C */

index 2dd4b06..1243bf1 100644
@@ -30,4 +30,12 @@ struct s3c24x0_i2c {
 	u32	iicds;
 	u32	iiclc;
 };
+
+struct s3c24x0_i2c_bus {
+	int node;	/* device tree node */
+	int bus_num;	/* i2c bus number */
+	struct s3c24x0_i2c *regs;
+	enum periph_id id;
+};
+
 #endif /* _S3C24X0_I2C_H */

index 16f099d..c60d075 100644
@@ -262,4 +262,30 @@ extern int get_multi_scl_pin(void);
 extern int get_multi_sda_pin(void);
 extern int multi_i2c_init(void);
 #endif
+
+/**
+ * Get FDT values for i2c bus.
+ *
+ * @param blob  Device tree blbo
+ * @return the number of I2C bus
+ */
+void board_i2c_init(const void *blob);
+
+/**
+ * Find the I2C bus number by given a FDT I2C node.
+ *
+ * @param blob  Device tree blbo
+ * @param node  FDT I2C node to find
+ * @return the number of I2C bus (zero based), or -1 on error
+ */
+int i2c_get_bus_num_fdt(int node);
+
+/**
+ * Reset the I2C bus represented by the given a FDT I2C node.
+ *
+ * @param blob  Device tree blbo
+ * @param node  FDT I2C node to find
+ * @return 0 if port was reset, -1 if not found
+ */
+int i2c_reset_port_fdt(const void *blob, int node);
 #endif	/* _I2C_H_ */

index db2457b..5ebc665 100644
@@ -272,24 +272,6 @@ static int board_uart_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-static int board_i2c_init(void)
-{
-	int i, err;
-
-	for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) {
-		err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
-						PINMUX_FLAG_NONE);
-		if (err) {
-			debug("I2C%d not configured\n", (PERIPH_ID_I2C0 + i));
-			return err;
-		}
-	}
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {

@@ -300,7 +282,7 @@ int board_early_init_f(void)
 		return err;
 	}
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
-	err = board_i2c_init();
+	board_i2c_init(gd->fdt_blob);
 #endif
 	return err;
 }