ARM: nommu: allow unaligned accesses on ARMv6+ processors

PATCH New Will Deacon 4 participants 7 messages Dec 3, 2012 Arm (32-bit)

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Will Deacon

author

2012-12-03 17:56 UTC #0 lore raw

PATCH 1/3 ARM: nommu: allow unaligned accesses on ARMv6+ processors

Commit 8428e84d ("ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processors") unconditionally clears SCTLR.A for ARMv6+ processors, since newer toolchains assume that unaligned memory accesses will not fault for these cores.

This patch adds the corresponding change for nommu kernel builds.

Signed-off-by Will Deacon <[email protected]>

---

Identical to Armando's recent patch but included here for completeness.

 arch/arm/kernel/head-nommu.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/kernel/head-nommu.S +1 -1

index 278cfc1..2c228a0 100644
@@ -68,7 +68,7 @@ __after_proc_init:
 	 * CP15 system control register value returned in r0 from
 	 * the CPU init function.
 	 */
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
 	orr	r0, r0, #CR_A
 #else
 	bic	r0, r0, #CR_A

Signature · 1 line

1.8.0

Will Deacon

author

2012-12-03 17:56 UTC #1 lore raw

PATCH 2/3 ARM: nommu: prevent generation of kernel unaligned memory accesses

Recent ARMv7 toolchains assume that unaligned memory accesses will not fault and will instead be handled by the processor.

For the nommu case (without an MPU), memory will be treated as strongly-ordered and therefore unaligned accesses may fault regardless of the SCTLR.A setting.

This patch passes -mno-unaligned-access to GCC when compiling for nommu targets, preventing the generation of unaligned memory access in the kernel.

Signed-off-by Will Deacon <[email protected]>

---
 arch/arm/Makefile | 1 +
 1 file changed, 1 insertion(+)

arch/arm/Makefile +1 -0

index 5f914fc..03363e2 100644
@@ -32,6 +32,7 @@ KBUILD_DEFCONFIG := versatile_defconfig
 # defines filename extension depending memory management type.
 ifeq ($(CONFIG_MMU),)
 MMUEXT		:= -nommu
+KBUILD_CFLAGS	+= $(call cc-option,-mno-unaligned-access)
 endif
 
 ifeq ($(CONFIG_FRAME_POINTER),y)

Signature · 1 line

1.8.0

Rob Herring

2012-12-03 18:55 UTC #2 lore raw

PATCH 2/3 ARM: nommu: prevent generation of kernel unaligned memory accesses

Quoted 10 lines · Will Deacon

Recent ARMv7 toolchains assume that unaligned memory accesses will not fault and will instead be handled by the processor.
For the nommu case (without an MPU), memory will be treated as strongly-ordered and therefore unaligned accesses may fault regardless of the SCTLR.A setting.
This patch passes -mno-unaligned-access to GCC when compiling for nommu targets, preventing the generation of unaligned memory access in the kernel.

BTW, this option will not fully prevent unaligned accesses. This code will still generate unaligned accesses:

void func(void)

{
	char array[] = { 1, 2, 3 };
}

u-boot has been fixing these up by making the arrays static.

Rob

Quoted 19 lines

Signed-off-by Will Deacon <[email protected]>

---
 arch/arm/Makefile | 1 +
 1 file changed, 1 insertion(+)

arch/arm/Makefile +1 -0

index 5f914fc..03363e2 100644
@@ -32,6 +32,7 @@ KBUILD_DEFCONFIG := versatile_defconfig
 # defines filename extension depending memory management type.
 ifeq ($(CONFIG_MMU),)
 MMUEXT		:= -nommu
+KBUILD_CFLAGS	+= $(call cc-option,-mno-unaligned-access)
 endif
 
 ifeq ($(CONFIG_FRAME_POINTER),y)

Nicolas Pitre

2012-12-03 19:27 UTC #3 lore raw

PATCH 2/3 ARM: nommu: prevent generation of kernel unaligned memory accesses

Quoted 12 lines · Rob Herring

Quoted 10 lines · Will Deacon
Recent ARMv7 toolchains assume that unaligned memory accesses will not fault and will instead be handled by the processor.
For the nommu case (without an MPU), memory will be treated as strongly-ordered and therefore unaligned accesses may fault regardless of the SCTLR.A setting.
This patch passes -mno-unaligned-access to GCC when compiling for nommu targets, preventing the generation of unaligned memory access in the kernel.

Quoted 7 lines

BTW, this option will not fully prevent unaligned accesses. This code will still generate unaligned accesses:
void func(void)
{
	char array[] = { 1, 2, 3 };
}

Isn't that a gcc bug?

Nicolas

Will Deacon

author

2012-12-03 17:56 UTC #4 lore raw

PATCH 3/3 ARM: nommu: do not enable DCACHE_WORD_ACCESS when !CONFIG_MMU

In reply to Will Deacon

Commit b9a50f74905a ("ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs") added support for word-at-time path comparisons, relying on the ability to perform unaligned loads with negligible performance impact in hardware.

For nommu configurations without MPU support, this is unpredictable and so we should fall back to the byte-by-byte routines.

Signed-off-by Will Deacon <[email protected]>

---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/Kconfig +1 -1

index ade7e92..3388431 100644
@@ -6,7 +6,7 @@ config ARM
 	select ARCH_HAVE_CUSTOM_GPIO_H
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select CPU_PM if (SUSPEND || CPU_IDLE)
-	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
+	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
 	select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select GENERIC_IRQ_PROBE

Signature · 1 line

1.8.0

Jonathan Austin

2012-12-03 18:20 UTC #5 lore raw

PATCH 1/3 ARM: nommu: allow unaligned accesses on ARMv6+ processors

In reply to Will Deacon

Quoted 8 lines · Will Deacon

Commit 8428e84d ("ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processors") unconditionally clears SCTLR.A for ARMv6+ processors, since newer toolchains assume that unaligned memory accesses will not fault for these cores.
This patch adds the corresponding change for nommu kernel builds.
Signed-off-by Will Deacon <[email protected]>

For the series:

Tested-by Jonathan Austin <[email protected]>

(Tested on Cortex-R Series models)

Jonny

Nicolas Pitre

2012-12-03 19:25 UTC #6 lore raw

PATCH 1/3 ARM: nommu: allow unaligned accesses on ARMv6+ processors

In reply to Will Deacon

Quoted 11 lines · Will Deacon

Commit 8428e84d ("ARM: 7150/1: Allow kernel unaligned accesses on ARMv6+ processors") unconditionally clears SCTLR.A for ARMv6+ processors, since newer toolchains assume that unaligned memory accesses will not fault for these cores.
This patch adds the corresponding change for nommu kernel builds.
Signed-off-by Will Deacon <[email protected]>
---
Identical to Armando's recent patch but included here for completeness.

For patches 1 to 3:

Acked-by Nicolas Pitre <[email protected]>

Quoted 26 lines

 arch/arm/kernel/head-nommu.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/kernel/head-nommu.S +1 -1

index 278cfc1..2c228a0 100644
@@ -68,7 +68,7 @@ __after_proc_init:
 	 * CP15 system control register value returned in r0 from
 	 * the CPU init function.
 	 */
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
 	orr	r0, r0, #CR_A
 #else
 	bic	r0, r0, #CR_A

Signature · 7 lines

1.8.0


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