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mx23: Add POWER and CLKCTRL register definitions

PATCH New Marek Vasut 3 participants 9 messages Nov 25, 2012 – Dec 4, 2012

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#0 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

---
 arch/arm/include/asm/arch-mxs/imx-regs.h          |    5 +
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h |  221 +++++++++++++
 arch/arm/include/asm/arch-mxs/regs-power-mx23.h   |  357 +++++++++++++++++++++
 3 files changed, 583 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-power-mx23.h
arch/arm/include/asm/arch-mxs/imx-regs.h +5 -0
index 9764041..563e4a3 100644
@@ -37,6 +37,11 @@
 #include <asm/arch/regs-ssp.h>
 #include <asm/arch/regs-timrot.h>
 
+#ifdef CONFIG_MX23
+#include <asm/arch/regs-clkctrl-mx23.h>
+#include <asm/arch/regs-power-mx23.h>
+#endif
+
 #ifdef CONFIG_MX28
 #include <asm/arch/regs-clkctrl-mx28.h>
 #include <asm/arch/regs-power-mx28.h>
arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h new file +221 -0

221 lines not on this page · raw message

arch/arm/include/asm/arch-mxs/regs-power-mx23.h new file +357 -0

357 lines not on this page · raw message

Signature · 1 line
1.7.10.4
#1 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Quoted 6 lines · Marek Vasut

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

Please don't merge it now as this has been already done in my branch with mx23.

Signature · 3 lines
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br
#2 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Dear Otavio Salvador,

Quoted 10 lines · Marek Vasut
Quoted 6 lines

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

Please don't merge it now as this has been already done in my branch with mx23.

I'm attaching a proper diff against your branch. There are multiple wrong and missing bits in your branch. This patch is done by processing the FSL-provided header file and cross-checking with the datasheet.

So, this patch is right, yours is wrong. Sorry.

--- arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h 2012-10-01
02:46:18.000000000 +0200
+++ ../u-boot-imx/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h

2012-11-25 00:55:43.299072391 +0100

@@ -1,8 +1,11 @@
/*
* Freescale i.MX23 CLKCTRL Register Definitions
*
- * Copyright (C) 2012 Otavio Salvador <[email protected]>
- * on behalf of O.S. Systems Software LTDA.
+ * Copyright (C) 2012 Marek Vasut <[email protected]>
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -28,7 +31,8 @@
#ifndef __ASSEMBLY__

 struct mxs_clkctrl_regs {
        mxs_reg_32(hw_clkctrl_pll0ctrl0)        /* 0x00 */
-       mxs_reg_32(hw_clkctrl_pll0ctrl1)        /* 0x10 */
+       uint32_t        hw_clkctrl_pll0ctrl1;   /* 0x10 */
+       uint32_t        reserved_pll0ctrl1[3];  /* 0x14-0x1c */
        mxs_reg_32(hw_clkctrl_cpu)              /* 0x20 */
        mxs_reg_32(hw_clkctrl_hbus)             /* 0x30 */
        mxs_reg_32(hw_clkctrl_xbus)             /* 0x40 */
@@ -39,15 +43,13 @@
        mxs_reg_32(hw_clkctrl_spdif)            /* 0x90 */
        mxs_reg_32(hw_clkctrl_emi)              /* 0xa0 */

- uint32_t reserved[4];
-

-       mxs_reg_32(hw_clkctrl_saif)             /* 0x0c0 */
-       mxs_reg_32(hw_clkctrl_tv)               /* 0x0d0 */
-       mxs_reg_32(hw_clkctrl_etm)              /* 0x0e0 */
-
-       mxs_reg_8(hw_clkctrl_frac0)     /* 0x0f0 */
-       mxs_reg_8(hw_clkctrl_frac1)     /* 0x100 */
+       uint32_t        reserved1[4];
+       mxs_reg_32(hw_clkctrl_saif0)            /* 0xc0 */
+       mxs_reg_32(hw_clkctrl_tv)               /* 0xd0 */
+       mxs_reg_32(hw_clkctrl_etm)              /* 0xe0 */
+       mxs_reg_8(hw_clkctrl_frac0)             /* 0xf0 */
+       mxs_reg_8(hw_clkctrl_frac1)             /* 0x100 */
        mxs_reg_32(hw_clkctrl_clkseq)           /* 0x110 */
        mxs_reg_32(hw_clkctrl_reset)            /* 0x120 */
        mxs_reg_32(hw_clkctrl_status)           /* 0x130 */
@@ -87,11 +89,11 @@
 #define        CLKCTRL_CPU_DIV_XTAL_MASK               (0x3ff << 16)
 #define        CLKCTRL_CPU_DIV_XTAL_OFFSET             16
 #define        CLKCTRL_CPU_INTERRUPT_WAIT              (1 << 12)
-#define        CLKCTRL_CPU_DIV_CPU_FRAC_EN             (1 << 5)
+#define        CLKCTRL_CPU_DIV_CPU_FRAC_EN             (1 << 10)
 #define        CLKCTRL_CPU_DIV_CPU_MASK                0x3f
 #define        CLKCTRL_CPU_DIV_CPU_OFFSET              0
-#define        CLKCTRL_HBUS_ASM_BUSY                   (1 << 29)
+#define        CLKCTRL_HBUS_BUSY                       (1 << 29)
 #define        CLKCTRL_HBUS_DCP_AS_ENABLE              (1 << 28)
 #define        CLKCTRL_HBUS_PXP_AS_ENABLE              (1 << 27)
 #define        CLKCTRL_HBUS_APBHDMA_AS_ENABLE          (1 << 26)
@@ -101,7 +103,7 @@
 #define        CLKCTRL_HBUS_CPU_DATA_AS_ENABLE         (1 << 22)
 #define        CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE        (1 << 21)
 #define        CLKCTRL_HBUS_AUTO_SLOW_MODE             (1 << 20)
-#define        CLKCTRL_HBUS_SLOW_DIV_MASK              (0x7 << 18)
+#define        CLKCTRL_HBUS_SLOW_DIV_MASK              (0x7 << 16)
 #define        CLKCTRL_HBUS_SLOW_DIV_OFFSET            16
 #define        CLKCTRL_HBUS_SLOW_DIV_BY1               (0x0 << 16)
 #define        CLKCTRL_HBUS_SLOW_DIV_BY2               (0x1 << 16)

@@ -114,16 +116,25 @@
#define CLKCTRL_HBUS_DIV_OFFSET 0

 #define        CLKCTRL_XBUS_BUSY                       (1 << 31)
-#define        CLKCTRL_XBUS_DIV_FRAC_EN                (1 << 9)
+#define        CLKCTRL_XBUS_DIV_FRAC_EN                (1 << 10)
 #define        CLKCTRL_XBUS_DIV_MASK                   0x3ff
 #define        CLKCTRL_XBUS_DIV_OFFSET                 0
 #define        CLKCTRL_XTAL_UART_CLK_GATE              (1 << 31)
+#define        CLKCTRL_XTAL_FILT_CLK24M_GATE           (1 << 30)
 #define        CLKCTRL_XTAL_PWM_CLK24M_GATE            (1 << 29)
+#define        CLKCTRL_XTAL_DRI_CLK24M_GATE            (1 << 28)
+#define        CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE         (1 << 27)
 #define        CLKCTRL_XTAL_TIMROT_CLK32K_GATE         (1 << 26)
 #define        CLKCTRL_XTAL_DIV_UART_MASK              0x3
 #define        CLKCTRL_XTAL_DIV_UART_OFFSET            0
+#define        CLKCTRL_PIX_CLKGATE                     (1 << 31)
+#define        CLKCTRL_PIX_BUSY                        (1 << 29)
+#define        CLKCTRL_PIX_DIV_FRAC_EN                 (1 << 12)
+#define        CLKCTRL_PIX_DIV_MASK                    0xfff
+#define        CLKCTRL_PIX_DIV_OFFSET                  0
+
 #define        CLKCTRL_SSP_CLKGATE                     (1 << 31)
 #define        CLKCTRL_SSP_BUSY                        (1 << 29)
 #define        CLKCTRL_SSP_DIV_FRAC_EN                 (1 << 9)
@@ -151,11 +162,23 @@
 #define        CLKCTRL_EMI_DIV_EMI_MASK                0x3f
 #define        CLKCTRL_EMI_DIV_EMI_OFFSET              0
-#define        CLKCTRL_SAIF_CLKGATE                    (1 << 31)
-#define        CLKCTRL_SAIF_BUSY                       (1 << 29)
-#define        CLKCTRL_SAIF_DIV_FRAC_EN                (1 << 16)
-#define        CLKCTRL_SAIF_DIV_MASK                   0xffff
-#define        CLKCTRL_SAIF_DIV_OFFSET         0
+#define        CLKCTRL_IR_CLKGATE                      (1 << 31)
+#define        CLKCTRL_IR_AUTO_DIV                     (1 << 29)
+#define        CLKCTRL_IR_IR_BUSY                      (1 << 28)
+#define        CLKCTRL_IR_IROV_BUSY                    (1 << 27)
+#define        CLKCTRL_IR_IROV_DIV_MASK                (0x1ff << 16)
+#define        CLKCTRL_IR_IROV_DIV_OFFSET              16
+#define        CLKCTRL_IR_IR_DIV_MASK                  0x3ff
+#define        CLKCTRL_IR_IR_DIV_OFFSET                0
+
+#define        CLKCTRL_SAIF0_CLKGATE                   (1 << 31)
+#define        CLKCTRL_SAIF0_BUSY                      (1 << 29)
+#define        CLKCTRL_SAIF0_DIV_FRAC_EN               (1 << 16)
+#define        CLKCTRL_SAIF0_DIV_MASK                  0xffff
+#define        CLKCTRL_SAIF0_DIV_OFFSET                0
+
+#define        CLKCTRL_TV_CLK_TV108M_GATE              (1 << 31)
+#define        CLKCTRL_TV_CLK_TV_GATE                  (1 << 30)
 #define        CLKCTRL_ETM_CLKGATE                     (1 << 31)
 #define        CLKCTRL_ETM_BUSY                        (1 << 29)
@@ -169,13 +192,14 @@
 #define        CLKCTRL_FRAC_FRAC_OFFSET                0
 #define        CLKCTRL_FRAC0_CPU                       0
 #define        CLKCTRL_FRAC0_EMI                       1
-#define        CLKCTRL_FRAC0_IO1                       2
+#define        CLKCTRL_FRAC0_PIX                       2
 #define        CLKCTRL_FRAC0_IO0                       3
+#define        CLKCTRL_FRAC1_VID                       3
 #define        CLKCTRL_CLKSEQ_BYPASS_ETM               (1 << 8)
 #define        CLKCTRL_CLKSEQ_BYPASS_CPU               (1 << 7)
 #define        CLKCTRL_CLKSEQ_BYPASS_EMI               (1 << 6)
-#define        CLKCTRL_CLKSEQ_BYPASS_SSP               (1 << 5) /* FIXME: 
bypass SSP0 and SSP1? */
+#define        CLKCTRL_CLKSEQ_BYPASS_SSP               (1 << 5)
 #define        CLKCTRL_CLKSEQ_BYPASS_GPMI              (1 << 4)
 #define        CLKCTRL_CLKSEQ_BYPASS_IR                (1 << 3)
 #define        CLKCTRL_CLKSEQ_BYPASS_PIX               (1 << 1)
@@ -194,7 +218,4 @@
 #define        CLKCTRL_VERSION_STEP_MASK               0xffff
 #define        CLKCTRL_VERSION_STEP_OFFSET             0

-/* Compatibility */
-#define CLKCTRL_CLKSEQ_BYPASS_SSP0 CLKCTRL_CLKSEQ_BYPASS_SSP -
#endif /* __MX23_REGS_CLKCTRL_H__ */

Best regards,
Marek Vasut

#3 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Quoted 10 lines · Marek Vasut

Dear Otavio Salvador,

Quoted 8 lines · Marek Vasut
Quoted 6 lines

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

Quoted 8 lines
Quoted 2 lines

Please don't merge it now as this has been already done in my branch with mx23.

I'm attaching a proper diff against your branch. There are multiple wrong and missing bits in your branch. This patch is done by processing the FSL-provided header file and cross-checking with the datasheet.

So, this patch is right, yours is wrong. Sorry.

I am not saying mine is perfect, far from it. And we can fix it in the branch but please don't push it until we finish mx23 bootstrap.

Let's work in same code, not duplicate work...

Signature · 3 lines
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br
#4 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Dear Otavio Salvador,

Quoted 18 lines · Marek Vasut
Quoted 17 lines

Dear Otavio Salvador,

Quoted 10 lines · Marek Vasut
Quoted 6 lines

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

Please don't merge it now as this has been already done in my branch with mx23.

I'm attaching a proper diff against your branch. There are multiple wrong and missing bits in your branch. This patch is done by processing the FSL-provided header file and cross-checking with the datasheet.

Quoted 6 lines
Quoted 1 line

So, this patch is right, yours is wrong. Sorry.

I am not saying mine is perfect, far from it. And we can fix it in the branch but please don't push it until we finish mx23 bootstrap.

Let's work in same code, not duplicate work...

I still don't see any argument against applying this patch -- other than the fact it will break some out-of-tree port.

Best regards,
Marek Vasut

#5 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Quoted 2 lines · Marek Vasut

I still don't see any argument against applying this patch -- other than the fact it will break some out-of-tree port.

Isn't it good enough?

You know about my port; you know where it is and in fact you've been helping guiding me about the technical issues I have no knowledge about. So what is the point in merge something which is know to break other tree?

I hope you and Stefano hold it. I would love if you could send it for merging in my tree and when it is done we merge it.

Signature · 3 lines
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br
#6 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Dear Otavio Salvador,

Quoted 5 lines · Marek Vasut
Quoted 2 lines

I still don't see any argument against applying this patch -- other than the fact it will break some out-of-tree port.

Isn't it good enough?

It is not good enough, we can not care about out-of-tree ports. If we had to consider every single out-of-tree patchset for U-Boot, we'd be stuck in one place.

Quoted 3 lines

You know about my port; you know where it is and in fact you've been helping guiding me about the technical issues I have no knowledge about.

Yes, I did know about it. But there was no activity recently, so I started pushing it.

Quoted 2 lines

So what is the point in merge something which is know to break other tree?

See above for the explanation.

Quoted 2 lines

I hope you and Stefano hold it. I would love if you could send it for merging in my tree and when it is done we merge it.

You can rebase your tree on top of mainline, no problem with that.

Best regards,
Marek Vasut

#7 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

In reply to Marek Vasut
Quoted 7 lines · Marek Vasut

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

---

Hi Marek, Hi Otavio,

Quoted 7 lines
 arch/arm/include/asm/arch-mxs/imx-regs.h          |    5 +
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h |  221 +++++++++++++
 arch/arm/include/asm/arch-mxs/regs-power-mx23.h   |  357 +++++++++++++++++++++
 3 files changed, 583 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-power-mx23.h

The main (and only issue) here is that there is not yet a board with MX23 in u-boot to use this code. Then this is dead code, and I cannot merge it now - I will postpone this patch.

The best way to add support for this SOC is, as usually, to get a bunch of patches with the last ones for a board using the SOC. Else we are unsure that the code we introduce can be really used later.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#8 lore raw

PATCH 1/1 mx23: Add POWER and CLKCTRL register definitions

Quoted 20 lines · Stefano Babic
Quoted 7 lines · Marek Vasut

Add register definitions for the i.MX23 power control block and clock control block. These are essential for the basic bootstrap of the i.MX23. Also, properly include them in imx-regs.h .

---

Hi Marek, Hi Otavio,

Quoted 3 lines
 arch/arm/include/asm/arch-mxs/imx-regs.h          |    5 +
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h |  221 +++++++++++++
 arch/arm/include/asm/arch-mxs/regs-power-mx23.h   |  357

+++++++++++++++++++++

Quoted 4 lines
 3 files changed, 583 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-power-mx23.h
Quoted 8 lines

The main (and only issue) here is that there is not yet a board with MX23 in u-boot to use this code. Then this is dead code, and I cannot merge it now - I will postpone this patch.

The best way to add support for this SOC is, as usually, to get a bunch of patches with the last ones for a board using the SOC. Else we are unsure that the code we introduce can be really used later.

I agree; I have applied it in my tree and will send it together with other patches when I have something useful.

Signature · 3 lines
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br