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EXYNOS5: Change parent clock of FIMD to MPLL

PATCH Superseded Ajay Kumar 4 participants 11 messages Dec 11, 2012 – Dec 13, 2012

Subsystems (3)

v1 of 6 Superseded Latest is v6 →

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Ajay Kumar

author
#0 lore raw

PATCH 1/5 EXYNOS5: Change parent clock of FIMD to MPLL

With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock. Changing FIMD source to resolves this issue.

---
 arch/arm/cpu/armv7/exynos/clock.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/cpu/armv7/exynos/clock.c +1 -1
index fe61f88..bfcd5f7 100644
@@ -603,7 +603,7 @@ void exynos5_set_lcd_clk(void)
 	 */
 	cfg = readl(&clk->src_disp1_0);
 	cfg &= ~(0xf);
-	cfg |= 0x8;
+	cfg |= 0x6;
 	writel(cfg, &clk->src_disp1_0);
 
 	/*
Signature · 1 line
1.7.1
author
#1 lore raw

PATCH 2/5 EXYNOS5: Add pinmux for LCD

This patch adds pinmux configuration for backlight, LCD reset and HPD for DP panel on Exynos5 SMDK.

---
 arch/arm/cpu/armv7/exynos/pinmux.c        |   20 ++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 21 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +20 -0
index f02f441..84f52ea 100644
@@ -284,6 +284,23 @@ void exynos5_spi_config(int peripheral)
 	}
 }
 
+void exynos5_lcd_config()
+{
+	struct exynos5_gpio_part1 *gpio1 =
+		(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+	/* For Backlight */
+	s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
+	s5p_gpio_set_value(&gpio1->b2, 0, 1);
+
+	/* LCD power on */
+	s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
+	s5p_gpio_set_value(&gpio1->x1, 5, 1);
+
+	/* Set Hotplug detect for DP */
+	s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
+}
+
 static int exynos5_pinmux_config(int peripheral, int flags)
 {
 	switch (peripheral) {
@@ -321,6 +338,9 @@ static int exynos5_pinmux_config(int peripheral, int flags)
 	case PERIPH_ID_SPI4:
 		exynos5_spi_config(peripheral);
 		break;
+	case PERIPH_ID_LCD:
+		exynos5_lcd_config();
+		break;
 	default:
 		debug("%s: invalid peripheral %d", __func__, peripheral);
 		return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -0
index 13abd2d..446f5c9 100644
@@ -54,6 +54,7 @@ enum periph_id {
 	PERIPH_ID_UART1,
 	PERIPH_ID_UART2,
 	PERIPH_ID_UART3,
+	PERIPH_ID_LCD,
 
 	PERIPH_ID_COUNT,
 	PERIPH_ID_NONE = -1,
Signature · 1 line
1.7.1
#2 lore raw

PATCH 2/5 EXYNOS5: Add pinmux for LCD

Hi,

Quoted 14 lines · Ajay Kumar

This patch adds pinmux configuration for backlight, LCD reset and HPD for DP panel on Exynos5 SMDK.

---
 arch/arm/cpu/armv7/exynos/pinmux.c        |   20 ++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 21 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +0 -0
index f02f441..84f52ea 100644

arch/arm/cpu/armv7/exynos/pinmux.c void exynos5_spi_config(int peripheral) · line 287

Quoted 4 lines
arch/arm/cpu/armv7/exynos/pinmux.c +1 -0
@@ -284,6 +284,23 @@ void exynos5_spi_config(int peripheral)
        }
 }
 
+void exynos5_lcd_config()

missing void

Quoted 4 lines
arch/arm/cpu/armv7/exynos/pinmux.c +4 -0
+{
+       struct exynos5_gpio_part1 *gpio1 =
+               (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+

arch/arm/cpu/armv7/exynos/pinmux.c void exynos5_spi_config(int peripheral) · line 301

Quoted 10 lines
arch/arm/cpu/armv7/exynos/pinmux.c +10 -0
+       /* For Backlight */
+       s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
+       s5p_gpio_set_value(&gpio1->b2, 0, 1);
+
+       /* LCD power on */
+       s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
+       s5p_gpio_set_value(&gpio1->x1, 5, 1);
+
+       /* Set Hotplug detect for DP */
+       s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));

It should be SMDK5250 specific codes, it can't located at common file.

Thank you,
Kyungmin Park

Quoted 34 lines
arch/arm/cpu/armv7/exynos/pinmux.c +5 -0
+}
+
 static int exynos5_pinmux_config(int peripheral, int flags)
 {
        switch (peripheral) {
@@ -321,6 +338,9 @@ static int exynos5_pinmux_config(int peripheral, int flags)
        case PERIPH_ID_SPI4:
                exynos5_spi_config(peripheral);
                break;
+       case PERIPH_ID_LCD:
+               exynos5_lcd_config();
+               break;
        default:
                debug("%s: invalid peripheral %d", __func__, peripheral);
                return -1;
arch/arm/include/asm/arch-exynos/periph.h +1 -1
index 13abd2d..446f5c9 100644
@@ -54,6 +54,7 @@ enum periph_id {
        PERIPH_ID_UART1,
        PERIPH_ID_UART2,
        PERIPH_ID_UART3,
+       PERIPH_ID_LCD,
 
        PERIPH_ID_COUNT,
        PERIPH_ID_NONE = -1,
--

1.7.1

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#3 lore raw

PATCH 2/5 EXYNOS5: Add pinmux for LCD

Quoted 22 lines · Kyungmin Park

Hi,

Quoted 14 lines · Ajay Kumar

This patch adds pinmux configuration for backlight, LCD reset and HPD for DP panel on Exynos5 SMDK.

---
 arch/arm/cpu/armv7/exynos/pinmux.c        |   20 ++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/periph.h |    1 +
 2 files changed, 21 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/exynos/pinmux.c +0 -0
index f02f441..84f52ea 100644

arch/arm/cpu/armv7/exynos/pinmux.c void exynos5_spi_config(int peripheral) · line 287

Quoted 4 lines
arch/arm/cpu/armv7/exynos/pinmux.c +1 -0
@@ -284,6 +284,23 @@ void exynos5_spi_config(int peripheral)
        }
 }
 
+void exynos5_lcd_config()

missing void

Quoted 16 lines
Quoted 4 lines
arch/arm/cpu/armv7/exynos/pinmux.c +4 -0
+{
+       struct exynos5_gpio_part1 *gpio1 =
+               (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+

arch/arm/cpu/armv7/exynos/pinmux.c void exynos5_spi_config(int peripheral) · line 301

Quoted 10 lines
arch/arm/cpu/armv7/exynos/pinmux.c +10 -0
+       /* For Backlight */
+       s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
+       s5p_gpio_set_value(&gpio1->b2, 0, 1);
+
+       /* LCD power on */
+       s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
+       s5p_gpio_set_value(&gpio1->x1, 5, 1);
+
+       /* Set Hotplug detect for DP */
+       s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));

It should be SMDK5250 specific codes, it can't located at common file.

You can use the cfg_gpio function at your board file.

Thanks.
Minkyu Kang.

author
#4 lore raw

PATCH 3/5 video: Fix compilation dependency of exynos_dp and exynos_mipi on exynos_fb

In reply to Ajay Kumar

When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM. Similarly, when only MIPI is used, we need not enable CONFIG_EXYNOS_DP. But the current structuring of code forces us to enable both CONFIG_EXYNOS_MIPI_DSIM and CONFIG_EXYNOS_DP.
This patch adds conditional compilation check to remove the dependency.

---
 drivers/video/exynos_fb.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)
drivers/video/exynos_fb.c +4 -0
index d9a3f9a..39d3b74 100644
@@ -103,8 +103,10 @@ static void lcd_panel_on(vidinfo_t *vid)
 
 	udelay(vid->power_on_delay);
 
+#ifdef CONFIG_EXYNOS_DP
 	if (vid->dp_enabled)
 		exynos_init_dp();
+#endif
 
 	if (vid->reset_lcd) {
 		vid->reset_lcd();
@@ -120,8 +122,10 @@ static void lcd_panel_on(vidinfo_t *vid)
 	if (vid->enable_ldo)
 		vid->enable_ldo(1);
 
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
 	if (vid->mipi_enabled)
 		exynos_mipi_dsi_init();
+#endif
 }
 
 void lcd_ctrl_init(void *lcdbase)
Signature · 1 line
1.7.1
#5 lore raw

PATCH 3/5 video: Fix compilation dependency of exynos_dp and exynos_mipi on exynos_fb

Quoted 7 lines · Ajay Kumar

When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM. Similarly, when only MIPI is used, we need not enable CONFIG_EXYNOS_DP. But the current structuring of code forces us to enable both CONFIG_EXYNOS_MIPI_DSIM and CONFIG_EXYNOS_DP.
This patch adds conditional compilation check to remove the dependency.

Quoted 33 lines
---
 drivers/video/exynos_fb.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)
drivers/video/exynos_fb.c +4 -1
index d9a3f9a..39d3b74 100644
@@ -103,8 +103,10 @@ static void lcd_panel_on(vidinfo_t *vid)
 
        udelay(vid->power_on_delay);
 
+#ifdef CONFIG_EXYNOS_DP
        if (vid->dp_enabled)
                exynos_init_dp();
+#endif
 
        if (vid->reset_lcd) {
                vid->reset_lcd();
@@ -120,8 +122,10 @@ static void lcd_panel_on(vidinfo_t *vid)
        if (vid->enable_ldo)
                vid->enable_ldo(1);
 
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
        if (vid->mipi_enabled)
                exynos_mipi_dsi_init();
+#endif
 }
 
 void lcd_ctrl_init(void *lcdbase)
--

1.7.1

author
#6 lore raw

PATCH 4/5 EXYNOS5: Add support for FIMD and DP

In reply to Ajay Kumar

Add panel_info structure required by LCD driver and DP panel platdata for SMDK5250. Enable FIMD and DP support on SMDK5250. DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

---
 board/samsung/smdk5250/smdk5250.c |   82 +++++++++++++++++++++++++++++++++++++
 include/configs/smdk5250.h        |    9 ++++
 2 files changed, 91 insertions(+), 0 deletions(-)
board/samsung/smdk5250/smdk5250.c +82 -0
index 4c50342..e3d6ac1 100644
@@ -24,12 +24,15 @@
 #include <asm/io.h>
 #include <i2c.h>
 #include <netdev.h>
+#include <lcd.h>
 #include <spi.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/power.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>
+#include <asm/arch/dp_info.h>
 #include <pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -181,6 +184,85 @@ static int board_uart_init(void)
 	return 0;
 }
 
+vidinfo_t panel_info = {
+	.vl_freq	= 60,
+	.vl_col		= 2560,
+	.vl_row		= 1600,
+	.vl_width	= 2560,
+	.vl_height	= 1600,
+	.vl_clkp	= CONFIG_SYS_LOW,
+	.vl_hsp		= CONFIG_SYS_LOW,
+	.vl_vsp		= CONFIG_SYS_LOW,
+	.vl_dp		= CONFIG_SYS_LOW,
+	.vl_bpix	= 4,	/* LCD_BPP = 2^4, for output conosle on LCD */
+
+	/* wDP panel timing infomation */
+	.vl_hspw	= 32,
+	.vl_hbpd	= 80,
+	.vl_hfpd	= 48,
+
+	.vl_vspw	= 6,
+	.vl_vbpd	= 37,
+	.vl_vfpd	= 3,
+	.vl_cmd_allow_len = 0xf,
+
+	.win_id		= 3,
+	.cfg_gpio	= NULL,
+	.backlight_on	= NULL,
+	.lcd_power_on	= NULL,
+	.reset_lcd	= NULL,
+	.dual_lcd_enabled = 0,
+
+	.init_delay	= 0,
+	.power_on_delay = 0,
+	.reset_delay	= 0,
+	.interface_mode = FIMD_RGB_INTERFACE,
+	.dp_enabled	= 1,
+};
+
+static struct edp_device_info edp_info = {
+	.disp_info = {
+		.h_res = 2560,
+		.h_sync_width = 32,
+		.h_back_porch = 80,
+		.h_front_porch = 48,
+		.v_res = 1600,
+		.v_sync_width  = 6,
+		.v_back_porch = 37,
+		.v_front_porch = 3,
+		.v_sync_rate = 60,
+	},
+	.lt_info = {
+		.lt_status = DP_LT_NONE,
+	},
+	.video_info = {
+		.master_mode = 0,
+		.bist_mode = DP_DISABLE,
+		.bist_pattern = NO_PATTERN,
+		.h_sync_polarity = 0,
+		.v_sync_polarity = 0,
+		.interlaced = 0,
+		.color_space = COLOR_RGB,
+		.dynamic_range = VESA,
+		.ycbcr_coeff = COLOR_YCBCR601,
+		.color_depth = COLOR_8,
+	},
+};
+
+static struct exynos_dp_platform_data dp_platform_data = {
+	.phy_enable	= set_dp_phy_ctrl,
+	.edp_dev_info	= &edp_info,
+};
+
+void init_panel_info(vidinfo_t *vid)
+{
+	vid->logo_on    = 1,
+	vid->rgb_mode   = MODE_RGB_P,
+
+	exynos_set_dp_platform_data(&dp_platform_data);
+	exynos_pinmux_config(PERIPH_ID_LCD, NULL);
+}
+
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
 static int board_i2c_init(void)
 {
include/configs/smdk5250.h +9 -0
index e412da8..9489714 100644
@@ -256,6 +256,15 @@
 #define CONFIG_SOUND_WM8994
 #endif
 
+/* Display */
+#define CONFIG_LCD
+#define CONFIG_EXYNOS_FB
+#define CONFIG_EXYNOS_DP
+#define LCD_XRES			2560
+#define LCD_YRES			1600
+#define LCD_BPP			LCD_COLOR16
+#define CONFIG_CMD_BMP
+
 /* Enable devicetree support */
 #define CONFIG_OF_LIBFDT
 
Signature · 1 line
1.7.1
#7 lore raw

PATCH 4/5 EXYNOS5: Add support for FIMD and DP

Hi Ajay,

Quoted 7 lines · Ajay Kumar

Add panel_info structure required by LCD driver and DP panel platdata for SMDK5250. Enable FIMD and DP support on SMDK5250. DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

See suggestion below. I hope that this can be FDT-enabled later.

Quoted 117 lines
---
 board/samsung/smdk5250/smdk5250.c |   82 +++++++++++++++++++++++++++++++++++++
 include/configs/smdk5250.h        |    9 ++++
 2 files changed, 91 insertions(+), 0 deletions(-)
board/samsung/smdk5250/smdk5250.c +82 -0
index 4c50342..e3d6ac1 100644
@@ -24,12 +24,15 @@
 #include <asm/io.h>
 #include <i2c.h>
 #include <netdev.h>
+#include <lcd.h>
 #include <spi.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/power.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>
+#include <asm/arch/dp_info.h>
 #include <pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -181,6 +184,85 @@ static int board_uart_init(void)
        return 0;
 }
 
+vidinfo_t panel_info = {
+       .vl_freq        = 60,
+       .vl_col         = 2560,
+       .vl_row         = 1600,
+       .vl_width       = 2560,
+       .vl_height      = 1600,
+       .vl_clkp        = CONFIG_SYS_LOW,
+       .vl_hsp         = CONFIG_SYS_LOW,
+       .vl_vsp         = CONFIG_SYS_LOW,
+       .vl_dp          = CONFIG_SYS_LOW,
+       .vl_bpix        = 4,    /* LCD_BPP = 2^4, for output conosle on LCD */
+
+       /* wDP panel timing infomation */
+       .vl_hspw        = 32,
+       .vl_hbpd        = 80,
+       .vl_hfpd        = 48,
+
+       .vl_vspw        = 6,
+       .vl_vbpd        = 37,
+       .vl_vfpd        = 3,
+       .vl_cmd_allow_len = 0xf,
+
+       .win_id         = 3,
+       .cfg_gpio       = NULL,
+       .backlight_on   = NULL,
+       .lcd_power_on   = NULL,
+       .reset_lcd      = NULL,
+       .dual_lcd_enabled = 0,
+
+       .init_delay     = 0,
+       .power_on_delay = 0,
+       .reset_delay    = 0,
+       .interface_mode = FIMD_RGB_INTERFACE,
+       .dp_enabled     = 1,
+};
+
+static struct edp_device_info edp_info = {
+       .disp_info = {
+               .h_res = 2560,
+               .h_sync_width = 32,
+               .h_back_porch = 80,
+               .h_front_porch = 48,
+               .v_res = 1600,
+               .v_sync_width  = 6,
+               .v_back_porch = 37,
+               .v_front_porch = 3,
+               .v_sync_rate = 60,
+       },
+       .lt_info = {
+               .lt_status = DP_LT_NONE,
+       },
+       .video_info = {
+               .master_mode = 0,
+               .bist_mode = DP_DISABLE,
+               .bist_pattern = NO_PATTERN,
+               .h_sync_polarity = 0,
+               .v_sync_polarity = 0,
+               .interlaced = 0,
+               .color_space = COLOR_RGB,
+               .dynamic_range = VESA,
+               .ycbcr_coeff = COLOR_YCBCR601,
+               .color_depth = COLOR_8,
+       },
+};
+
+static struct exynos_dp_platform_data dp_platform_data = {
+       .phy_enable     = set_dp_phy_ctrl,
+       .edp_dev_info   = &edp_info,
+};
+
+void init_panel_info(vidinfo_t *vid)
+{
+       vid->logo_on    = 1,
+       vid->rgb_mode   = MODE_RGB_P,
+
+       exynos_set_dp_platform_data(&dp_platform_data);
+       exynos_pinmux_config(PERIPH_ID_LCD, NULL);
+}
+
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
 static int board_i2c_init(void)
 {
include/configs/smdk5250.h +0 -0
index e412da8..9489714 100644
@@ -256,6 +256,15 @@
 #define CONFIG_SOUND_WM8994

include/configs/smdk5250.h line 266

Quoted 10 lines
include/configs/smdk5250.h +8 -0
 #endif
 
+/* Display */
+#define CONFIG_LCD
+#define CONFIG_EXYNOS_FB
+#define CONFIG_EXYNOS_DP
+#define LCD_XRES                       2560
+#define LCD_YRES                       1600
+#define LCD_BPP                        LCD_COLOR16
+#define CONFIG_CMD_BMP

Perhaps CONFIG_LCD_BMP_RLE8 as well?

Quoted 7 lines
include/configs/smdk5250.h +1 -1
+
 /* Enable devicetree support */
 #define CONFIG_OF_LIBFDT
 
--

1.7.1

Regards,
Simon

author
#8 lore raw

PATCH 5/5 video: Modify exynos_fimd driver to support LCD console.

In reply to Ajay Kumar

Currently, exynos FIMD driver is being used to support only TIZEN LOGOs. In order to get LCD console, we need to enable half word swap feature of FIMD and use 16 BPP.

---
 drivers/video/exynos_fimd.c |   10 ++++++++--
 1 files changed, 8 insertions(+), 2 deletions(-)
drivers/video/exynos_fimd.c +8 -2
index 06eae2e..8a12c30 100644
@@ -88,14 +88,20 @@ static void exynos_fimd_set_par(unsigned int win_id)
 	/* DATAPATH is DMA */
 	cfg |= EXYNOS_WINCON_DATAPATH_DMA;
 
-	/* bpp is 32 */
+#ifdef CONFIG_TIZEN /* Tizen uses Proprietary LOGO */
 	cfg |= EXYNOS_WINCON_WSWP_ENABLE;
+#else	/* Other boards must use output console on LCD */
+	cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+#endif
 
 	/* dma burst is 16 */
 	cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
 
-	/* pixel format is unpacked RGB888 */
+#ifdef CONFIG_TIZEN /* Tizen uses Proprietary LOGO */
 	cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+#else	/* Other boards must use output console on LCD */
+	cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+#endif
 
 	writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
 			EXYNOS_WINCON(win_id));
Signature · 1 line
1.7.1
#9 lore raw

PATCH 5/5 video: Modify exynos_fimd driver to support LCD console.

Quoted 5 lines · Ajay Kumar

Currently, exynos FIMD driver is being used to support only TIZEN LOGOs. In order to get LCD console, we need to enable half word swap feature of FIMD and use 16 BPP.

Eventual FDT support should help to remove these ifdefs. But even in the meantime, would it not be better to create a new CONFIG_EXYNOS_FIMD_... option to select the behavior and then put the option in the board config file?

Regards,
Simon

Quoted 34 lines
---
 drivers/video/exynos_fimd.c |   10 ++++++++--
 1 files changed, 8 insertions(+), 2 deletions(-)
drivers/video/exynos_fimd.c +8 -3
index 06eae2e..8a12c30 100644
@@ -88,14 +88,20 @@ static void exynos_fimd_set_par(unsigned int win_id)
        /* DATAPATH is DMA */
        cfg |= EXYNOS_WINCON_DATAPATH_DMA;
 
-       /* bpp is 32 */
+#ifdef CONFIG_TIZEN /* Tizen uses Proprietary LOGO */
        cfg |= EXYNOS_WINCON_WSWP_ENABLE;
+#else  /* Other boards must use output console on LCD */
+       cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+#endif
 
        /* dma burst is 16 */
        cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
 
-       /* pixel format is unpacked RGB888 */
+#ifdef CONFIG_TIZEN /* Tizen uses Proprietary LOGO */
        cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+#else  /* Other boards must use output console on LCD */
+       cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+#endif
 
        writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
                        EXYNOS_WINCON(win_id));
--

1.7.1

#10 lore raw

PATCH 1/5 EXYNOS5: Change parent clock of FIMD to MPLL

In reply to Ajay Kumar

Hi Ajay,

Quoted 5 lines · Ajay Kumar

With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock. Changing FIMD source to resolves this issue.

At some point it would be nice to have defines for these, or even a full clock api, with clock_set_rate(), clock_set_source(), etc.

Regards,
Simon

Quoted 20 lines
---
 arch/arm/cpu/armv7/exynos/clock.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/cpu/armv7/exynos/clock.c +1 -2
index fe61f88..bfcd5f7 100644
@@ -603,7 +603,7 @@ void exynos5_set_lcd_clk(void)
         */
        cfg = readl(&clk->src_disp1_0);
        cfg &= ~(0xf);
-       cfg |= 0x8;
+       cfg |= 0x6;
        writel(cfg, &clk->src_disp1_0);
 
        /*
--

1.7.1