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crypto api: add crc32 pclmulqdq implementation and wrappers for table implementation

PATCH Superseded Alexander Boyko 2 participants 2 messages Dec 20, 2012 – Jan 5, 2013

Subsystems (2)
x86 Crypto API

v3 of 4 Superseded Latest is v4 →

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Alexander Boyko

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PATCH v3 1/1 crypto api: add crc32 pclmulqdq implementation and wrappers for table implementation

From: Alexander Boyko <[email protected]>

This patch adds crc32 algorithms to shash crypto api. One is wrapper to generic crc32_le function. Second is crc32 pclmulqdq implementation. It use hardware provided PCLMULQDQ instruction to accelerate the CRC32 disposal. This instruction present from Intel Westmere and AMD Bulldozer CPUs.

For intel core i5 I got 450MB/s for table implementation and 2100MB/s for pclmulqdq implementation.

Signed-off-by Alexander Boyko <[email protected]>

---
Changes from V2 to V3:
- Rebased.

 arch/x86/crypto/Makefile            |    2
 arch/x86/crypto/crc32-pclmul_asm.S  |  247 
++++++++++++++++++++++++++++++++++++
 arch/x86/crypto/crc32-pclmul_glue.c |  201 +++++++++++++++++++++++++++++
 crypto/Kconfig                      |   21 +++
 crypto/Makefile                     |    1
 crypto/crc32.c                      |  158 +++++++++++++++++++++++
 6 files changed, 630 insertions(+)
arch/x86/crypto/Makefile +2 -0
index e0ca7c9..63947a8 100644
@@ -27,6 +27,7 @@ obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o
 
 obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
 obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
+obj-$(CONFIG_CRYPTO_CRC32_PCLMUL) += crc32-pclmul.o
 
 aes-i586-y := aes-i586-asm_32.o aes_glue.o
 twofish-i586-y := twofish-i586-asm_32.o twofish_glue.o

@@ -52,3 +53,4 @@ ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o
 sha1-ssse3-y := sha1_ssse3_asm.o sha1_ssse3_glue.o
 crc32c-intel-y := crc32c-intel_glue.o
 crc32c-intel-$(CONFIG_CRYPTO_CRC32C_X86_64) += crc32c-pcl-intel-asm_64.o
+crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o
arch/x86/crypto/crc32-pclmul_asm.S new file +247 -0

247 lines not on this page · raw message

arch/x86/crypto/crc32-pclmul_glue.c new file +201 -0

201 lines not on this page · raw message

crypto/Kconfig +21 -0
index 4641d95..e8b51e0 100644
@@ -355,6 +355,27 @@ config CRYPTO_CRC32C_SPARC64
 	  CRC32c CRC algorithm implemented using sparc64 crypto instructions,
 	  when available.
 
+config CRYPTO_CRC32
+	tristate "CRC32 CRC algorithm"
+	select CRYPTO_HASH
+	select CRC32
+	help
+	  CRC-32-IEEE 802.3 cyclic redundancy-check algorithm.
+	  Shash crypto api wrappers to crc32_le function.
+
+config CRYPTO_CRC32_PCLMUL
+	tristate "CRC32 PCLMULQDQ hardware acceleration"
+	depends on X86
+	select CRYPTO_HASH
+	select CRC32
+	help
+	  From Intel Westmere and AMD Bulldozer processor with SSE4.2
+	  and PCLMULQDQ supported, the processor will support
+	  CRC32 PCLMULQDQ implementation using hardware accelerated PCLMULQDQ
+	  instruction. This option will create 'crc32-plcmul' module,
+	  which will enable any routine to use the CRC-32-IEEE 802.3 checksum
+	  and gain better performance as compared with the table implementation.
+
 config CRYPTO_GHASH
 	tristate "GHASH digest algorithm"
 	select CRYPTO_GF128MUL
crypto/Makefile +1 -0
index d59dec7..be1a1be 100644
@@ -81,6 +81,7 @@ obj-$(CONFIG_CRYPTO_DEFLATE) += deflate.o
 obj-$(CONFIG_CRYPTO_ZLIB) += zlib.o
 obj-$(CONFIG_CRYPTO_MICHAEL_MIC) += michael_mic.o
 obj-$(CONFIG_CRYPTO_CRC32C) += crc32c.o
+obj-$(CONFIG_CRYPTO_CRC32) += crc32.o
 obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.o authencesn.o
 obj-$(CONFIG_CRYPTO_LZO) += lzo.o
 obj-$(CONFIG_CRYPTO_842) += 842.o
crypto/crc32.c new file +158 -0

158 lines not on this page · raw message

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#1 lore raw
Quoted 8 lines · Alexander Boyko

From: Alexander Boyko <[email protected]>

This patch adds crc32 algorithms to shash crypto api. One is wrapper to generic crc32_le function. Second is crc32 pclmulqdq implementation. It use hardware provided PCLMULQDQ instruction to accelerate the CRC32 disposal. This instruction present from Intel Westmere and AMD Bulldozer CPUs.

Quoted 4 lines

For intel core i5 I got 450MB/s for table implementation and 2100MB/s for pclmulqdq implementation.

Signed-off-by Alexander Boyko <[email protected]>

Sorry, but your patch is white space damaged and cannot be applied.

You can test this yourself by sending a copy to your email address and checking whether you can still apply it.

Thanks,

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt