Enable eMMC on mx6qsabresd board
cover Enable eMMC on mx6qsabresd board
The series is to enable the use of eMMC on mx6qsabresd board, so that we do not need to carry an external card to boot the board. The DDR mode support for eMMC is not included.
Shawn Guo (3):
fsl_esdhc: add MMC_MODE_HC host_caps
mx6qsabresd: add usdhc2 and usdhc4 support
mx6qsabresd: use on-board eMMC to store environment
board/freescale/mx6qsabresd/mx6qsabresd.c | 80 ++++++++++++++++++++++++++--- drivers/mmc/fsl_esdhc.c | 3 +- include/configs/mx6qsabre_common.h | 2 - include/configs/mx6qsabreauto.h | 5 ++ include/configs/mx6qsabresd.h | 6 +++ 5 files changed, 87 insertions(+), 9 deletions(-)
Signature · 1 line
1.7.9.5
PATCH 1/3 fsl_esdhc: add MMC_MODE_HC host_caps
All esdhc variants we know should support high capacity MMC cards, so let's add MMC_MODE_HC host_caps unconditionally to support those MMC cards (capacity > 2 GB).
--- drivers/mmc/fsl_esdhc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/mmc/fsl_esdhc.c +2 -1
@@ -262,6 +262,7 @@ static void check_and_invalidate_dcache_rangeunsigned end = start+size ;invalidate_dcache_range (start, end); } +/* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer.
@@ -577,7 +578,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)return -1 ; } - mmc->host_caps =MMC_MODE_4BIT |MMC_MODE_8BIT ; + mmc->host_caps =MMC_MODE_4BIT |MMC_MODE_8BIT |MMC_MODE_HC ;if (caps &ESDHC_HOSTCAPBLT_HSS ) mmc->host_caps |= MMC_MODE_HS_52MHz |MMC_MODE_HS ;
Signature · 1 line
1.7.9.5
PATCH 1/3 fsl_esdhc: add MMC_MODE_HC host_caps
Quoted 14 lines · Shawn Guo
All esdhc variants we know should support high capacity MMC cards, so let's add
MMC_MODE_HChost_capsunconditionally to support those MMC cards (capacity > 2 GB).Signed-off-by Shawn Guo <[email protected]>--- drivers/mmc/fsl_esdhc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)drivers/mmc/fsl_esdhc.c +0
-0
drivers/mmc/fsl_esdhc.c static void check_and_invalidate_dcache_range · line 265
Quoted 4 lines
drivers/mmc/fsl_esdhc.c +1
-0@@ -262,6 +262,7 @@ static void check_and_invalidate_dcache_rangeunsigned end = start+size ;invalidate_dcache_range (start, end); } +
This is an accident coding style cleanup which I forgot recovering. Hope maintainer is fine with it, otherwise I can resend the patch to keep it unchanged.
Shawn
Quoted 16 lines
drivers/mmc/fsl_esdhc.c +1
-1/* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -577,7 +578,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)return -1 ; } - mmc->host_caps =MMC_MODE_4BIT |MMC_MODE_8BIT ; + mmc->host_caps =MMC_MODE_4BIT |MMC_MODE_8BIT |MMC_MODE_HC ;if (caps &ESDHC_HOSTCAPBLT_HSS ) mmc->host_caps |= MMC_MODE_HS_52MHz |MMC_MODE_HS ;Signature · 1 line
1.7.9.5
PATCH 1/3 fsl_esdhc: add MMC_MODE_HC host_caps
In reply to Shawn GuoQuoted 14 lines · Shawn Guo
All esdhc variants we know should support high capacity MMC cards, so let's add
MMC_MODE_HChost_capsunconditionally to support those MMC cards (capacity > 2 GB).Signed-off-by Shawn Guo <[email protected]>--- drivers/mmc/fsl_esdhc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)drivers/mmc/fsl_esdhc.c +0
-0
drivers/mmc/fsl_esdhc.c static void check_and_invalidate_dcache_range · line 265
Quoted 4 lines
drivers/mmc/fsl_esdhc.c +1
-0@@ -262,6 +262,7 @@ static void check_and_invalidate_dcache_rangeunsigned end = start+size ;invalidate_dcache_range (start, end); } +
I drop myself this from the commit.
drivers/mmc/fsl_esdhc.c int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) · line 584
Quoted 13 lines
drivers/mmc/fsl_esdhc.c +1
-1/* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -577,7 +578,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)return -1 ; } - mmc->host_caps =MMC_MODE_4BIT |MMC_MODE_8BIT ; + mmc->host_caps =MMC_MODE_4BIT |MMC_MODE_8BIT |MMC_MODE_HC ;if (caps &ESDHC_HOSTCAPBLT_HSS ) mmc->host_caps |= MMC_MODE_HS_52MHz |MMC_MODE_HS ;
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 2/3 mx6qsabresd: add usdhc2 and usdhc4 support
In reply to Shawn GuoThe on-board number of available usdhc devices is something board specific. The patch moves CONFIG_SYS_FSL_USDHC_NUM out of mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd board.
To keep the default mmc device for environment same as before (usdhc3), it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes it to 1 for mx6qsabresd.
--- board/freescale/mx6qsabresd/mx6qsabresd.c | 80 ++++++++++++++++++++++++++--- include/configs/mx6qsabre_common.h | 2 - include/configs/mx6qsabreauto.h | 5 ++ include/configs/mx6qsabresd.h | 5 ++ 4 files changed, 84 insertions(+), 8 deletions(-)
board/freescale/mx6qsabresd/mx6qsabresd.c +74 -6
@@ -86,6 +86,20 @@ static void setup_iomux_enet(void)gpio_set_value (IMX_GPIO_NR (1 ,25 ),1 ); } +iomux_v3_cfg_t const usdhc2_pads[] = { +MX6Q_PAD_SD2_CLK__USDHC2_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD2_CMD__USDHC2_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_NANDF_D4__USDHC2_DAT4 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_NANDF_D5__USDHC2_DAT5 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_NANDF_D6__USDHC2_DAT6 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_NANDF_D7__USDHC2_DAT7 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_NANDF_D2__GPIO_2_2 |MUX_PAD_CTRL (NO_PAD_CTRL ),/* CD */ +}; +iomux_v3_cfg_t const usdhc3_pads[] = {MX6Q_PAD_SD3_CLK__USDHC3_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ),MX6Q_PAD_SD3_CMD__USDHC3_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ),
@@ -100,28 +114,82 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6Q_PAD_NANDF_D0__GPIO_2_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; +iomux_v3_cfg_t const usdhc4_pads[] = { +MX6Q_PAD_SD4_CLK__USDHC4_CLK |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_CMD__USDHC4_CMD |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 |MUX_PAD_CTRL (USDHC_PAD_CTRL ), +}; +static void setup_iomux_uart (void ) {imx_iomux_v3_setup_multiple_pads (uart1_pads,ARRAY_SIZE (uart1_pads)); }#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg usdhc_cfg[1 ] = { +struct fsl_esdhc_cfg usdhc_cfg[3 ] = { + {USDHC2_BASE_ADDR }, {USDHC3_BASE_ADDR }, + {USDHC4_BASE_ADDR }, }; +#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2) +#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0) +int board_mmc_getcd (struct mmc *mmc) { -gpio_direction_input (IMX_GPIO_NR (2 ,0 )); -return !gpio_get_value (IMX_GPIO_NR (2 ,0 )); +struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + +switch (cfg->esdhc_base) { +case USDHC2_BASE_ADDR : +return !gpio_get_value (USDHC2_CD_GPIO ); +case USDHC3_BASE_ADDR : +return !gpio_get_value (USDHC3_CD_GPIO ); +default : +return 1 ;/* eMMC/uSDHC4 is always present */ + } }int board_mmc_init (bd_t *bis) { -imx_iomux_v3_setup_multiple_pads (usdhc3_pads,ARRAY_SIZE (usdhc3_pads)); +int i; + +for (i =0 ; i <CONFIG_SYS_FSL_USDHC_NUM ; i++) { +switch (i) { +case 0 : +imx_iomux_v3_setup_multiple_pads ( + usdhc2_pads,ARRAY_SIZE (usdhc2_pads)); +gpio_direction_input (USDHC2_CD_GPIO ); + usdhc_cfg[0 ].sdhc_clk =mxc_get_clock (MXC_ESDHC2_CLK ); +break ; +case 1 : +imx_iomux_v3_setup_multiple_pads ( + usdhc3_pads,ARRAY_SIZE (usdhc3_pads)); +gpio_direction_input (USDHC3_CD_GPIO ); + usdhc_cfg[1 ].sdhc_clk =mxc_get_clock (MXC_ESDHC3_CLK ); +break ; +case 2 : +imx_iomux_v3_setup_multiple_pads ( + usdhc4_pads,ARRAY_SIZE (usdhc4_pads)); + usdhc_cfg[2 ].sdhc_clk =mxc_get_clock (MXC_ESDHC4_CLK ); +break ; +default : +printf ("Warning: you configured more USDHC controllers" +"(%d) than supported by the board\n" , i +1 ); +return 0 ; + } + +if (fsl_esdhc_initialize (bis, &usdhc_cfg[i])) +printf ("Warning: failed to initialize mmc dev %d\n" , i); + } - usdhc_cfg[0 ].sdhc_clk =mxc_get_clock (MXC_ESDHC3_CLK ); -return fsl_esdhc_initialize (bis, &usdhc_cfg[0 ]); +return 0 ; }#endif
include/configs/mx6qsabre_common.h +0 -2
@@ -41,7 +41,6 @@#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2#define CONFIG_MMC #define CONFIG_CMD_MMC
@@ -166,7 +165,6 @@#if defined(CONFIG_ENV_IS_IN_MMC )#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0#endif #define CONFIG_OF_LIBFDT
include/configs/mx6qsabreauto.h +5 -0
@@ -20,4 +20,9 @@#include "mx6qsabre_common.h" +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#if defined(CONFIG_ENV_IS_IN_MMC ) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif +#endif /* __MX6QSABREAUTO_CONFIG_H */
include/configs/mx6qsabresd.h +5 -0
@@ -25,4 +25,9 @@#include "mx6qsabre_common.h" +#define CONFIG_SYS_FSL_USDHC_NUM 3 +#if defined(CONFIG_ENV_IS_IN_MMC ) +#define CONFIG_SYS_MMC_ENV_DEV 1 +#endif +#endif /* __MX6QSABRESD_CONFIG_H */
Signature · 1 line
1.7.9.5
PATCH 2/3 mx6qsabresd: add usdhc2 and usdhc4 support
Quoted 11 lines · Shawn Guo
The on-board number of available usdhc devices is something board specific. The patch moves
CONFIG_SYS_FSL_USDHC_NUMout ofmx6qsabre_common.hand adds usdhc2 and usdhc4 support for mx6qsabresd board.To keep the default mmc device for environment same as before (usdhc3), it moves
CONFIG_SYS_MMC_ENV_DEVout ofmx6qsabre_common.hand changes it to 1 for mx6qsabresd.Signed-off-by Shawn Guo <[email protected]>---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 3/3 mx6qsabresd: use on-board eMMC to store environment
In reply to Shawn GuoIt makes more sense to use on-board eMMC to store environments. The boot partition 1 is selected by default.
--- include/configs/mx6qsabresd.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
include/configs/mx6qsabresd.h +2 -1
@@ -27,7 +27,8 @@#define CONFIG_SYS_FSL_USDHC_NUM 3#if defined(CONFIG_ENV_IS_IN_MMC ) -#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_DEV 2/* eMMC/uSDHC4 */ +#define CONFIG_SYS_MMC_ENV_PART 1/* Boot partition 1 */ #endif #endif /* __MX6QSABRESD_CONFIG_H */
Signature · 1 line
1.7.9.5
PATCH 3/3 mx6qsabresd: use on-board eMMC to store environment
Quoted 5 lines · Shawn Guo
It makes more sense to use on-board eMMC to store environments. The boot partition 1 is selected by default.
Signed-off-by Shawn Guo <[email protected]>---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
cover Enable eMMC on mx6qsabresd board
In reply to Shawn GuoQuoted 9 lines · Shawn Guo
The series is to enable the use of eMMC on mx6qsabresd board, so that we do not need to carry an external card to boot the board. The DDR mode support for eMMC is not included.
Shawn Guo (3):
fsl_esdhc: addMMC_MODE_HChost_caps
mx6qsabresd: add usdhc2 and usdhc4 support
mx6qsabresd: use on-board eMMC to store environment
Forgot adding [U-Boot] prefix for these patches. Will do next time.
Shawn
Quoted 11 lines
board/freescale/mx6qsabresd/mx6qsabresd.c | 80 ++++++++++++++++++++++++++--- drivers/mmc/fsl_esdhc.c | 3 +- include/configs/mx6qsabre_common.h | 2 - include/configs/mx6qsabreauto.h | 5 ++ include/configs/mx6qsabresd.h | 6 +++ 5 files changed, 87 insertions(+), 9 deletions(-)Signature · 1 line
1.7.9.5
cover Enable eMMC on mx6qsabresd board
Quoted 11 lines · Shawn Guo
Quoted 9 lines · Shawn Guo
The series is to enable the use of eMMC on mx6qsabresd board, so that we do not need to carry an external card to boot the board. The DDR mode support for eMMC is not included.
Shawn Guo (3):
fsl_esdhc: addMMC_MODE_HChost_caps
mx6qsabresd: add usdhc2 and usdhc4 support
mx6qsabresd: use on-board eMMC to store environmentForgot adding [U-Boot] prefix for these patches. Will do next time.
No need to add [U-Boot] prefix. This gets added by the mailing list.
Regards,
Fabio Estevam
cover Enable eMMC on mx6qsabresd board
Quoted 2 lines · Fabio Estevam
No need to add [U-Boot] prefix. This gets added by the mailing list.
Ah, right. After checking the list from another mailbox, I have seen the prefix.
Shawn
cover Enable eMMC on mx6qsabresd board
In reply to Shawn GuoQuoted 5 lines · Shawn Guo
Quoted 4 lines · Shawn Guo
The series is to enable the use of eMMC on mx6qsabresd board, so that we do not need to carry an external card to boot the board. The DDR mode support for eMMC is not included.
Hi Shawn,
Quoted 6 lines
Quoted 5 lines
Shawn Guo (3):
fsl_esdhc: addMMC_MODE_HChost_caps
mx6qsabresd: add usdhc2 and usdhc4 support
mx6qsabresd: use on-board eMMC to store environmentForgot adding [U-Boot] prefix for these patches. Will do next time.
Never mind - and nobody adds [U-Boot] to a patch. I think it is added automatically by the mailing list server.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================