nouveau: add support for setting engine on nve0
PATCH 1/1 nouveau: add support for setting engine on nve0
When a specific engine is needed that's not GR, struct nve0_fifo should be used, and the engine member should be used to select the engine.
This will fail on kernels before 3.8, since no support for such engines has been added yet.
---
Can you review/test this libdrm patch?
nouveau/abi16.c +23 -0
@@ -70,6 +70,29 @@ abi16_chan_nvc0(struct nouveau_object *obj) }int +abi16_chan_nve0 (struct nouveau_object *obj) +{ +struct nouveau_device *dev = (struct nouveau_device *)obj->parent; +struct nve0_fifo *nve0 = obj->data; +struct nvc0_fifo *nvc0 = &nve0->base; +struct drm_nouveau_channel_alloc req = { ~0 , nve0->engine }; +int ret; + + ret =drmCommandWriteRead (dev->fd,DRM_NOUVEAU_CHANNEL_ALLOC , + &req,sizeof (req)); +if (ret) +return ret; + + nvc0->base.channel = req.channel; + nvc0->base.pushbuf = req.pushbuf_domains; + nvc0->notify = req.notifier_handle; + nvc0->base.object->handle = req.channel; + nvc0->base.object->length =sizeof (*nve0); +return 0 ; +} + + +int abi16_engobj (struct nouveau_object *obj) {struct drm_nouveau_grobj_alloc req = {
nouveau/nouveau.c +4 -1
@@ -246,8 +246,11 @@ nouveau_object_new(struct nouveau_object *parent, uint64_t handle, {if (dev->chipset <0xc0 ) ret =abi16_chan_nv04 (obj); -else +else if (dev->chipset <0xe0 || + length <sizeof (struct nve0_fifo )) ret =abi16_chan_nvc0 (obj); +else + ret =abi16_chan_nve0 (obj); }break ;default :
nouveau/nouveau.h +13 -0
@@ -41,6 +41,19 @@ struct nvc0_fifo {uint32_t notify; }; +struct nve0_fifo { +struct nvc0_fifo base; +uint32_t engine; + +#define NVE0_CHANNEL_IND_ENGINE_GR 0x00000001 +#define NVE0_CHANNEL_IND_ENGINE_VP 0x00000002 +#define NVE0_CHANNEL_IND_ENGINE_PPP 0x00000004 +#define NVE0_CHANNEL_IND_ENGINE_BSP 0x00000008 +#define NVE0_CHANNEL_IND_ENGINE_CE0 0x00000010 +#define NVE0_CHANNEL_IND_ENGINE_CE1 0x00000020 +#define NVE0_CHANNEL_IND_ENGINE_ENC 0x00000040 +}; +struct nv04_notify {struct nouveau_object *object;uint32_t offset;
nouveau/private.h +1 -0
@@ -113,6 +113,7 @@ nouveau_device_open_existing(struct nouveau_device **, int, int, drm_context_t);/* abi16.c */ int abi16_chan_nv04 (struct nouveau_object *);int abi16_chan_nvc0 (struct nouveau_object *); +int abi16_chan_nve0 (struct nouveau_object *);int abi16_engobj (struct nouveau_object *);int abi16_ntfy (struct nouveau_object *);void abi16_bo_info (struct nouveau_bo *,struct drm_nouveau_gem_info *);
Quoted 4 lines · Maarten Lankhorst
When a specific engine is needed that's not GR, struct
nve0_fifoshould be used, and the engine member should be used to select the engine.This will fail on kernels before 3.8, since no support for such engines has been added yet.
This looks strikingly similar to the version of the patch I sent you ages back. Was there something you noticed wrong with that version?
I do need to re-check some things with that patch and make sure it'll work properly on both 32/64-bit (hint: sizeof(struct nve0_fifo) is the same as nvc0_fifo on 64-bit, due to padding...), and maintain compat with pre-3.8 kernels.
I'll try and sort this out before the end of tomorrow.
Ben.
Quoted 94 lines
Signed-off-by Maarten Lankhorst <[email protected]>---
Can you review/test this libdrm patch?nouveau/abi16.c +23
-0@@ -70,6 +70,29 @@ abi16_chan_nvc0(struct nouveau_object *obj) }int +abi16_chan_nve0 (struct nouveau_object *obj) +{ +struct nouveau_device *dev = (struct nouveau_device *)obj->parent; +struct nve0_fifo *nve0 = obj->data; +struct nvc0_fifo *nvc0 = &nve0->base; +struct drm_nouveau_channel_alloc req = { ~0 , nve0->engine }; +int ret; + + ret =drmCommandWriteRead (dev->fd,DRM_NOUVEAU_CHANNEL_ALLOC , + &req,sizeof (req)); +if (ret) +return ret; + + nvc0->base.channel = req.channel; + nvc0->base.pushbuf = req.pushbuf_domains; + nvc0->notify = req.notifier_handle; + nvc0->base.object->handle = req.channel; + nvc0->base.object->length =sizeof (*nve0); +return 0 ; +} + + +int abi16_engobj (struct nouveau_object *obj) {struct drm_nouveau_grobj_alloc req = {nouveau/nouveau.c +4
-1@@ -246,8 +246,11 @@ nouveau_object_new(struct nouveau_object *parent, uint64_t handle, {if (dev->chipset <0xc0 ) ret =abi16_chan_nv04 (obj); -else +else if (dev->chipset <0xe0 || + length <sizeof (struct nve0_fifo )) ret =abi16_chan_nvc0 (obj); +else + ret =abi16_chan_nve0 (obj); }break ;default :nouveau/nouveau.h +13
-0@@ -41,6 +41,19 @@ struct nvc0_fifo {uint32_t notify; }; +struct nve0_fifo { +struct nvc0_fifo base; +uint32_t engine; + +#define NVE0_CHANNEL_IND_ENGINE_GR 0x00000001 +#define NVE0_CHANNEL_IND_ENGINE_VP 0x00000002 +#define NVE0_CHANNEL_IND_ENGINE_PPP 0x00000004 +#define NVE0_CHANNEL_IND_ENGINE_BSP 0x00000008 +#define NVE0_CHANNEL_IND_ENGINE_CE0 0x00000010 +#define NVE0_CHANNEL_IND_ENGINE_CE1 0x00000020 +#define NVE0_CHANNEL_IND_ENGINE_ENC 0x00000040 +}; +struct nv04_notify {struct nouveau_object *object;uint32_t offset;nouveau/private.h +1
-0@@ -113,6 +113,7 @@ nouveau_device_open_existing(struct nouveau_device **, int, int, drm_context_t);/* abi16.c */ int abi16_chan_nv04 (struct nouveau_object *);int abi16_chan_nvc0 (struct nouveau_object *); +int abi16_chan_nve0 (struct nouveau_object *);int abi16_engobj (struct nouveau_object *);int abi16_ntfy (struct nouveau_object *);void abi16_bo_info (struct nouveau_bo *,struct drm_nouveau_gem_info *);
Hey,
Op 14-01-13 06:25, Ben Skeggs schreef:
Quoted 7 lines · Maarten Lankhorst
Quoted 4 lines
When a specific engine is needed that's not GR, struct
nve0_fifoshould be used, and the engine member should be used to select the engine.This will fail on kernels before 3.8, since no support for such engines has been added yet.
This looks strikingly similar to the version of the patch I sent you ages back. Was there something you noticed wrong with that version?
I think you forgot to send that patch to me, I remember you sending me the mesa changes, but not the libdrm diff. :)
Quoted 4 lines
I do need to re-check some things with that patch and make sure it'll work properly on both 32/64-bit (hint:
sizeof(struct nve0_fifo)is the same asnvc0_fifoon 64-bit, due to padding...), and maintain compat with pre-3.8 kernels.
This should not be the case with the patch I wrote. Since I encapsulate the original nvc0_fifo struct as base, the size should be different.
Quoted 4 lines
I'll try and sort this out before the end of tomorrow.
Ben.
Sure, np. Just wanted to see if I could get the mesa changes in before 9.1 branching off. :)
~Maarten